Tektronix 2901 User manual

1 Ν E5 - Γ RU CT101 V
ΜΑΝ
UA
L
2901
Serial
Nu mber
TIME-MARK
G ENE R A TO R
Te k t r onix, Inc .

"
Ρ . Ο . Box 500
"
B eave r ton, Oregon 97005
"
Phone [phone] " Cables : Te k tronix
070-0995-00

370

WARRANTY
All
Tektronix
instruments
are warranted
against
defective materials
and workman-
ship
for one year . Tektronix
transformers,
manufactured in our
plant, are warranted
for the
life of the
instrument .
Any questions with
respect to the
war-
ranty
mentioned above
should be taken
up
with your Tektronix
Field Engineer .
Tektronix repair and
replacement-part
service is geared directly
to the field, there-
fore all requests for
repairs and
replace-
ment parts should
be directed to the
Tek-
tronix Field Office
or representative in
your
area . This procedure
will assure
you the
fastest possible
service . Please
include the
instrument Type and
Serial or
Model Num-
ber with
all requests for parts
or service .
Specifications
and -price
change privi-
leges reserved .
Copyrights
1970 by Tektronix,
Inc .,
Beaverton, Oregon .
Printed in the
United
States of America
. All rights
reserved .
Contents of this
publication may
not be
reproduced in
any form without
permission
of the copyright
owner .

P age

Page
SE CTIO N 1 S PE CI F ICATIO N

Test E qu i p ment R eq u i r ed and R ecommen d
ed 5-1
Introdu
ctio
n
1-1

S h ort For m Pr oce d ur e

5-2
P erformance Conditions

1-2

Calib r atio n R ecor d a nd In
d ex

5-2
E lect r ical C ha r acteristics

1-2

P
erfo r mance C heck /Cali br atio n P roce d ur e

5-3
E nviro n mental C h aracteristics

1-2

P
reliminary P roced u re

5-3
Ph ysical
C h aracte
r
istics

1-2

Test E qu ipment
Setup a
n
d Co n trol Settings 5-4
SE CTIO N 2
O
PER ATI
N G
I
N ST RU CTIO N S

C h ec k
Ove
n Lig h
t

5-3
Ch ec k /A d ju st -30 V S upp ly

5-4
I n tr od
u ctio n 2-1
C h ec k P ower S u p p ly R eg u lation

5-4
Installation

2-1

C
hec k /A d ju st Crystal Oscillator
F re qu ency 5-5
Co n trols an d Connectors

2-2

C hec k /A d ju st
Mu
ltiplie rs
(50 n s, 10 π s, 5 ns
General O p erating Information

2-2

and 2 ns)

5-8
C h ec k M arke r O u t pu t (Co unt d own
S E CTIO N 3 CI R
C U
IT D E
SC
R I
P TIO N

Circ u its)

5-10
I n tro d u ctio n
3-1

C hec k M a rk e r Am p lifier
O u t p ut

5-12
B loc k Diagram Desc r i p tio n
3-1

C heck Trigger
O u
t p
ut

5-12
Detaile d Circ u it Descri p tion

3-1

C hec k E xternal Cloc k O p eratio n 5-13
Oscillator

3-1
Mu lti p lier

3-1

SE
CTIO N
6
ELE CT R ICA L P A R TS L IST
Divider an d Co u ntdown Circ u its

3-3

Abbreviations a n d Sym b ols
P ower Su pp ly

3-9

P arts Ordering Information
In d ex of E
lect
r
ical P a rts L ist
SE CTIO
N 4 M AI N T EN A N C E

E lectrical
P a r ts List
Introdu ction

4-1
Access to t h e I n te r ior

4-1

SE CTIO
N 7 DIAG R A M S A N D MEC H A N ICA L
Pr eve n
tive M ai n te n a nce

4-1

P A RTS I LLU ST R ATIO N S
O
F
Cleani n g

4-1
E lectrical
Lu bricatio n
4-1
M ech anical
I n s p ection

4-1
R e p ac k aging
P erformance
C
h
eck
s

4-1
Tro
u
bles
h ooting

4-2

SE CTIO N 8 MEC H A N ICA L P A R TS L IST
Cor r ective M aintena n ce

4-5

M ech a n ical P arts L ists Information
Sol d eri ng Tec hn i qu e

4-5

In d ex of
M
echanical P
a r ts an d Repackaging
Ill u strations
R emovala nd R ep lacement of
Com p onents
an d Subassemblies

4-6

M ech
anical P arts L ist
Ph ysical L ocatio n of
Com
p
onents

4-9

Accessories
SE CTIO N 5 PERF O RM A N C E C HE C K /
CA
L I B
RATIO N
I n tr
od u ctio n 5-1
Com p lete or P artial Calibration P roce dure

5-1
Com p lete or P artial P erforma n
ce C h ec k 5-1
TABLE O F CONTENTS
2901
A b breviatio n s a n d symbols used in
this man u al are
b ase d on o r ta k end
ir ectly from IEEE Stan d ar d 260
"Stan d ard
Symbols fo r Un its", MIL-STD-12B and ot her
stan d
ards of t h e electro nics in d ust r y . C h a n ge
informa-
tion, if any, is locate d at t h e r ea r of t h is man
u al .

Fig . 1-1 . 2901 Time-Mark Generator .

Intro
du
ction
S E CTIO N 1
S PE CI F ICATIO N S
C h ange information, if any, affecti n g t h
is section will be fo u n d at t h e
rear of t h e man u al .
T h e 2901 Time- M ar k Gene r ato r is αcom p act, wide range,

T he inst ru ment is pr ovi ded wit h
an
attac h e d t h ree-wire
soli d state inst ru ment t h at p rovi d es acc ur ate time and fr e-

p
ower cor d wit h α thr ee-termihal p ola r ize d p l u g to connect
qu e
n
cy ma rk e
r
s fo r cali br ati n g a n d verifyi n g both t h e swee p
to t h ep ower so u rce . T h e t h i r d wi re, d i r ectly connecte d to
time acc u racy of oscillosco p es a n d t he fre qu ency dis p ersio n

t h e instr u me n t f r ame, is i n te nd
e
d to g r o
u
nd
t
h
e
i nst ru me n t
of s p ect ru m analyzers . M ar k e rfr e qu e n cies a r e cont r olle d by

to p rotect op erati n gpe r so nn el, as r ecomme n d ed
by
natio n al
αtem p erat u re-stabilize d 10 MHz c r ystal

oscillato r .

M a rk er

an d international safety codes .
ou t p u t selections incl u de fou r sine-wave f r eq u e n cies (20 MHz,
100 MHz, 20O MHz, 50O MHz) an d sixteen ma rk e r intervals

The instr u ment s h o
u
l
d be o p
erate
d from αp ower so ur ce
( .1 Its to 5s) in 1-5-10 seq u ence . Α ma rk e r am p lifie r o u t put

wit h its ne u tral at o r
near
g r o
u
n
d (ea
r t h ) p
otential
.
It is
p rovides eit h er p ositive or negative-goi n g h ig h level mar k ers

not inte n ded for ope r atio nf r
om two p h ases of α mu ltip h ase
(1
Its
to
5 s)
wit h minim u m am p lit u
de of 25 V
into 1 k Ω .

E ig h t

system, or ac
r
oss the legs of α single- p h ase t h ree wire system .
,_
I _
ι Μ
-,_~_,_~_ α
σσ
α
σσσσσσσσ
σσο σσ σ
ρ
10 .3 i n c h es
F ig . 1-2 . 2901 d imensions .
t r igger i n te r vals ( .1 Its to 1 s) are also p rovi ded in 1-10 se-
quence time coi n cide n t wit h t h e ma rk e r s .
Dime n sio n s
are to t h e n earest 1/8 i n c h
Ι "

10 .9 inches
2901
3
i
nc
h
es
j

S p ecifications-2901
P erformance Conditions
C h aracte r istics desc r ibe d i n t h is section a r e valid over
t h
e
state d envi r o n mental r a n ge, fo r inst ru me n ts calibrated
at an ambie n t tem pe r at ur e betwee n +20°C an d +30°C .
Th e crystal oven
i
n
d
icato
r
on
t h e inst ru me n t m u st s h ow t h at
normal op e r
ating
tem
pe r at ur e has been attai n ed ( p ower
applie d for 2 h o u rs o
r more) . T h e i nst ru ment also r e qu i r es
at least α 30' min u te wa r m up pe
r
io d afte
rt h
e PO WER
switc h
is switc h ed on .
Time- M ark ers
Pe r io d s
Acc u racy
Stability
Am p lit ude
M A RKER O U
Tpu t
2 ns (sine wave)
5n s to 50 ns (sine
wave)
.1 μ s to 5 s (mar k ers)
M A RKER A MPL I F I ER
O
U T PU T
T R IGG ER O UT p u t ( .1 μ s to
1 s i n decade ste p s) .
Am p lit ude
ELE CT
R
ICA
L
C
HA R ACT ER
ISTICS
C h aracteristic
E XTe rn al C L OC
K
INPU
T
Req u ire d
Am p lit u
de
'Parts p
er million .
Performa nce L imits
0° C to 50 0C) .
W it h in 3 Ρ/ Μ in 24 ho u rs
(20°C to 30°C) at .1 μ s (10
MHz) after 2 h o u rs o p eratio n .
At least 0 .3 V peak to p ea k
into
50 Ω .
At least 0 .5 V p ea k
to

p ea k
i n to 50Q .
At least 0 .5 V p ea k to pea k
into 50 Ω .
Am p lifie d 5 s to 1 μ s p ositive
o r n egative-goi ng time mar k -
e r s . Am p lit u d e (5s to 5μ s
ma rk e r s) at least 25 V into 1 k Ω
loa d . A mp lit u de 1 μ s ma rk e r
at least 22 V i n to 1 k Ω loa d .
Positive-goi n g triggers at least
0 .5 V into 50 Ω o r 1 V into 1
ΜΩ , 150 pF .
At least 2 V pea k to p eak sine

Dimensio
n s
wave

o
r

at

least

2 V

p ea k
p u lse am p
lit u
de
.
C h aracte r istic
Maxim u m Safe In pu t
Am p lit
u de
F re q u ency Range
In p u t Imp edance
Sin u soi d al-2 n s,

5 n s,

10 ns,

Line Voltage
50 n s .

115V R ange
Pe r io
d ic
Pu lses- .1 Its to 5 s in

230 V R ange
1-5-10 se qu ence
.

C
r est F actor ( R atio :
Perio d wit
h
i n 0 .001
% (10 Ρ/
Μ 1,

Pea k /
RM S)
20 ° C to 30 ° C) .

L ine C u rrent
Perio d with in 0 .002% (20 Ρ / Μ '
Power
L ine Fre qu ency Ran ge
Fu se (115V and 230V
R anges)
Tem pe r at u re
O pe r ati n g
Non-operating
Altit u
de
O p
erating
Non-operating
F i n is h
W eig h t (net)
Pe r formance Limits
5 V (DC + p ea k AC)
50
kH z

o r

less

to

10 MHz .
L owe
r f r e qu e n
cies
may be used
if t h e p u lse r ate of
r
ise is e qu
al
to or faster t h an 1 V/ μ s .
50 Ω wit h i n 20% .
In p
u
t P owe r Requ irements
90
V to
136
V .
1 8 0
V
to
272 V .
At least 1 .3
240 mA maxim u m
30 watts
maxim u m, at 115 V,
60 Hz .
48 Hz to
440
Hz
0 .3 Α F ast-blow ty pe .
E
nvironmental C h aracteristics
Ph ysical
0°C to 50 ° C Ambient
-40 0 C to 65 0 C
To 15,000 feet
To 50,000
feet
Fr ont panel is a
n odized alu-
minum
A pp r oximately 8 l b s .
A pp
roximately 11 inc h es Χ
8 inc
h es Χ
4'/3
inc hes . See
F ig .
1-2

Intro d uction
Th e 2901 Time- M ar k Gene
r ator p r ovi d es acc u rate time-
ma rk ers f r om 5 s to .1 1 . ιs
intervals a n d sine wave fre q u encies
from 50 n s (20 MH z) to 2 ns (500 MHz) .
M a rk er i n tervals or
f r eq u e n cies may be selecte d by dep r essing
α se r ies of self
canceli ng p ush b u ttons . Time-mar k ers may be
stac k e d (not
u sef u l for sine-waves) by p ush ing t h e d esi r ed mar k
e r
b
u ttons
sim u lta n eo u sly .
SECTION
2
O PER ATI N G I N ST RU CTIO
N S
C h ange information, if any,
affecting t h is section will be fo u n d at
t h e
rear of t h e man u al .
ΝΟΤΕ
2901
T h e crystal oven i
nd icator lig h t is across t he h eater
win d ing for t
h
e
crystal oven . It mo n ito r s t he o p er-
ation of t he t h ermostat, and i
n
dicates
w h en t h e
h eater is on . The crystal oven
p
ower
is in d ep en d -
ent of t he P O WER switc h .
T r igger pu lses, from .1 Its to 1 s, coinci d ent wit h t h e co r -

FUN CTIO N O
F
CONTROLS
res pond ing time-mar k ers,
are available at t he T R IGG ER

A N D CONNECTORS
O U Tp u t connector w hen any of
t h e eig h t T R IGG ER S E -
LE CTO Rpu s hb u ttons are d e pr essed .

All selectors and connectors re qu i r e d
for normal op era-
H ig h am p lit u de (25V pea k to p eak , or g r eate r ,i
n
to
1 k Ω )

tio n
of t he 2901 a r e locate d on t h e front a n drear p
anels
mar k ers, p ositive-going or negative-going p ola r ity, f r om

of t h einstr u
ment ( F ig . 2-1) . T h eir f un ctions a r e described
1
Its to 5s
are available at t h e M A RKER AMPL I F I ER O U T-

i n t he following
table .
PU
T
conn
ecto r w h en t h e M A RKER A MPL I F I ER switc h is in
eit h e r t h e
-h
o r - p
ositions
.
M A RKER AMPL I F I ER switc h
s h o u ld be in t h e O FF p
osition w hen t h e am p lifier is not u se d .

M
A RKER
S
ELE
CTO
R

Self-canceling

p ush b u ttons,

t h at
select in d ivi d u al o r combinations
of time-mar k er
intervals and fre
q u encies, for t he M
A RKER OU T pu t
Installation

connector . M ar k ers up to
two
deca d es ap art may be stac k e d by
T h e 2901 instr u ment is p rovi ded wit h an
attac h ed th ree-

de p ressing t h e d esi r ed p u s hbu tto n s
wire powe
r cord with α t h ree-termi n al p
olarize d p l u g for

sim u ltaneo u sly (not a pp licable fo r
connectio n to
t h e p ower so u rce . T h e t h i r d wi r e is
d irectly

th e sine-wave fre qu encies) .
connecte d to
t he inst ru ment frame a n d is i n te n ded to gro un d
t h e i n str u me n t to p
rotect op erati ng pe r sonn el, as recom-

MA
RKER O U
Tp
u
t

O u t p u t for sine waveo r ma rk e r
men d e d by t h e n
ational an d inte r natio n al safety cod es .

per ί od s
SELECTORS .
selecte d by t h e M A RK-
Color co d ing of cord condu
ctors follows t h e N ational E lec-

ER S ELE TO R S . O u t p u t am p lit u de
trical

Code :

L
ine

cond u ctor-blac k ,

ne u t r al

cond u cto r -

of th e mar k ers, at least 0 .5
V p ea k
to
w
h ite, safety eart h (gro u n d ing) cond u ctor-green
.

p ea k into 50 Ω loa d .
T R IGG ER S ELE CTO R

Series of eig h t self-canceli
n g p u s h-
b u ttons t h at select o u
t pu t trigger
O p e r ate t h e 2901 f r om α p ower so u rce wit h its ne u tral

p u lses from .1 Its to 1 s in decade
at o r nea r ground (eart h ) p ote n tial . It is not i
n ten
ded
fo r
ste p s . Trigger pu lses a r e coi n ci-
op e r atio n f r om two ph ases
of α m u lti- ph ase system, or

dent wit h t h e corres po n d ing time-
across t h e legs
of α si n gle p h ase, t h ree-wire system . L ine

mar
k ers .
voltage r an ge, fo r t he 115V selector p osition, is 90V to

M A RKER A MPL I F I ER

Th ree p ositio
n
switc
h (-}- O FF -)
136 V

( n ot to excee d 177 V) ;

an d 180 V to 272 V ( n ot to

t h at

p rovi d es

am
p lifie d

p ositive
excee d 352 V) for t h e 230 V range of
t he line voltage se-

or

negative-goi
n g

time-ma rk e r s
lecto r p
ositions .

L ine fre qu ency ra nge is 48 Hz to 440 H z .

at

t he

O U T PU T

con n ecto
r .

Se-
iecte d mar k ers from 1 Its to 5 s
a r e
amplified
t h e ap p ro p riate line
voltage range for yo ur sit u -

m p lifie d to at

least 25 V

p
ea k
into 1 k Ω . Does n ot o p erate over
ation by switc h ing t h e screw d r ive r
o pe r ated L ine V oltage

t h e 2 ns to .5 Its

r a n ge .

Switc
h
selector
on t h e bac k panel (see F ig . 2-1) to t h e correct p
osi-

s h o u l d be i n t he O FF p osition
tio n , and p l ug
t h
ep
ower co r d i n to αs u itable p owe r so ur ce .

w h en t he am p lifie r is n ot u se d .
Allow two ho ur s fo r
th e
c
r ystal oven temperat u re to sta-
bilize (to mi n im u m d r ift), t h en t ur n t he P O
WER switc h to

O U T PU T

O u
t p
u
t
co
nn ector fo r t h e am p lified
ON an d allow 5 minutes fo r t h e i n str u ment to
warm up .

time-mar kers .
O u t p u t am p lit u de

O p erating
Instructions 2901
Ζ - Ζ
Fig . 2-1 . F ront and rea r- p an el selecto r s an d connectors .

O p erating Instructions- 2901
of

t
h
e

mar k ers

is

at

least 25 V

or less .

F re qu en
cies below 50 kH
z
pea k , i n to α 1 k Ω loa d .

may b e used if t h e rate of rise
O VEN Indicator

Indicates crystal oven h eati n g .

is 1 V / μ s . The 0 .1 μ s M A RKER
Crystal oven and in d icator p ower

SELE CTO R pu s hbu tto n is t h e Χ 1
a r e in d
ep endent of t h e P O WER

in pu t signal p e r iod, with t h e lower
switc
h .
Allow
approximately 2

order selector bu ttons co u nting
h o ur s, after
t h
e p
ower cor d h as

t h e in p u t p eriod d own in 1-5-10
been connected to αp ower so u rce,

seq u ence
to
t h e lo n gest
(5 s
pu s h-
for

th e

crystal

tem p erat u re

to

b utto n
) pe r
iod .
2 n s
to 50 π s sine-
stabilize . T h e i n str u ment can be

wave ma rk
er selections are in-
u se d wit h i n 5 min u tes after t h e

o p erative
with
an exte rn al sig n al,
P OWER switc hhas been tu rne d

u nless t h e in pu t fre q u e n cy is 10
on ; h owever, freq u ency stability

MHz .
will be r e d u ce d .

L I NE V O L TAG E Selecto r Sc r ewd r ive r o pe r ated switc h t h at
C L OC K ( ΙΝΤ - ΕΧΤ ) Switc h Selects eit h e
rt h
e
i n te r nal oscillator

selects tn r 90 V p r ima r y

0
V
-
-
(Rear P anel)

or an

exte rn al

signal as t h e f r e-

272 f
V
o r
ea
nominal
li
n e
-1
voltage
V or 180

-
q u e
n
cy
so u rce for t h e coun tdow n
2ltage op e r a-
tion .
circ u its .
ΕΧΤ C L OC K I NPU T

U se d for external oscillato r
sig nal
.
Connecto r Input imped ance a pp roximately
50Q . E xternal cloc k fre qu ency is

General O p erating Information
co u nte d down in α 1-5-10 se-
quence, to 50 χ10 6 times t h e in-

T h e crystal ove n temperat u re has stabilized w h en t he
pu
t p eriod . F req u ency range 50

O VEN i n dicato r cycles on a n d off at regu lar intervals .
kH
z
o r less
to at least 10 MHz .

Pe r iod of t h e cycle is abo u t 30 seco n ds, de p ending on t h e
R eq u i
r
ed
signal in p u t am p lit u de is

ambie n t tem pe r at ur e .
1 volt mi n im u m p ea k to p ea k
sine
wave to 5 V (pea k AC

+

DC)

Te r minate t h e ou
t p
u
t into
50
Ω for o p tim u m ma rk e r d ef-
maxim u m .

R
eset

level

+50 m V
inition and consistent
mar k er amplit u de .

NOTES

Intro d u ction
S
E CTIO N 3
CI R C U
IT D E
SC
R I PTIO N
C h ange information, if any, affecting t h is section will be fo u nd
at t h e
rear of t h e man u al .
T h is sectio n describes
t h
e
circ u itry u se d in t h e 2901 Time-
M ar k Gene r ator . Α bloc
k
d
iagram analysis is fi r st p rese n ted
to d esc r ibe t h e relatio n s h i p of eac h ma j o r circ u
it to t h e over-
all o p e r ation of t h e instr u ment .
Each ma j or ci r c u it is t h e n
d esc r ibe d in detail . T h e ob j ective of t
h is d esc r i p tio n is to fa-
miliarize t h e rea d er s u fficiently wit h t
heinst ru me n t circ u it
t h eo r y to enable t h e tec h nician to tr
o
u
bles h oot, calibrate,
and
o p e r ate t h e instr u ment .
Fu nctional bloc kd iagrams an d sim p lifie d sc h
ematics are
incl u d e d
in t h is sectio n to h el p ill u strate ci r c u it op
eration .
Detaile d
circ u it diagrams are p rovi de d in t h e
Diagrams
section .
Oscillator
2901
te r nal 1O MHz freq u ency so u rce .

The cloc k fre q u ency is ap-
plied to α freq u ency do ub ler containing Q25 and Q27
for
t h e first m u lti p lication . O u t p u t from t h e first m u lti p lie r is
t h e n app lie d t h ro u gh t h e 50 ns M A RKER SELE CTO R switc h
to α freq u ency q u int u p ler, containing Q35 an d Q37 . T h e
res u ltant 100 MHz signal is am p lifie d by Q50 and t h e n ap-
plied t h ro u g h eit h er t h e 5 ns or 2 ns M A RKER S ELE CTO
R
switc h es to α fre qu ency do u ble r (co n taining Q57 an d Q59)
for 5 ns sine-wave p erio d o r to α fre q u ency g υint u p ler
(containing Q75 a n d C R 71) fo r 2 n s sine-wave p erio d . Inter-
mo du lation d isto r tio n is mi n imize d by t h e switc h arrange-
ment so
t h
at only
t h
e minim u
m
nu
mbe r of m u lti p lie r s are
o p erating at one time .
B loc k Diag
r ams

T h e oscillator d erives its stability an dacc ur
acy f r om α
Th e
2901 Time- M ar k Gene r ator consists of α series of

tem p e r at u re stabilize d 10 ΜΗτ
crystal,
conn
ecte
d
betwee n
coun ter circ u
its an d fre q u ency m u lti p liers . T h e co u nter ci
r -

t h e collector an d emitter of Q5 .
T h
e
se r ies mo de of t h e
c u its are cloc
k ed by an exte r nal sig n al so u rce or t h e
inte r nal

crystal is u se d to p r ovi de t h e p ositive fee d bac k
for oscilla-
10 MHz
crystal controlle d oscillato r .

Α b loc k d iagram (
F ig .

tion . C8, in series wit h t h e crystal, pr ovi d es α small
f r
e qu
e n-
3-1) ill u strates t h e op
erational seq u ence of t h e ma j or ci
r -

c γ
correction a d ju stment to pull t h e se ries r eso
n
ant
f r e qu en-
c u its in t h e 2901 .

cy of t h e crystal to an exact 1O MHz .

L 5 p l u s t h e series
cap acitance of C6 a n d C10 t u nes t h e collector of QS for
Wh en t h e C
L
OC
K selector is in t h e ΙΝΤ p osition, t h e crys-

stable oscillator op eration . Tem p erat u re com p ensation
for
tal oscillator fre quency of 10
MH z is a pp lied to αdo u bler for

Q5
is p rovi ded by fee d bac k resisto r R3 an d d io de C R l

in
20 MHz (50 ns) t h en t h ro u gh
in dep e n d ent switc h es to m u
lti-

series wit h R l, from t h e base of QS to g r o u n d .
p liers ; fo r 10 ns, 5 ns, and 2 ns
mar k er i n tervals . T h e oscillator
or cloc
k fre qu ency is also a pp lie d to coun
t d own circ u its for

T h e o u t p u t signal from t h e oscillator is am p lifie d by Q13 .
t h e
time-mar k er p erio d s .1 I ts to 5s .I
n tergrate d fli p -flo p ci r -

L13 (i n t h e
collector loa d circ u it of Q13) is ad ju ste d to t un e
c u
its
coun
t t h e basic .1 ;a .s (10 MH
z)
cloc
k pe r io d d own by 5,

t h e ou
t p
u t circ
u it of t he am p lifier to 1O MHz .
t hen by 2, to
t h e longest (5s) mar k er interval
. Pu s h b u tton
(M A RKER S
ELE CTO R) switc h es apply t h e
o u tp u t from t h e
co u nters to
t h e O UTp u t connecto r , t hr o u ghan
. ou t pu t am-

Mu lti p liers
p lifie r . Time-mar
k
ers
1 μ s a n d below are am p lifie d to an

T h e fi r st m u lti
p lier is α p u s h- p u s h am p lifie r designe d to
am p lit u d e of at
least 25 Vp ea k by t h e mar k er am p
lifie
r w
hen

do u ble t h e
i
npu t fregency .

Transformer Τ 22 co u p les t he sig-
t h e M A RKER AMPL
I F I ER selector is switc h ed to eit h er t h e
+

ηαΙ , in p h ase o pp osition, to
t h e bases of Q25 an d Q27 . T h e
or - p osition . Th ese h ig h
level mar k ers, of eit h er - Ι - or
p ola r ity are d elivere d to th
e O U Tp u t connector .

collectors a r e co nn ected in p arallel to α t uned o u
t pu
t circ
u it
-
co n sisti n g of L28 and C29 i n series wit h C30 . L28 t u nes t h e
Time-mar k i n tervals, in
d eca d e ste p s, f r om

1 s to .1 Its

collector ci r c u it to 20 MHz .

R25 ad ju sts t h e d ynamic
bal-
are also a pp lie d t h ro ug h TR IGG ER SELE
CTO R p u s hbu tton

a n
ce
of t h e am p lifier an d red u ces t h e intermo d u lation d is-
switc
h es an dα b u ffer am p lifier stage
to t h e TR IGG ER O U T-

to r tion from t he 10 MHz f un damental .

B ias voltage is αρ -
p u t connecto r . Th is p rovi d es trigge
r pu lses t h at are coinci-

p lie d to t h e am p lifier inp u t from t he M A RKER SELE CTO
R
de
n
t
wit h t h e selected time-mar k ers .

switc
h ing
circ u
it (see descri p tion of M ar k er Am p lifie r a n d
Selecto r Switc
h ing circ u it) so t h at t h ed o u bler is d isabled
w
h
en any
selection .1 Its an d below is ma d e .
D E TAI LE D CI RCU IT D
E
SC
R I P TIO N

T h e second m u ltiplier for t h e 2901 q u i n t up les t h e 20
ΜΗτ
i npu t f r eq u e n cy to generate 10 ns sine-wave p e r io d s .

Q35
Oscillator an d ΜυΙ t ί

ι ers

an d Q37 are conn
ected as active com ponents fo r α push-pull
(
R efer to Diagram

)

am p lifier
wit h th ei r collector loa d s t u ne d , by C39 an d C43, to
t h e fift h h a r mo
nic of t h e20 MHz in p u t .

T h e in pu t a n do u t-
T h e cloc k
(base) fre q u ency fo r t h e fregency
m u lti p lie r s m u st

p u t ci r c u its
for am p lifier Q50 are t u ne d to 100 MH z by C47
be t h e i n te r nal
crystal cont r olle d 1O MHz
oscillator o r
on
ex-

an dL50 .

T h e
series r esonant filter ci r c u it C47 a n dL 47 are

Circuit Description-2901
Fig
3-
1 .
Functional block diagram .

t u ned to 100 MH z a n d pr
ovide α low impedance path fo r
Low-- - Α voltage level, u s u ally d esignate d as t h e less
p os-
100 ΜΗτ to t h e base of am p
lifie r Q50 an d h el p s s upp ress

itive
of two logic levels .
s u b and m u ltiple h armonics
of 100 ΜΗτ . T h e collector load

ΝΑΝ D- Α logic f
u nctio n w h ic h is an A
ND
f u nctio
n with an
for Q50 consist of t h
epa r allel reso n ant circ u it, L 50 and C51
inseries with C52,
t un e d to 100 MHz .
inve
r
te d o u tp u t
.
T h e 5 ns mar k er ge n erato r co n sists of Q57 an d Q59 con-

One

(11) -A symbol for t h e T RUE (activate
d ) state .

Αη -
necte d as t h e active com p onents of αpu s h- p u s h am p lifier

ot h er title
fo r t h e Q o u t pu t termi n al of
α
fli p
flo p . Th is o u t-
or fre qu ency do u ble r . T h e collector loa d for t h is d o u
bler is

p ut represe n ts t he T RUE state w h e n t
he fli p flo p is set .
Τ62 in p arallel wit h t h e se r ies combination of C60 an
d C61
.

P
ositive L ogic- Α system of logic level
i d entification
T h e o u t p u t circ u it is t un ed to 20O MHz
by C60 .

w
h
ere t h e mo r e p ositive level is ide n tifie
dasα logical ONE
T h e

2 π s

ge n erator qu int u p les

t h e

in p u t

100
MHz

(10 π s)

(1),
a n d t h e less p ositive level
as
α
logical Z ER O (0) .
fre q u ency to ge n e r ate t h e 500 MH z (2 ns) mar k er fre
qu e ncy .

Set-To p lace α storage d
evice i nαp rescribe d state . To
T h e in pu t to t h is m u lti p lie r
is
α
series t uned circ u it, L 66 an d

p
lace α fli p flo p in t h e
ONE
state
.
C6 6, t uned to 100 MH z . T h
is
filter
circ u it co u p les 100 MH z to
t h e h armonic gen e r ator C R 71 and
isolates t h e h armonic gen-

Toggle-To ca u se α fli p flo
p to complement its o u t pu t
erator from t h e o u t pu t ci r c u it
fo r t
he 10 n
s m u lti p lier .

C R 71,

state .
α ca pacitance d io d e, ge n e r ates
hig h or d er h armonics of t h e

Tr u e-T h e activate d state
of α logic circ u it in p u t or ou t pu t .
100 MH z in p u t signal . Un d esi r
able seco n da n d t h ir d or d er
ha r monics of t h is
100
ΜΗτ
are filte r ed t h ro u gh two series

Zero (0)- Α symbol for t h eF A LS
E (non-activated) state .
t u ne d circ u its consisti
n g of L 67-C67 (300 MH z) an d L 69-C69

Anot h er title for t h
e Q o u t p u t terminal of α fli p flo p . Th is ou t-
(200 MH z) .

T h e fift
hh armo n ic, o r 500O MHz is t h en filtere d

pu t p resents αF A L
SE state w hen t h e fli p flo p is set .
th ro u gh series circ u it L72 a n d C72, to t h e base of o u t p u t am-
p lifier Q75 . T h e ou t pu t load fo rt h e am p lifier is t u ned to
500

L
ogic symbols ( P ositive logic)
MH zb y stri p li n e filte r C79and L79 . Ca p acitors
C75
an
d C73
are ad ju sted to mi n imize inte r mo du
lation d istortion in t he
ou tp u t 50O MHz ma rk e rfr e que n cy .

-is-
Divi d er or Co u nt d own Circ u its
The d ivi d er circ u its coun t d own t h e i n te r
nal 10 MHz ( .1 μ s)
crystal oscillator fre q u ency, or
an
exte
rn al cloc kf r equ ency, in
ste p s of 5 an d 2 . Th
e
co u nt d own
circ u its are se p arate d into
two d iagrams ; t he μ s Divi
d
e r
s, and t h e ms an d s Divi d ers
Circuit Desc r i p tio n
-2901
Τ
οι ε

012
N
AND

Inverter

JK F li p flo p
Gate

Gate Device
Definition
of Te r
msand L ogic Symbols U se d

M
icrosecon d Divi d ers ( .1 μ s to 50
μ s)
in
this
Descri
p
tion

I n
tergrate d circ u its are u sed extensively
in t h e cou nt d own
or
divi de r circ u its for the 2901 Time-
M a rk Generator . The
d iv
Irated i de
r
e r
circ u
its
circuits u its
t h e
(IC's) a
2901
re
Time-Mark
t he
Generator
.
own
T h
e
or

μ s d ivide r s contain JK fli p flo p
s,
i nve
r ters an dN AN D gates .
following is α d efinition of t h e terms and logic
symbols
u sed i n
t
h e d esc r i p tion of t h e logic d iagrams for t h e co u nt-

NOTE
down ci rc u its .

L ogic data on t he IC's u sed in t
h is circ u it are p ro-
A N D- Α logic f u nction w h ic h re qu ires all in p u ts
to be

vi ded in t he M aintenance
section .
TRUE fo r t he o u t p u t to be T RUE .
Th e IC's fo rt h e .1 its to
10 is d ivi d ers are connecte das
Cloc k - Α sig n al so u rce w h ic h establis h es t h
e
time
intervals

semi-sync h rono u s d ecade coun
ters . T he 10 μ s to 50 P s cou nt-
at w h ic h logic f un ctions occ ur .

er is conn ecte d fo r αcoun
tdown of five . L ogic
and wave-
F alse-T h e non-activated state of logic
circ u it, i npu t or

form d iagrams pl u s tr
u
t hs
tables for t h ese devices
are s h own
output .

in F igs . 3-2 t h ro u g h
3-5 . Sy n c h rono u s co u nters a r
e used fo r
t h eh ig hfre
q u ency coun ters to minimize p ro pagation
d elay
Flip- F lo p -A bistable d evice (capable
of ass u ming one of

between
t h e in p u t cloc k and t h e ou t p u t
co unt d ow n pu lses .
two stable states),
whic
h
may ass u me αgiven state depend -

T h e inverters
U 101, U 110 and U130 are use
d as p u lse
i n g on th e h isto r y of
one
or
more in
p
u ts . T h e device will

s h a p
ers, inverter gates an d time delay
circ u its for h ig h fr e-
h ave one or more o u t pu ts w h
ic
h
are d escribed by t h e fol-

q u e n cy
time-mar k ers . T h e s h ort p erio
d ( .1 μ s to 1 μ s) time-
lowi n g t ru t h table .

mar k ers are delayed
so t hey coinci
de wit h t h e lower fr e-
J 

Κ 
IQ,,,

T h
e JK
fli
p flop may be cloc k ed or

q
uency ma rk e r s .
0

0

Q


u ncloc k
e d . In t h e cloc ked mo d e, t h e
fli p flo p
switc h es (accor d ing to t h e in-

In pu t
an d O u t p u t Circ u it for .1
~
ιs
to 10 Its
p u t settings) w h en α cloc k p u lse is
0

1

_0

a pp lie
d . Wh en t he fli p flo p is u se d

Counters
1

1

Qr,

witho u t cloc k pu lses, t he o u t pu ts re-

Input cloc k p u lses from th e 10 ΜΗτ
oscillator (or exte r nal
s pond to any c h ange at t he in p u ts .

sig nal
so u rce) are s h aped into
s qu are-wave p u lses by t h e two
3-3

Circuit Description-2901
3-4
ς 1

ς

C

1

0
Η Η Qn
0 η
Τ FF

Η

L

Η

L
L Η L Η
L L
Qn
0
η
C0
Q n is the tr u e state of 1 o ut pu t, i n th e time periodt o whe n
th e FF is set .
sy m bol indicates t h e device is se n sitive to t h e n egative

Q n is t h e co mp le m e n ta r y o r false state of t h e o u t pu t du r i n g
t r an sition of t h e i np u t
pulse .

t h e ti m e p erio d t n .
F ig . 3-2 . T ru t h table fo r Ty pe M C 890Ρan d M C
891P
d u al JK fli p flo p
IC's . Device toggles dur ing negative t r a n sί stio n of t he cloc
k p u lse
w h e n bot h 5 (set)

an d C (clea r )

in pu ts are low .
i npu t i nve r ter gates, U 101D and U 101 E . T h
ep
u lses
are t h e n 3 . W it h bot h in p u ts to N AN D gate
U 125A h ig h , t h e o u t-
a pp lie d , t hr o u gh
emitte
r
follower Q106, to th e i n p u t of t h e

p u t of t h e N A N D gate is
low .
T h
is o u t p u t is i n ve r te d by
fi r st coun tdown ci r
c
u it and
t
h
edelay
inve r
ters (t h ro ug h U l0A

U 125B to p ro d u ce α h ig h at t h e
S
in p
u t of U 140A .
and U 10 B ) to t h e .1 μ s o u t pu t ci r c u it . Th
e o u
t p
u t, .1 μ s p u lses
fr om i n ve r te r
U 10
B ,is
co up le d t h ro ug h αd ifferentiating cir-

4 .
Th e 1 o u t pu t (pin 14) of
U 140A stays hig h a n d U 140B
c u it (C111, R 113
and
R 114) to
t he base of emitter follower

h ol
d s its low state at t h
e0
( p i n
8) o u t p u t .
Q116 . T h
e
time constant
of t
h
is differe n tiati n g ci r c u it is s h o r t,

At t

,, t he next cloc
k pu lse p ro d u ces t h e following
so α s h ar
p ,
na rr ow ma rk e r signal is a pp lie d to t h e o u t pu t

c h anges :
am p ilfier Q116 .
All of t h e o u t pu t emitter followe r s for t h e time ma rk e r s are
b iased at t h e t h res h ol d of con d u ctio n . T h e r efo r e, only the
p ositive p ortion of t h ed iffe r entiate d signal is co u p le d t h ro ug h
t h e emitter followe r s to the M A RKER S ELE CTO R switc h an d
t h e TR IGG ER S ELE CTO R switc h .
.5 [ . ι s to 10 tks Dividers
Α tr u t h table for one h alf of t h e d u al 1 Κ fli p flo p u se d in
t hese cou nt d own circ u its is s h own i n F ig . 3-2 . T h
e
JK fli p flo p
will toggle (c h ange state), d ur ing t h enegative transitio n of
t h e inp u t cloc k p u lse, w h en both t he S (set) and
C
(clea r )
terminals are low . Th e tr u t h table also s h ows t h at t h
e state of
t h e o u t p u ts does not c h ange w hen t h e
S
a n
d C
te r
min
als
are h ig h .
Logic an d wavefo r m la dd
er
d
iag
r
ams for t h e fi r st two
decade co u nters
( .1 Its
to 10 μ s) a r
e s
h
ow n in F
ig .
3-3 .
T h e .1 Its cloc k p u lse is a p p lie d sim u lta neou sly
to t h eΤ
(toggle) in p u t of eac h JK fli p flo p (
U 120A, U 120B
,
U 140A
and U 140B ) . F o r o p e r atio nan alysis,
ass um e at to all t he 1
o u t pu ts are h ig h as ill u st r ated on t h
e ladder d iagram .
At t, t h e fi r st negative t r ansition of
t h e i npu t cloc k pu lse
p rod u ces th e followi n g eve n ts .
1 . U 120A toggles beca u se bot h i npu
ts S ( p i
n1)
an d
C (p i
n
3)
a r
e low .
T h
e
1 ( p in 14)
o u t pu t ste p s low .
1 . U 120A
again toggles and its 1 ou t p u t ste p s h ig h .
2 . U 120B
toggles beca u se its S an d C in pu ts are
now
b ot
h
low . Th e 1 o u t p u t ( p in 9) of U 120 B goes low .
We now
h ave
α h ig h and low in p u t to t h e
N
A
ND gate U 125A .
3 . U 140A an d U 140 B o u t pu ts remain in t h
e
same state
as existe d at t
n
.
At fn

2 t he next negative transitio n of t h e cloc k p u lse
p
r
o-
d u ces t h e following c h anges :
1 . U 120A toggles and its 1 o u t p u t ste p
s
low .
2 . U 120B h ol d s, beca u se its S and C in pu ts
a
r
e h el d h ig h
by t h ep revio u s o u t p u t state of U 120A .
3 . B ot h inp u ts to t he
N
AN D gate a r
e now low . So the S
in p u t U 140A is low .
4 . U 140A h ol d s its state beca u se its
S
i n p
u
t
was
h
ig h
w h e n t h e cloc k p u lse occ u rre d . Th
e state of U 140 B remai n s
unc h a n ge d .
At t, 3 t h
e
followi n g eve n ts occ
u
r :
1 . U 120A toggles .
2 . U 120 B toggles beca u se i n pu ts
S
a n
d C are now bot h
low .
2 .
U
120 B h ol
d s
its
h
ig h ou t pu
t state beca u se its S an d 3 . U 140A now toggles an d its 1 o u t p u t ( p in 14) flo p s low .
C
i npu
ts
a r e h ig h .

T h
e 0 o u t p u t ( p in 13) steps h ig h .

U 120A
14
S
1
Cloc k Inp ut
10
MH z
Α . Sy n c h ro no u s Deca de .1 μ s to 1 μ sd ivi d er .
Cloc k
U 120A (S)
U 120A (1)
U 120 B (1)
U 125A (Pin 3)
U 140A (S)
U 140A (1)
U 140 B (0)
Diff
.
W aveform
Β . W aveform la dd er d iagram .
C 0

S 1 9
1 2
ΤU
125A
C 06
U 125 B
U 140A
5
1

14
S 1
=5OUTPUT
ΤU
140 B
13
C 0

5 S 1
Τ
F ig . 3-3 . L ogic a n d waveform la dder d iag r am fo rt h
e .1 /is to .5 μ s and
1 μ
s to 5 Its d ivide r s .
Ci r cu it Description-2901
7

C

0

=10 OUT PU T
t
π +1
t
η +2
tπ
+3 tn+4
tπ
+5 tn+6 tn+7 tn+8
t
π +9
tn+10
tn+11 tn+12 tn+13
t
π +14 tn+15
3- 5

Ci rc u it Desc r i p tion-2901
3- 6
s 1
10 μ s

Τ FF
Cloc k

Ι

U 180 Β
Α . L ogic d iag r a m .
10μ s Cloc k
Pulse (P i n 2)
U1 BOA
(1)
U 180 B (1)
U 185 (1)
U
185 (0)
10C
Input
0188
O u tp u t
Β . L a dde r diagra m .
αε οs
1
Τ FF

Ι
Ug
Ι U125D
CA s

112
Τ
FF
α C

010

0 50 μ s m a rk ers
χο
t
η
tn+1 tn+2 tn+3
t
n +4 tn+5 tn+g tn+7
t
η +8
t
π +9 tn+10 tn+11 tn+12
F ig . 3-4 . L ogic and la dd e r diag r am fo r t h e 10 Its to 50 μ s d ivi de r s .

U 210A
cis

110 --~-~ Τ
F IF
Circuit Description-2901
=2 O u t pu t
U 200A

ν

L
L 1

10
δ

1

Τ FF

C

0

Output
50 μ s

U 200 B
Cloc
k Pu lse
Τ
FF

S

1

~C

0
t
o
Cloc k I npu t
U 200A (1)
U
200 B (0)
U 210A (1)
U 2108 (0)
Diff
O u t pu t
ΟΙ C 0
K>--------
Ι Τ
F F
Α . L ogic d iagram of deca d e co un te r i n 50 μ s to 5 s co u nters .
t
η +1 t η +2
t
π +3
t
η
+4
t
η +5
t
π +6
tπ
+7
t
π +8
t
η
+9
t
π +10
t
η
+11
t
π +12
t
η
+13
t
η +14
Β . W aveform lad d er d
iagram .
DC ορ
F ig . 3-5 . Logic and
wavef σ rm d iag r a m fo r
millisecond a nd seco
nd
dividers .

Ci rc u it Descri p tion-2901
4 . U 140 B o u t p u t state does not c h ange beca u se α h ig h
3 . U
210A
toggles d u ri ng t h e n egative transistion of t he
existe d on t h e S and C i npu ts w h en t h e cloc k pu lse ar r ive d .

1 ou t p u t
from U 200A . In pu ts S and C a r e bot h low ; t h ere-
fore, 210 Α ou t p u t fli p s to α h ig h state .
At t 4 t he followi n g occ ur s :
1 . U 120A is in h ibite d by t he h ig h on its S inp u t from t he
0 o u t pu t of U 140A . T h e 1 o u tp u t U 120A remains h ig h .
2 . U 120B o u tp u t remai n s h ig h .
3 . Th e 1 o u t p u t of U 140A fli p s h ig h , beca u
se
it h as αh ig h
1 . U 200A again toggles . T h
e
1 o u tp
u
t fli p
s h ig h a n d t h e
on its S i n p u t .

0 ou t pu t ste p s low .
4 . U 140B will toggle beca u se bot h inp u
ts S
and
C are low .
T
h e
fi r
st deca d e co u nt h as now starte d . T h e r emai n ing se-
q u ence of
events fo r t
he co
u nt d own operation is ill u strate d
on
t h
ela
dd er d iag r am .
F ig . 3-4 . ill u strates both logic and
waveform lad d er d ia-
g r
ams for t h is d ivi de by five co u nter
.
The seq u ence of oper-
atio n is very similar to co u nt d ow n of five by t h e .5 μ s to
10 μ s co u nt d own circ u it .
M illisecon dand Secon d Divi d ers
4 .
U 210 B will not c h ange b eca u se t h e cloc k in p
u
t p
u lse
t r an sistio n from U 210A (1 o u tp u t) is p ositive-going .
At t o , t h e n ext negative t r an sition of t h e
cloc
kpu lse
ar-
rives and t h e followi n g
events occ ur
:
2 . U 200B now toggles
beca u se t h e cloc kp u lse from t h e
0 o u t p u t of U 200A is n egative going
an d its S in p u t is h el d
low by t h e 0 o u tp u t ( p i n 8) of
U
210 B .
T h e 0 ou t p u t of U 200B
ste p s h ig h .
3 .
U
210A
an d U 210 B h ol d t h eir p revio u s states .
W
it h t h e arrival
of t h e next cloc k pu lse at t, Ζ t he follow-
ing events occu r :
1 . U 200A again toggles .
2 . U 200 B h olds beca u se its i n p u t sig n al from U 200A
is
Integ r ated ci rc u its co n tai n ing JK fli p flo p s are also u se d

α
ρο s ί t ίν e-g οίη g irons ί t ίοη at t h is time .
i
n t he co un t d own o r divider ci rc u its of t h is section . Divi d ers

3 . Th e C i np u t to U 210A is h el d hig h by t h e
0 ou t pu t of
for eac hd eca de a r e identical ; t h e r efore, t h ed esc r i p tion of

U 200Β .

Its 1 o u t pu t will ste p low .
one a pp lies to any i n t h e g r o u p . Α logic d iag r am p l u s
waveform la d der ill u stratio n are s h own in F ig . 3-5 .

4 . T h e negative-going transition from t h
e 1 o u t pu t of
Th e coun t d own of two fo r t he even n u mbere d mar k er se-

U210A toggles U 210B . T h e 0 o u t p u t of
U210B
ste p
s h ig h
lectio n s is ta k en fr om t h e 1 o u t p u t ( p i n 14) of t h e first JK

w
hic h generates t he first step f u nction from 0 o
u
t
pu t of
fli p flo p in t h e decade co u nte r . T h e JK toggles d ur ing t h e neg-

U 210Β .
ative t r an sitio n of t h e in pu t cloc kp u lse beca u se its S an d

Th e coun te r h as
now cycled a
n
d is rea dy to perform its
C in p u ts a r e bot h low . T h e coun t d own of five f u nction is

function as αco
u
nt
d own of two-co u nt d own of five co u nter .
performed by t h e r emai n i ng JK fli p flo p s i
n
t
h e co u
nte r .

The
wavefo r m
la dd e r diag r am ill u st r ates t he events as th e
T h e o u t p u ts from t he co u nters are amplified
by inverters

co u nt d own
is p e r fo r me d .
and co u p le d t hr o u gh d iffe r entiating R
C circ u its, to t h ebase
of an emitte r follower . T h ed ifferentiator time
constant is

M a
rker Am p lifier and Selector Switch i ng
a p p r oximately
5% to 10% of t
he
in p u
t
s quare wave d u ty
facto r . T h e emitte r followe r
is biase d at its t h res h old of

T h
is circ u
it
contai n s t h e ma rk e r am p lifier, t h e M A RKER
condu cto n , w h ic h cla mp s t he n egative
po r tion of t h e d iffere n -

S ELE CTO R p u s hb u tton switc h es, T R IGG ER S ELE CTO Rp u s h-
tiate d wavefo r m
near g r o u n d . Only t h e positive portion

b u tton switc h es and o u t pu t am p lifie r s . T h ese circ u its s
u pp ly
of t he i npu t
wavefo
r
m a pp ea r s at t h e o u t p u t of t h e emitter

time-mar k e r s and trigger signals to t h e front pan
el
M
A
RKER
follower . Α s u mmi n g
r esisto r between t h e emitter an d t he

O U T and T R IGG ER O U T con n ecto r s .
M A RKER
S ELE CTO R switc h pe r mits ma rk ers to be stac k e d
(more t han
one ma rk e r selecte d ) at t h e ma rk er o u t pu t .

T h e t r igger selector switc h es are d
u al con tact, two p osi-
tio n switc h es . One set
of contacts closes t h e circ u it between
T
h e waveform la dd er d iagram in F ig . 3-5 ass u mes
an
i n i-

t he mar k er generating
circ u it a n d t he emitter follower o u t-
tial state at t o as follows : O u t pu t 1 ( p in 14) of U 200A hig h ,

p
u t stage,
w
h ile
t h e ot h e r p air of contacts enables or dis-
ou t p u
t
0 (pin 8) U200B low, o u t p u t 1

( p in 14) U 210A low,

antes
t
he 50 ns (20 MHz) f r equ ency m u lti p lier an d t h e mar k -
a n d o u t pu t 0 of U 210 B low . Any condition may be as-

er am p lifier .
s u med if d esi r ed ; h oweve r , after α few cycles t h
ecou
nter
will

ass u me

α

d efi n ite

p attern .

T h is

waveform

p attern

Pu s h ing any o n e of t he .1 μ s to 5 s p u s hbu
tton M
A
RKER
ill u strates t h e co u ntdow n actio n and is d escribe d as follows :

SELE CTO RS conn ects t h e -30V s u p ply t hr o u g h
αvoltage
divi d e r to t he ce n ter ta p of t h e co u pling transformer
Τ 22, in
D ur ing t h e negative transition of t h e fi r st cloc k pu lse (t )

t h e i npu t circ u it of t he Sons (20 ΜΗτ ) m
u lti p lie r stage . T h e
t he followi n g events occ u r :

increase d bac k bias d isables t he m u lti p
lie r , and beca u se
t he s u bsequ ent 10 ns, 5 ns, an d 2 ns m
u
lti p
lie rs d epend on
1 . U 200A toggles beca u se bot h in p u ts (S and
C)
are
low .

t h e o u t pu t of t h e
50 n s m u lti p lier for t h eir sig n al, t hey are
T h e 1 o u t p u t flo p s low an d t h e 0 o u tp u t fli p s to αh ig h state .

also d isabled .
2 . T h e o u tp u t state of U 200 B remai n s un c h a n ged
beca u se

W it h
all

of t h
e .1 Its to 5 s selecto r s d isengage d , bac k
t
h e in pu t signal to t h e " Τ " terminal was p ositive-goi n g .

bias is removed
from t h e t r a n sfo r mer center tap a n
d t h e
3- 8

50 ns m u
lti p
lie
r
is e
n
abled
.

All
h ig h f r eq u e n cy m u lti p lie rs

Input
am p lifie r
Q330 has αgain of a pp r oximately 25 .
will nowop e r ate w h en t h e a ppr o pr iate pu s
hb
u tto n selecto r Dio de C R 325 p r ovi d es temperat u re compensation for tr an-
is dep r esse d .

sisto r Q330 .
Th e emitter ci r c u it of i np u t am p lifie r Q330 i n t he M ar k e r
Am p lifier has no ret u r n t hr ou g h t h e switc h to g r o un d ; t h ere-
fore, t h e am p lifie r is disable d . De p ressi ng eit he r t h e .1 μ s
or .5 μ s pu s hb u tton a pp lies bac k bias t h ro u g h R 335 to t h e
5 ns m u lti p lier, w h ic h d isables t h e sine-wave m u lti p liers .
In p u t am p lifier Q330, h owever, is still bac k -biase d so t h e
mar k er am p lifier is h el d ino p erative u ntil α 1 μ s or lower
M A RKER S ELE CTO R bu tton is d epresse d .
Wh en any selectio n of 1 μ s or lower is ma d e, t h e -30 V
supply is a pp lie d t h ro ug h t h e + and - p osition of t h e
M A RKER AMPL I F I ER selector switc h S300 to th e emitte
r
of Q330 . T h is forwa r d biases the t r ansisto r a n d t h e am-
p lifie r ci rc u it nowo p erates to am p lify selecte d time-ma rk ers
to an am p lit u d e of 25 V pea k o r mo r e, into 1 k Ω loa d .
E it h er p ositive o r n egative-goi ng ma rk e r s ca n be selecte d
by t h e M A RKER A MPL I F I ER switc h S340 .
M ar k er intervals from

1 μ s to 5 s, selecte d by M A RKER
SELE CTO R switc
h
S300, are a pp
lie d t h ro
u
gh ope r atio
n al
am p lifie r Q312 a n d Q317 to t he base of i npu t am p lifie r Power S u pp ly
Q330 . T he am p lifie d mar k ers a r e th en app lie d d irectly (as
negative-going
sig nals) or inve
r ted by Q330 (for p ositive-

T h ep ower s u pp ly consists of two reg u late d DC voltages,
goi n g sig n als) to α com p leme n ta r y am p lifie r stage co n tai n -

-30
V and +3 .6 V . Circ u it d etails for t he s u pp lies a r e s h ow n
ing transistors Q345 and Q347 . T h e com plementary am-

on t he Powe r S u pp ly d iag r am i n Sectio n 8 .
p lifier provi d es am p le c u rrent o u t p u t to d rive th e ad d ed

P
ower for t h e regu lator circ u its is s u pp lied from two f u ll
ca pacitance of most coaxial cables t h at may be attac hed
wave bri d ge rectifier p ower s u pp lies connected across sec-
to t h e O U T PU T connecto r . T h e rise an d fall-time of t he

ondary taps of α single transformer, Τ 403 . T h ese reg u lators
time-mar k er p u lse is t hu s p rese r ved . T h e ou t pu t mar ke r s

will maintain αco n stant o u tp u t with
AC
in p u t fl u ct u ations
f r om t he emitte r s of t h e com p leme n ta r y am p lifie r a r e DC

of 90 V AC to 136
V AC
o r
180 V AC
to 272 V
AC .
T h
e pr
i-
coup
le d to t h e O U T PU T conn ecto r for negative-goi ng
ma
rk -

mary win d ing
to
Τ
403 con sists of equ al wi n d i n gs w h ic h may
ers and AC co up led fo r p ositive-goi n g ma rk e r s . Diode C R348

be
connected
in pa r allel by 5403 (L I NE V O L TAG E selecto r )
is α DC resto r e r and clam p s t
h
e ou
t p
u t of t h e AC co up led

for
115V AC o r in se r ies fo r 230V AC i n p u t p owe r .
signal nea r g r o u n d p otential .
ei n
R 314
_ Ι 0312
0317
R
i
R
f
ΛΛΛ
^
R 316
R i+
R f _ e ο
R i ein
θο
F ig . 3-6 . Simplified d iag r am o r equivalent ci r c u
it
fo rt
h
e output
amplifier for
t he
.1 μ s to 5 s time
ma rk
e
r s .
Circuit Descri p tion-2901
T h e TR IGG ER S ELE CTO R pu s h bu tto n s apply t h e .1 μ s to
1 s mar k e r s, i n d ecade ste p s, to t h e base of an emitter fol-
lowe r Q366 . Q366 s u pp lies t he c u rrent d rive for t h
eT
R IG-
G ER
O U
Tcon
nector . R esistor R 366, between
t
h e collector
of
Q366
and t he
+3 .6V s u pp ly, is αcu rrent limiting resistor .
T h
e o u t pu t am p lifie r (0312 and Q317), for t h e .1 μ s to
5 s time-mar k ers, is con fig u re d as an ope r atio n al am p lifie r
to provide α low im p e d ance c urr en t so ur ce fo r t h e M A RKER
O U T conn ector . I np u t sig n als to t h e base of Q312 are am-
p lified, i n ve r ted and co up le d _ d irectly to t h e base of Q317 .
T h e feedbac k loop for t h e o p e r ational am p lifie r is t hr o ugh
R 316 to t h e emitte r of Q312 (see F ig . 3-6) . I np u t
impeda
n
ce
R ; is t h e emitte r r esisto r R 314 . F
eed
bac k impeda n
ce R
f
is
t he resista nce of R 316 . R esisto r R 319 limits
c urr e n t t hr o u gh
transisto r
Q312 if the M A RKER O U T co n nector is acci de n -
tally sh o
rte
d .
Α crystal oven is wire d so it is n ot de p endent on th e
P O WER switc h . P ower is t h erefo r e a pp lied to t he h eater
of t h e 75 ° oven as long as t h e instrument is connected to
α p ower so u rce . The ci r c u it for t h e O VEN indicating neon
(DS 405) is com p lete w hen t h e t hermal switc h is close d .
Th is neon in d icates p r o p er op eration of t h e crystal oven
t hermostat and tem p erat u re sta b ilization of t h
e crystal oven
.
T h e
voltage r eg u lators a r e mo u nte d on t he d ivi d er boa r d
wit
h
t h
e exce p tio n of t he +3 .6V se r ies reg u lator t r a n sisto r .
Q424 is mo u nte d on t h e bac k pan el h eat sin k .
-30 V olt S u pp ly
-30 volts is t h e pr ime s upp ly fo r t h e ma rk e r am p lifie r
a n d t h e r efe r e n ce voltage for t he +3 .6 volt s upp ly . T h e
ci r c u it con sists of α com p arato r , Q436
and
Q439, wit h its
o ι it pu t d riving α series reg u lato r Q458 .
R efere n ce voltage for t h e -30 volt reg u lator is set by
Zener diode VR 432 in series wit h diode C R 432 to gro un d .
T h
evoltage at t
h
e base of Q436 is
a pp
roximately 10 .6
volts . Α voltage d ivi d er consisting of R 452, R 451 (-30 V
a d ju st) and R 450, connecte db etwee n t he -30 V b u ss and
gro u n d , su
pp lies
α sample of t he -30 volts
to
t h e base
3-
9