Texas Instruments TPA3100D2 User manual

User's GuideSLOU179A – December 2005 – Revised May 2007
TPA3100D2 Rev.A Audio Power Amplifier EvaluationModule With LC Filter
Contents1 Introduction .......................................................................................... 22 Operation ............................................................................................ 33 TPA3100D2 Rev.A EVM Schematic ............................................................. 54 TPA3100D2 Rev.A EVM PCB Layers ........................................................... 65 TPA3100D2 Rev.A EVM Parts List .............................................................. 8
List of Figures
1 TI TPA3100D2 Rev.A Audio Power Amplifier EVM – Top View ............................. 22 TI TPA3100D2 Rev.A Audio Power Amplifier EVM – Bottom View .......................... 23 TPA3100D2 Rev.A EVM Schematic ............................................................. 54 TPA3100D2 Rev.A EVM – Top Layer ........................................................... 65 TPA3100D2 Rev.A EVM – Bottom Layer ....................................................... 7
List of Tables
1 Gain Settings ........................................................................................ 42 TPA3100D2 Rev.A EVM Parts List .............................................................. 8
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1 Introduction
1.1 Description
Introduction
The TPA3100D2 Rev.A evaluation module consists of a single 20-W, class-D, stereo audio poweramplifier complete with a small number of external components mounted on a circuit board that can beused to directly drive a speaker with an external analog audio source as the input.
Figure 1. TI TPA3100D2 Rev.A Audio Power Amplifier EVM – Top View
Figure 2. TI TPA3100D2 Rev.A Audio Power Amplifier EVM – Bottom View
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1.2 TPA3100D2 Rev.A EVM Specifications
2 Operation
2.1 Quick Start List for Stand-Alone Operation
2.1.1 Power Supply
2.1.2 Evaluation Module Preparations
2.1.2.1 Inputs and Outputs
2.1.2.2 Control Inputs
Operation
V
CC
Supply voltage range 10 V to 26 VI
CC
Supply current 4 A maxP
O
Continuous output power per channel, 8 Ω, V
CC
= 18 V, THD + N = 3.5% 20 WR
L
Minimum load impedance 3.2 Ω
Follow these steps to use the TPA3100D2 Rev.A EVM stand-alone or when connecting it into existingcircuits or equipment. Connections to the EVM module can be made using banana plugs for the powersupply and output connections. The inputs accept standard RCA plugs.
1. Ensure that all external power sources are set to OFF.2. Connect an external regulated power supply adjusted from 10 V to 26 V to the module V
CC
(J7) andGND ( J8) banana jacks taking care to observe marked polarity.
1. If connecting to a fully differential input or a grounded input (the shield of the RCA jack is GND),remove jumpers J9 and J10 from the EVM board. These are located next to the input jacks J1 and J2.If connecting to a floating source, like a portable CD player, install J9 and J10. After setting the J9 andJ10 jumpers appropriately, connect the audio source to J1 (RIGHT) and J2 (LEFT).2. Connect a speaker across ROUT+ ( J6) and ROUT- ( J5). Connect another speaker across LOUT+ ( J3)and LOUT- ( J4).3. Install both gain jumpers GAIN0 ( J12) and GAIN1 ( J13). This sets the gain of the amplifier to thelowest level, 20 dB.4. Remove the jumper at MSTR/ SLV ( J14). If only one EVM is evaluated, it must be configured as themaster. If multiple EVMs are connected together using the SYNC output (TP2), the additional EVMsmust be configured in the slave mode by installing the J14 jumper.5. Remove the jumper ( J11). This places the device in a latched mode when a short-circuit event occurs.
1. SD: This terminal is active low. A low signal on the device terminal (< 0.8 V) shuts down the amplifier;a high signal (> 2 V) on the device terminal places the amplifier in the active state. Holding downswitch S1 places the amplifier in the SHUTDOWN state. Releasing S1 returns the amplifier to theactive state.2. MUTE: This terminal is active high. A high signal (> 2 V) on this terminal immediately terminates audioplayback through the speakers and the outputs stop switching; a low signal (< 0.8 V) enables thedevice. S2 on the EVM controls the state of the MUTE terminal. Holding down switch S2 places theamplifier in the MUTE state. Releasing S2 returns the amplifier to the active state.3. GAIN0/GAIN1: Together, these terminals determine the gain of the amplifier. Refer to Table 1 .Installing a jumper in J12 or J13 sets the respective terminal to GND. Removing the jumper sets therespective terminals to VREG (~4 V). Removing jumpers INCREASES the gain while installing jumpersDECREASES the gain. Logic levels are TTL compatible.4. MSTR/ SLV: This terminal is used with the SYNC ( TP2) output to synchronize the switchingfrequencies of multiple EVMs. For example, with 2 EVMs, one would be configured as the MASTER byremoving the J14 jumper. The other EVM would be configured as the SLAVE device by installing a
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2.1.2.3 Control Outputs
2.1.3 Power Up
Operation
jumper in the J14 location. Logic levels are TTL compatible.
Table 1. Gain Settings
GAIN1 (J13)
(1)
GAIN0 (J12)
(1)
Amplifier Gain (dB)
ON ON 20ON OFF 26OFF ON 32OFF OFF 36
(1)
OFF = Jumper removed; ON = Jumper installed
1. FAULT: This pin is a TTL compatible output for reporting a short-circuit fault on the output. If theoutputs are shorted to GND, V
CC
, or to each other, this terminal goes high and remains high until oneof the following operations is performed: power is cycled, SHUTDOWN is cycled, or MUTE is cycled. Ifjumper J11 is installed, the MUTE terminal is connected directly to the FAULT terminal and ashort-circuit fault is automatically cleared when it occurs.
1. Verify correct voltage and input polarity and turn the external power supplies on. The EVM shouldbegin operation.2. Adjust the input signal.3. Adjust the control inputs to the desired settings.4. If no sound is audible, check the position of the MSTR/ SLV ( J14) jumper. It should be removed ifevaluating a single EVM.5. Adjust the amplifier gain by installing/removing the gain jumpers, J12 and J13.
TPA3100D2 Rev.A Audio Power Amplifier Evaluation Module With LC Filter4 SLOU179A – December 2005 – Revised May 2007Submit Documentation Feedback

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3 TPA3100D2 Rev.A EVM Schematic
TPA3100D2
GAIN1
LINP
1.0mF
1.0mF
1.0mF
RINN
1.0mF
RINP
AGND
LINN
GAIN0
SYNC
MSTR/SLV
NC
NC
NC
AVCC
NC
FAULT
MUTE
SHUTDOWN
BSRP
ROUTP
ROUTP
ROUTN
ROUTN
BSRN
NC
VCC
NC
VREG VBYP AGND BSLP
LOUTP LOUTP
ROUTP ROUTP
BSLN
NC ROSC
1mF
10nF
R6 100k
PVCCR
NC
NC
PGNDR
PVCCR
PGNDR
VCLAMPR
VCLAMPL
PVCCL
PGNDL
PGNDL
PVCCL
1mF
1mF
1mF
1mF
VCC
1mF
220mF
220mF
C20 10mF
C11
C12
C13
C14
J9
RIN
LIN
J2
J14
J13
J12
R3 100k
R5 100k
R4 100k
TP2
C5
C10
J8
GND
J7
VCC
C18
C19
C22
C21
C16
C15
0.22mF0.22mF
C1 C2
C6 C7
1.0
mF
1.0
mF
J3
LOUT+
J4
LOUT-
0.22mF
0.22mF
C3
C4
L3 33mH
L4 33mH
C8
C9
1.0
mF
1.0
mF
J5
ROUT-
J6
ROUT+
VREG
TP1
FAULT
J11
VREG
S1
S2
VCC
R1 100k
R2 100k
C17
PGND AGND
Connected at PowerPad
and then to J8 with single
point connection.
1.0 nF
J10
C23
L1 33mH
L2 33mH
R
820
R
720
1.0 nF
C24
1.0 nF
C25
R
10 20
R
920
1.0 nF
C26
TPA3100D2 Rev.A EVM Schematic
Figure 3. TPA3100D2 Rev.A EVM Schematic
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4 TPA3100D2 Rev.A EVM PCB Layers
TPA3100D2 Rev.A EVM PCB Layers
Figure 4. TPA3100D2 Rev.A EVM – Top Layer
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TPA3100D2 Rev.A EVM PCB Layers
Figure 5. TPA3100D2 Rev.A EVM – Bottom Layer
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5 TPA3100D2 Rev.A EVM Parts List
TPA3100D2 Rev.A EVM Parts List
Table 2. TPA3100D2 Rev.A EVM Parts ListRef. Description Size Qty Mfg Part # Vendor #
C1 – C4 Capacitor, ceramic, 0.22- µF, ±10%, X7R, 16-V 0603 4 TDK C1608X7R1C224KT Digi-key/445-1318-2
C5 Capacitor, ceramic, 0.01- µF, ±10%, X7R, 50-V 0603 1 TDK C1608X7R1H103KT Digi-key/445-1311-2
C6 – C9 Capacitor, ceramic, 1.0- µF, ±10%, X7R, 50-V 1206 4 Murata GRM31CR71H105KA61L Digi-key/490-3908-1-ND
C10 – C14 Capacitor, ceramic, 1.0- µF, ±10%, X5R, 10-V 0603 5 TDK C1608X5R1A105KT Digi-key/445-1321-2
C17 – C19 Capacitor, ceramic, 1.0- µF, +80%/–20%, Y5V, 50-V 0805 3 TDK C2012Y5V1H105Z Digi-key/445-1364-2
C15, C16 Capacitor, ceramic, 1.0- µF, +80%/–20%, Y5V, 16-V 0805 2 TDK C2012Y5V1C105Z Digi-key/445-1367-2
C20 Capacitor, ceramic, 10- µF, +80%/–20%, Y5V, 50-V 1210 1 Murata GRM32DF51H106ZA01L Digi-key/490-1891-2
C21, C22 Capacitor, electrolytic, 220- µF, low impedance Radial 2 Panasonic EEU-FC1V221 Digi-key/P10297
L1– L4 Inductor, 33- µH, radial lead, ferrite material, shielded Radial 4 Toko A7503AY-330M
C23 – C26 Capacitor, ceramic, 1.0-nF, ±5%, COG, 50-V 0603 4 Panasonic ECJ-1VC1H102J Digi-Key/PCC2151TR-ND
R1 – R6 Resistor, chip, 100 k Ω, 1/16 W, 5% 0603 6 Panasonic ERJ-3GEYJ104V Digi-Key/P100KGTR-ND
R7 – R10 Resistor, chip, 20 k Ω, 1/4 W, 5% 1206 4 Panasonic ERJ-8GEYJ200V Digi-Key/P20ETR-ND
J1, J2 Phono jack, PC mount, switched , red 2 Switchcraft PJRAN1X1U03 Newark/16C1860
J3 – J8 Banana jack w/knurled thumbnut (nickel plate) 6 Johnson 111-2223-001 Digi-Key/J587
J9 – J14 Header, 2 position, male 2 mm 6 Norcomp 2163-36-01-P2 Digi-Key / 2163S-36
J9 – Shunt, 2 mm 2 mm 6 FCI 86730-101J14(shunts) Electronics
TP1, TP2 Test points, 0.040" mounting hole 1 Vero 20-313137
S1, S2 Switch, momentary, SMD, low profile 2 Panasonic EVQ-PPBA25 Digi-Key/P8086S
MH1 – MH4 Standoffs, 4-40 thread,5/8" length 4 Keystone 1808 (Newark) 89F1934
MH5 – MH8 Screws, 4-40 Phillips, 3/8" 4 (Digi-Key) H781-ND
U1 TPA3100D2PHP 48-pin QFN 1 TI TPA3100D2PHP
TPA3100D2 Rev.A Audio Power Amplifier Evaluation Module With LC Filter8 SLOU179A – December 2005 – Revised May 2007Submit Documentation Feedback

FCC Warning
This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATIONPURPOSES ONLY and is not considered by TI to be a finished end-product fit for general customer use. It generates, uses, andcan radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of thisequipment in other environments may cause interference with radio communications, in which case the user at his own expensewill be required to take whatever measures may be required to correct this interference.
EVM TERMS AND CONDITIONS
Texas Instruments (TI) provides the enclosed Evaluation Module and related material (EVM) to you, the user, (you or user)SUBJECT TO the terms and conditions set forth below. By accepting and using the EVM, you are indicating that you have read,understand and agree to be bound by these terms and conditions. IF YOU DO NOT AGREE TO BE BOUND BY THESE TERMSAND CONDITIONS, YOU MUST RETURN THE EVM AND NOT USE IT.This EVM is provided to you by TI and is intended for your INTERNAL ENGINEERING DEVELOPMENT OR EVALUATIONPURPOSES ONLY. It is provided “AS IS” and “WITH ALL FAULTS.” It is not considered by TI to be fit for commercial use. Assuch, the EVM may be incomplete in terms of required design-, marketing-, and/or manufacturing-related protective considerations,including product safety measures typically found in the end product. As a prototype, the EVM does not fall within the scope of theEuropean Union directive on electromagnetic compatibility and therefore may not meet the technical requirements of the directive.Should this EVM not meet the specifications indicated in the EVM User’s Guide, it may be returned within 30 days from the date ofdelivery for a full refund of any amount paid by user for the EVM, which user agrees shall be user’s sole and exclusive remedy.THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY TI TO USER, AND IS IN LIEU OF ALL OTHERWARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY, FITNESSFOR ANY PARTICULAR PURPOSE OR NON-INFRINGEMENT.TI shall have no obligation to defend any claim arising from the EVM, including but not limited to claims that the EVM infringes thirdparty intellectual property. Further, TI shall have no liability to user for any costs, losses or damages resulting from any suchclaims. User shall indemnify and hold TI harmless against any damages, liabilities or costs resulting from any claim, suit orproceeding arising from user’s handling or use of the EVM, including but not limited to, (i) claims that the EVM infringes a thirdparty’s intellectual property, and (ii) claims arising from the user’s use or handling of the EVM. TI shall have no responsibility todefend any such claim, suit or proceeding.User assumes all responsibility and liability for proper and safe handling and use of the EVM and the evaluation of the EVM. TIshall have no liability for any costs, losses or damages resulting from the use or handling of the EVM. User acknowledges that theEVM may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). Due to the open construction of the EVM it is theuser’s responsibility to take any and all appropriate precautions with regard to electrostatic discharge.EXCEPT TO THE EXTENT OF THE USER’S INDEMNITY OBLIGATIONS SET FORTH ABOVE, NEITHER PARTY SHALL BELIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES WHETHER TI ISNOTIFIED OF THE POSSIBILITY OR NOT.TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive.TI assumes no liability for applications assistance, customer product design, software performance, or infringement ofpatents or services described herein.
User agrees to read the EVM User’s Guide and, specifically, the EVM warnings and Restrictions notice in the EVM User’s Guideprior to handling the EVM and the product. This notice contains important safety information about temperatures and voltages.It is user’s responsibility to ensure that persons handling the EVM and the product have electronics training and observe goodlaboratory practice standards.By providing user with this EVM, product and services, TI is NOT granting user any license in any patent or other intellectualproperty right.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265Copyright © 2005, Texas Instruments Incorporated
EVM WARNINGS AND RESTRICTIONS
It is important to operate this EVM within the supply voltage range of –0.3 V to 30 V and input voltage range of –0.3 V to 4.5 V.Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there arequestions concerning the input range, please contact a TI field representative prior to connecting the input power.Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to theEVM. Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the loadspecification, please contact a TI field representative.

EVM WARNINGS AND RESTRICTIONS (continued)
During normal operation, some circuit components may have case temperatures greater than 85 °C. The EVM is designed tooperate properly with certain components above 85 °C as long as the input and output ranges are maintained. These componentsinclude but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types ofdevices can be identified using the EVM schematic located in the EVM User's Guide. When placing measurement probes nearthese devices during operation, please be aware that these devices may be very warm to the touch.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265Copyright 2005, Texas Instruments Incorporated

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