Texas Instruments ADC12J4000EVM User manual

ADC12J4000EVM User's Guide
User's Guide
Literature Number: SLAU551B
January 2014–Revised August 2015

Contents
1 Introduction......................................................................................................................... 4
2 Equipment........................................................................................................................... 7
2.1 Evaluation Board Feature Identification Summary ...................................................................... 7
2.2 Required Equipment......................................................................................................... 8
3 Setup Procedure ................................................................................................................ 10
3.1 Install the High Speed Data Converter (HSDC) Pro Software ....................................................... 11
3.2 Install the Configuration GUI Software .................................................................................. 11
3.3 Connect the EVM and TSW14J56EVM ................................................................................. 11
3.4 Connect the Power Supplies to the Boards (Power Off).............................................................. 11
3.5 Connect the Signal Generators to the EVM (*RF outputs disabled until directed) ................................ 11
3.6 Turn On the TSW14J56EVM Power and Connect to the PC ........................................................ 11
3.7 Turn On the ADC12J4000EVM Power Supplies and Connect to the PC........................................... 12
3.8 Turn On the Signal Generator RF Outputs ............................................................................. 12
3.9 Open the ADC12J4000EVM GUI and Program the ADC and Clocks............................................... 12
3.10 Configure NCO Tab (if Decimation is Selected) ....................................................................... 13
3.11 Calibrate the ADC Device on the EVM.................................................................................. 14
3.12 Open the HSDC Software and Load the FPGA Image to the TSW14J56EVM.................................... 15
3.13 Verify the TSW14J56EVM Switch Settings and Status LEDs........................................................ 15
3.14 Capture Data Using the HSDC Pro Software .......................................................................... 15
3.15 Re-Verify TSW14J56EVM Status LEDs................................................................................. 17
4 Device Configuration .......................................................................................................... 19
4.1 Supported JESD204B Device Features................................................................................. 19
4.2 Tab Organization........................................................................................................... 19
4.3 Low-Level Control.......................................................................................................... 19
5 Evaluation Troubleshooting................................................................................................. 22
A References ........................................................................................................................ 24
A.1 Technical Reference Documents......................................................................................... 24
A.2 TSW14J56EVM Operation................................................................................................ 24
B HSDC Pro Settings for Optional ADC Device Configuration..................................................... 26
B.1 Changing the Number of Frames per Multi-Frame (K)................................................................ 26
B.2 Customizing the EVM for Optional Clocking Support ................................................................. 26
Revision History.......................................................................................................................... 29
Revision History.......................................................................................................................... 29
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List of Figures
1-1. EVM Orientation ............................................................................................................. 4
2-1. EVM Feature Locations..................................................................................................... 7
3-1. EVM Test Setup............................................................................................................ 10
3-2. Configuration GUI EVM Tab.............................................................................................. 12
3-3. Configure NCO Tab........................................................................................................ 13
3-4. Configuration GUI ADC Control .......................................................................................... 14
3-5. High Speed Data Converter Pro (HSDC) GUI.......................................................................... 16
3-6. Additional Device Parameters Tab....................................................................................... 17
4-1. Low-Level Register Control Tab ......................................................................................... 20
B-1. Configuration for Optional Clocking Support ........................................................................... 27
List of Tables
4-1. Supported and Non-Supported Features of the JESD204B Device................................................. 19
4-2. Low-Level Controls......................................................................................................... 19
5-1. Troubleshooting ............................................................................................................ 22
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Chapter 1
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Introduction
The ADC12J4000EVM is an evaluation board used to evaluate the ADC12J4000 analog-to-digital
converter (ADC) from Texas Instruments. The ADC12J4000 device is a single-channel, 12-bit ADC
capable of operating at sampling rates up to 4 Giga-samples per second (GSPS). The ADC12J4000
device output data is transmitted over a standard JESD204B high-speed serial interface.
This evaluation board also includes the following important features:
• Transformer-coupled signal input network allowing a single-ended signal source from 400 MHz to 3
GHz
• The TRF3765 clock synthesizer generates the ADC sampling clock
• The LMK04828 system clock generator generates SYSREF and FPGA reference clocks for the high-
speed serial interface
• Transformer-coupled clock input network to test the ADC performance with an external low-noise clock
source
• LM95233 temperature sensor
• High-speed serial data output over a High Pin Count FMC interface connector
• Device register programming through USB connector and FTDI USB-to-SPI bus translator
Figure 1-1. EVM Orientation
4Introduction SLAU551B–January 2014–Revised August 2015
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The digital data from the ADC12J4000EVM board is quickly and easily captured with the TSW14J56EVM
data capture board. The TSW14J56EVM captures the high-speed serial data, decodes the data, stores
the data in memory, and then uploads it to a connected PC through a USB interface for analysis. The
High-Speed Data Converter Pro (HSDC Pro) software on the PC communicates with the hardware and
processes the data.
With proper hardware selection in the HSDC Pro software, the TSW14J56 device is automatically
configured to support a wide range of operating speeds of the ADC12J4000EVM, but the device may not
cover the full operating range of the ADC device. Serial data rates (and corresponding sampling rates) of
10 Gb/s (4 GSPS) down to 1 Gb/s (1 GSPS) are supported.
In the following sections of this document, the ADC12J4000EVM evaluation board is referred to as the
EVM and the ADC12J4000 device is referred to as the ADC device.
K&L Microwave is a trademark of K&L Microwave.
Rohde & Schwarz is a trademark of Rohde & Schwarz.
Trilithic is a trademark of Trilithic.
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Chapter 2
SLAU551B–January 2014–Revised August 2015
Equipment
This section describes how to setup the EVM on the bench with the proper equipment to evaluate the full
performance of the ADC device.
2.1 Evaluation Board Feature Identification Summary
Figure 2-1. EVM Feature Locations
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Required Equipment www.ti.com
2.2 Required Equipment
The following equipment and documents are included in the EVM evaluation kit:
• Evaluation board (EVM)
• Mini-USB cable
• 110 V to 240 V AC to 5-V DC-Power Adapter
The following equipment is not included in the EVM evaluation kit, but is required for evaluation of this
product:
• TSW14J56EVM data capture board plus 5-V power supply and mini-USB cable
• High-Speed Data Converter Pro software
• PC computer running Windows XP, 7, or 8
• One low-noise signal generator for analog input. TI recommends the following generators:
– HP HP8644B
– Rohde & Schwarz™ SMA100A
• Bandpass filter for analog input signal (500 MHz or desired frequency). The following filters are
recommended:
– Bandpass filter, greater than or equal to 60 dB harmonic attenuation, less than or equal to 5%
bandwidth, greater than 18-dBm power, less than 5 dB insertion loss
– Trilithic™ 5VH-series tunable BPF
– K&L Microwave™ BT-series tunable BPF
– TTE KC6 or KC7-series fixed BPF
• Signal-path cables, SMA or BNC (or both SMA and BNC)
By default, the ADC12J4000EVM has an onboard clocking solution. A few small board modifications
enable external clocking. If external clocking is used, the following equipment is recommended.
• Two low-noise signal generators. TI recommends similar models to the an analog input source.
• A bandpass filter for the DEVCLK input. TI recommends a filter similar to the analog-input path filter.
NOTE: The clock source used to drive the LMK04828 (labeled LMKCLK) must be half of the
frequency used to drive the ADC12J4000 sampling clock (labeled DEVCLK). The clock
generators must be frequency locked using a common 10 MHz reference.
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Chapter 3
SLAU551B–January 2014–Revised August 2015
Setup Procedure
Figure 3-1. EVM Test Setup
NOTE: The HSDC Pro software must be installed before connecting the TSW14J56EVM to the PC
for the first time.
10 Setup Procedure SLAU551B–January 2014–Revised August 2015
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