Texas Instruments TMS320C6000 DSP User manual

TMS320C6000 Chip Support Library
API Reference Guide
Literature Number SPRU401
March 2000
Printed on Recycled Paper

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Copyright 2000, Texas Instruments Incorporated

iii Contents
Preface
Read This First
About This Manual
Welcome to the TMS320C6000 Chip Support Library, or CSL for short. The
CSL is a set of application programming interfaces (APIs) used to configure
andcontrolallon-chip peripherals. Itisintendedto make iteasierfordevelop-
ers by eliminating much of the tedious grunt-work usually needed to get algo-
rithmsup andrunninginarealsystem.Someoftheadvantagesofferedbythe
CSL include: peripheral ease of use, a level of compatibility between devices,
shortened development time, portability, standardization, and hardware ab-
straction. A version of the CSL is available for all TMS320C6000 devices.
This document contains a reference for the CSL APIs and is organized as fol-
lows:
-Overview – a high level overview of the CSL
-CSL API Module Descriptions – a description of the individual CSL API
modules
-CSL API Functions – a brief description of all CSL API functions in table
format
-CSL API Reference – an alphabetical listing of all CSL API identifiers
-HAL Reference – a low-level reference of the hardware abstraction layer
listing all macros and constants for manipulating the peripheral registers
How to Use This Manual
TheinformationinthisdocumentdescribesthecontentsoftheTMS320C6000
chip support library in several different ways.
-Chapter 1 provides an overview of the CSL and its 2-layer architecture
consisting of the service layer and the hardware abstraction layer (HAL).
-Chapter 2 provides an introduction to the service-layer API modules and
givesadescriptionofeachinalphabeticalordertogetherwithtablesshow-
ingthevarious functions,macros,constants,etc.,and asectionand page

How to Use This Manual
iv
reference for more detailed information about each. This chapter is in-
tended for those who want to understand the internal workings of the ser-
vice layer APIs.
-Chapter 3 provides a quick overview of all CSL API functions in table for-
mat for easy reference. The information shown for each function includes
the syntax, a brief description, and a page reference for obtaining more
detailed information.
-Chapter 4 provides an alphabetical listing of the CSL service-layer API
functions, enumerations, type definitions, macros, structures, constants,
and global variables. This chapter uses examples to show how these ele-
ments are used.
-Chapter 5 contains an alphabetical reference of the chip support library
hardware abstraction layer (CSL HAL).
Notational Conventions
This document uses the following conventions:
-Program listings, program examples, and interactive displays are shown
in a special typeface.
-In syntax descriptions, the function or macro appears in a bold typeface
and the parameters appear in plainface within parentheses. Portions of a
syntax that are in bold should be entered as shown; portions of a syntax
thatarewithinparenthesesdescribethetypeofinformationthatshouldbe
entered.
-Macro names are written in uppercase text; function names are written in
lowercase.
-TMS320C6000devicesare referredtothroughoutthisreferenceguideas
’C6201, ’C6202, etc.
Related Documentation From Texas Instruments
The following books describe the TMS320C6x devices and related support
tools. To obtain a copy of any of these TI documents, call the Texas Instru-
mentsLiteratureResponseCenterat(800)477–8924.Whenordering,please
identify the book by its title and literature number. Many of these documents
can be found on the Internet at http://www.ti.com.
TMS320C62x/C67x Technical Brief (literature number SPRU197) gives an
introduction to the ’C62x/C67x digital signal processors, development
tools, and third-party support.
Notational Conventions / Related Documentation From Texas Instruments

How to Use This Manual
v Read This First
TMS320C6000 CPU and Instruction Set Reference Guide (literature
number SPRU189) describes the ’C6000 CPU architecture, instruction
set, pipeline, and interrupts for these digital signal processors.
TMS320C6201/C6701 Peripherals Reference Guide (literature number
SPRU190) describes common peripherals available on the
TMS320C6201/6701 digital signal processors. This book includes in-
formation on the internal data and program memories, the external
memory interface (EMIF), the host port interface (HPI), multichannel
bufferedserialports(McBSPs),directmemoryaccess(DMA),enhanced
DMA (EDMA), expansion bus, clocking and phase-locked loop (PLL),
and the power-down modes.
TMS320C6000 Programmer’s Guide (literature number SPRU198)
describeswaystooptimizeCandassemblycodefortheTMS320C6000
DSPs and includes application program examples.
TMS320C6000AssemblyLanguageToolsUser’sGuide (literaturenumber
SPRU186) describes the assembly language tools (assembler, linker,
and other tools used to develop assembly language code), assembler
directives, macros, common object file format, and symbolic debugging
directives for the ’C6000 generation of devices.
TMS320C6000 Optimizing C Compiler User’s Guide (literature number
SPRU187)describesthe’C6000Ccompilerandtheassemblyoptimizer.
ThisCcompileracceptsANSIstandardCsourcecodeandproducesas-
semblylanguagesourcecodefor the’C6000generationofdevices. The
assembly optimizer helps you optimize your assembly code.
TMS320C62x DSP Library (literature number SPRU402) describes the 32
high-level, C-callable, optimized DSP functions for general signal proc-
essing, math, and vector operations.
TMS320C62x Image/Video Processing Library (literature number
SPRU400) describes the optimized image/video processing functions
including many C-callable, assembly-optimized, general-purpose
image/video processing routines.

Contents
vii
Contents
1Introduction 1-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Provides an overview of the chip support library (CSL) and its two-layer architecture.
1.1 CSL Overview 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 HAL Overview 1-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 Service Layer Overview 1-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2CSLAPI Module Descriptions 2-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Describes the purpose of the individual CSL application programming interface (API) modules
and how they work.
2.1 CSL API Module Introduction 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 CACHE 2-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3 CSL 2-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.4 DAT2-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.5 CHIP 2-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.6 DMA 2-11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.7 EDMA 2-13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.8 EMIF 2-15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.9 HPI 2-16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.10 IRQ 2-17. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.11MCBSP 2-18. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12 PWR 2-20. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.13 STDINC 2-21. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.14 TIMER 2-22. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3CSLAPI Function Tables. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-1
ProvidestablescontainingallCSL APIFunctions,a briefdescriptionof each,andapagerefer-
ence for more detailed information.
3.1 CSL Function Tables 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Contents
viii
4 CSL API Reference 4-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Provides an alphabetical list of the CSL service layer API functions. Includes enumerations,
type definitions, macros, structures, constants, and global variables.
4.1 CSL API Reference Introduction 4-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.2 CACHE 4-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3 CSL 4-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.4 DAT 4-11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.5 CHIP 4-19. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.6 DMA 4-22. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.7 EDMA 4-51. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.8 EMIF 4-69. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.9 HPI 4-81. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.10 IRQ 4-84. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.11 MCBSP 4-87. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.12 PWR 4-114. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.13 STDINC 4-117. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.14 TIMER 4-119. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5 HAL Reference 5-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Containsanalphabetical reference ofthechipsupportlibrary hardware abstractionlayer(CSL
HAL).
5.1 HAL Reference Introduction 5-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.2 HCACHE 5-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.3 HCHIP 5-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.4 HDMA 5-14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.5 HEDMA 5-17. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.6 HEMIF 5-30. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.7 HHPI 5-32. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.8 HIRQ 5-33. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.9 HMCBSP 5-34. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.10 HPWR 5-41. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.11 HTIMER 5-42. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A Glossary A-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Explains terms, abbreviations, and acronyms used throughout this book.

Figures
ix Contents
Figures
1–1 CSL Layers 1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1–2 API Modules within Service Layer 1-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4–1 2D Transfer 4-14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Tables
x
Tables
3–1 CACHE 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–2 CSL 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–3 DAT 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–4 CHIP 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–5 DMA 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–6 EDMA 3-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–7 EMIF 3-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–8 HPI 3-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–9 IRQ 3-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–10 MCBSP 3-9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–11 PWR 3-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–12 TIMER 3-11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4–1 CSL API Module Support for TMS320C6000 Devices 4-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1-1
Introduction
Thischapterprovidesanoverviewofthechipsupportlibrary(CSL)anditstwo-
layer architecture.
Topic Page
1.1 CSL Overview 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 HAL Overview 1-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 Service Layer Overview 1-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 1

CSL Overview
1-2
1.1 CSL Overview
TheCSLiswrittenprimarilyinCwithsomeassemblylanguagewhereneeded.
The library is made up of discrete modules that are built and archived into a
libraryfile.Eachmodule represents anindividualAPI and isreferredtosimply
as an API module. The module granularity is architected such that each pe-
ripheraliscoveredbyasingleAPImodule.Hence,thereisaDMAAPImodule
for the DMA peripheral, a MCBSP API module for the McBSP peripheral, and
so on.
Current List of CSL API Modules:
-CACHE cache module
-CSL top-level module
-DAT device independent data copy/fill module
-CHIP chip specific module
-DMA direct memory access module
-EDMA enhanced direct memory access module
-EMIF external memory interface module
-HPI host port interface module
-IRQ interrupt controller module
-MCBSP multichannel buffered serial port module
-PWR power down module
-STDINC standard include module
-TIMER timer module
Although each API module is unique, there exists some interdependency be-
tween the modules. For example, the DMA module depends on the IRQ mod-
ule because of DMA interrupts. This comes into play when linking code be-
cause if you use the DMA module, the IRQ module automatically gets linked
also.
TheCSLisarchitectedusingatwo-layer approach:the toplayeristhe service
layer and the bottom layer is the hardware abstraction layer or HAL . This is
illustrated in Figure 1–1,
CSL Layers .
Note: TheCSLdepends onDSP/BIOSforitshardware interruptdispatch-
er. Hence, you must create a DSP/BIOS application with your Code Com-
poser Studio project to use the CSL.

CSL Overview
1-3 Introduction
Figure 1–1. CSL Layers
{}
HAL
Service Layer Chip Support
Library (CSL)

HAL Overview
1-4
1.2 HAL Overview
The hardware abstraction layer, or HAL, is a set of constants and macros that
fully describes the peripheral registers by way of symbols. It is capable of hid-
ing subtle differences between devices such as bit-fields changing size or
position within a register. In addition, the HAL can substitute a NULL register
in the case where a register is supported on one device but not another. The
whole purpose of the HAL is to provide the service layer a symbolic interface
intothehardware.ItisnotintendedasauserinterfaceorAPI.Thisisexplained
further in section 1.3 ,
Service Layer Overview .
What the CSL HAL Offers:
-Symbol definitions for every peripheral register
JHPER_REG_ADDR
JHPER_REG
-Symbol definitions for every bit-field of every peripheral register
JHPER_REG_FIELD_MASK
JHPER_REG_FIELD_SHIFT
-Macro definitions to get and set any field of any peripheral register
JHPER_REG_FIELD_GET()
JHPER_REG_FIELD_SET()
-Macro definitions to get and set any peripheral register
JHPER_REG_GET()
JHPER_REG_SET()
-Macro definitions to configure any peripheral register based on field
values
JHPER_REG_CFG()
HPER – peripheral module name, ex. DMA
REG – peripheral register name, ex. PRICTL
FIELD – peripheral register field name, ex. ESIZE
For a complete reference of the HAL, see Chapter 5,
HAL Reference.

Service Layer Overview
1-5 Introduction
1.3 Service Layer Overview
TheservicelayeriswheretheactualAPIsaredefinedandisthelayertheuser
interfacesto. ItispossiblefortheusertointerfacedirectlyintotheHALbutthis
isnotadvisablebecause it could haveundesiredsideeffectsontheoperation
of the service layer APIs. For example, you would not want to use the HAL to
directlywriteto aDMAregister while thatregisteris inuseby theDMAservice
layer API. If however, the user decides not to use the service layer at all, the
HAL is available and can still save the user time and effort.
Figure 1–2 illustrates the individual API modules within the service layer. This
architectureallowsforfutureexpansionoftheCSLbecausenewAPImodules
can be added to the service layer as new peripheral devices emerge.
Figure 1–2. API Modules within Service Layer
...
TIMERSTDINC
...
DMACHIPDATCSLCACHE
It is important to note that not all devices support all API modules. This de-
pends on if the device actually has the peripheral that an API covers. For ex-
ample, the EDMA API module is not supported on a ’C6201 because this de-
vice does not have an EDMA peripheral. Other modules, however, are sup-
portedonalldevicessuchastheIRQmodule.Aswillbeshownlaterinthe
API
Reference section, each module has a compile time constant symbol defined
thatdenotesif themoduleis supportedornot foragiven device.Forexample,
the symbol EDMA_SUPPORT has a value of 1 if the current device supports it,
andavalueof0otherwise.Youcanusethesesupportsymbolsintheirapplica-
tion code to make decisions if so desired.
Note:
WhenusingtheCSL,it isuptotheuser todefineaproject-widesymbol from
apredeterminedsettoidentifywhichdevice isbeing used.Thisdeviceiden-
tification symbol is then used in the CSL header files to conditionally define
the support symbols. See the CHIP API reference (section 4.5, CHIP , on
page 4-19) for more information.

2-1
CSLAPI Module Descriptions
This chapter describes the purpose of the individual CSL API modules within
the chip support library (CSL) and explains how they work. This information
is intended for those who want to understand the internal workings of the ser-
vice layer APIs.
Topic Page
2.1 CSL API Module Introduction 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 CACHE 2-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3 CSL 2-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.4 DAT 2-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.5 CHIP 2-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.6 DMA 2-11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.7 EDMA 2-13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.8 EMIF 2-15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.9 HPI 2-16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.10 IRQ 2-17. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.11 MCBSP 2-18. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12 PWR 2-20. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.13 STDINC 2-21. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.14 TIMER 2-22. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 2

CSL API Module Introduction
2-2
2.1 CSL API Module Introduction
Therearecertainmethods used acrossdifferentmodulesthat are worthmen-
tioning at the global level.
OPEN and CLOSE Functions
Peripherals that have multiple channels, ports, etc. must be managed as
resources in a shared environment. The CSL APIs allow for this by way of
Open and Close API functions. For example, a piece of application code can
open a DMA channel for exclusive use. This precludes any other part of the
program from opening the same DMA channel. If the resource is no longer
needed, it can be freed up by closing it. The methodology used is the handle
concept. You obtain a peripheral handle by calling the Open function for that
peripheral.ThishandleisthenusedinallsubsequentAPIcalls forthat periph-
eral.Thisofcourseonly appliestoperipheral devicesthat havemultiplechan-
nels or ports such as the DMA, McBSP, and timer. Other peripherals such as
theEMIFneedno such resourcemanagementand do nothavehandlebased
API calls.
MK Macros
AnothermethodthatmanyoftheAPImodulesshareistheideaofthe MK mac-
rothatstands for make .Inevitablywhenconfiguringperipherals, youwillhave
to set some registers to some values. It can be painstaking work to calculate
bit-fieldvaluesandthen shift-merge themalltogetherto form aregistervalue.
To make this easier, the API modules define
MK macros. These macros take
individualright-justifiedfield valuesasargumentsand formthemergedvalue.
Inaddition,symbolicconstantsare providedthatmay beusedforthefield val-
ues. To illustrate, consider a hypothetical register named REG that is part of
aperipheralnamedPER.Thisregisterhas5fields,F0,F1,F2,F3,andF4.The
MK macro will look like this:
PER_MK_REG(f0,f1,f2,f3,f4)
Additionally, there will be field value constants similar to the following:
PER_REG_F0_VAL0
PER_REG_F0_VAL1
PER_REG_F1_VAL0
...
PER_REG_F4_VAL3
This macro may be used several ways. You can use it without the symbolic
constants like this:

CSL API Module Introduction
2-3 CSL API Module Descriptions
val = PER_MK_REG(0,4,1,3,8);
or, to make your code more readable and self-documenting, you can use the
symbolic constants for the field values like this:
val = PER_MK_REG(
PER_REG_F0_VAL0,
PER_REG_F1_VAL1,
PER_REG_F2_VAL1,
PER_REG_F3_VAL0,
PER_REG_F4_VAL3
);
You could just as well use variables for the field values. If you used all
constants for the field values, the whole macro resolves down to a single
constant number at compile time.

CSL API Module Introduction
2-4
A couple rules apply to these macros:
-Only writeable register fields are arguments, no read-only fields
-The register field arguments are specified least-significant first
-If a field is not implemented for a particular device, use the
PER_REG_FIELD_NA value
Initializing the Registers of a Peripheral
Related to the MK macros is a pair of functions and a structure definition that
many of the API modules implement. The two functions are PER_ConfigA()
and PER_ConfigB() and the structure is PER_CONFIG where PER is the pe-
ripheral module name such as DMA. These functions along with the structure
give you two ways of initializing the registers of a peripheral. Using method A,
you initialize a configuration structure with the appropriate register values.
Thenyoupass theaddressof this structuretothe
ConfigA functionthat inturn
initializes the peripheral registers with the values in the structure. The other
method(methodB)doesnotusetheconfigurationstructure;instead,youpass
the register values as individual arguments to the ConfigB function. The two
methods may be used interchangeably. Using either of the two methods, you
still have to come up with the register values. This is where the
MK (make)
macros help: you can use the macros inside of the structure initializer or you
can use them in place of the arguments when calling the ConfigB function.
Consider this hypothetical example:
PER_CONFIG MyConfig = {
reg0 val ,
reg1 val,
…
};
…
PER_ConfigA(&MyConfig);
Or for method B:
PER_ConfigB( reg0 val , reg1 val , …);
Function Inlining
Another topic that is global to the API modules is function inlining. It turns out
thatahigh percentageofthe APIfunctionsare veryshort,setting asinglereg-
ister bit for example. For these small functions, it does not make sense to al-
waysincurtheoverheadofaCfunctioncall.So,theAPIdeclaresthemas
stat-
ic inline when the user enables inlining. You can actually reduce code size by

CSL API Module Introduction
2-5 CSL API Module Descriptions
enabling inlining when the functions are very small. This is because the size
ofthefunctionissmallerthanthestatesavingcoderequiredtocallthefunction
if it were not inlined. The API reference does not state which functions are in-
lined and which are not: this allows for future changes. You should see an in-
crease in CSL code performance when you enable function inlining.

CACHE
2-6
2.2 CACHE
TheCACHEmoduleoffersasmall set ofAPIfunctionsfor managingdataand
program cache. The CACHE module includes:
-Constant
JCACHE_SUPPORT
-Functions
JCACHE_Clean
JCACHE_EnableCaching
JCACHE_Flush
JCACHE_GetL2SramSize
JCACHE_Invalidate
JCACHE_Reset
JCACHE_SetL2Mode
JCACHE_SetPccMode
CACHE Architectures
Currently, there are two cache architectures used on ’C6x devices. The first
type, which is present on the ’6201device, provides program cache by disab-
ling on-chip program RAM and turning it into cache. The second type, which
is present on the ’6211 device, is the newer two-level (L2) cache architecture.
The CACHE module has APIs that are specific for the L2 cache and specific
for the older program cache architecture. However, the API functions are call-
ableonbothtypesof platformstomakeapplicationcode portable.Ondevices
without L2, the L2-specific cache API calls do nothing but return immediately.
For additional information about the CACHE module, refer to Table 3–1 on
page 3-2 and Section 4.2 on page 4-3.