Texas Instruments ADS1278EVM-CVAL User manual

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ADS1278EVM-CVAL Evaluation Module User's Guide
User's Guide
SBAU324–September 2018
ADS1278EVM-CVAL Evaluation Module User's Guide
ADS1278EVM-CVAL Evaluation Module Kit
This user's guide describes the characteristics, operation, and use of the ADS1278EVM-CVAL kit. This
evaluation kit is an evaluation system for the ADS1278-SP, a 24-bit, radiation hardened, 8 channel, delta-
sigma analog-to-digital converter (ADC).
This document includes an EVM QuickStart, hardware and software details, bill of materials, and
schematic.
The following related documents are available through the Texas Instruments web site at
http://www.ti.com.
Table 1. EVM-Compatible Device Data Sheets
Device Literature Number Device Literature Number
ADS1278-SP SBAS937 SN74LVC2G157 SCES207
REF5025 SBOS410 TPS65131 SLVS493
OPA2350 SBOS099 PCA9535 SCPS129
OPA1632 SBOS286
Trademarks
ADCPro is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.

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ADS1278EVM-CVAL Evaluation Module User's Guide
1 EVM Overview
The ADS1278EVM-CVAL is an evaluation module kit that includes an EVM, MMB0 motherboard, a USB
cable, and a barreled power supply cable as shown in ADS1278EVM-CVAL Evaluation Module Kit above.
When used with the MMB0 EVM, the ADS1278-SP can be evaluated quickly using software GUI
ADCPro™. As a standalone PCB, the ADS1278EVM-CVAL is useful for prototyping designs and firmware
as it can be connected to any modular EVM system interface card.
1.1 Features
ADS1278EVM-CVAL Features:
• Contains all support circuitry needed for the ADS1278-SP
• Voltage reference options: external or onboard
• Clock options: External clock source (PLL or DSP supplied) or 27-MHz onboard crystal oscillator
• GPIO access
• Compatible with the TI Modular EVM System

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2 Quick Start
This section provides a QuickStart guide to quickly begin evaluating the ADS1278EVM-CVAL with
ADCPro.
2.1 Default Jumper/Switch Configuration
Figure 1 and Table 2 show the factory default jumper positions for the MMB0 motherboard EVM.
Figure 1. MMB0 Default Jumper Positions
Table 2. MMB0 Default Jumper Positions
Jumper Position
J12 CLOSED
J13A OPEN
J13B CLOSED

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Figure 2 and Table 3 show the factory default jumper and switch positions for the ADS1278EVM-CVAL.
Figure 2. ADS1278EVM-CVAL Default Jumper/Switch Positions
Table 3 lists the jumpers and switches and the factory default conditions.
Table 3. Default Jumper/Switch Configuration
Switch Default Position Switch Description
S1 All OFF (Up) Power-down channel DIP switches (hardware control).
S2 All OFF (Up) Mode, Format, and CLKDIV DIP switches (hardware control).
S3 INT (Left) On-board voltage reference selected.
S4 Header connected to converter (Left) Channel 4 header connected to converter (not buffered).
S5 Header connected to converter (Left) Channel 3 header connected to converter (not buffered).
S6 [1-2], [4-5], [7-8], [10-11](Right) Jumpers installed to select FS serial interface format.
S7 Header connected to converter (Left) Channel 2 header connected to converter (not buffered).
S8 Header connected to converter (Left) Channel 1 header connected to converter (not buffered).
Jumper Default Position Jumper Description
JP1 Open FSX NOT connected to SYNC/DRDY.
JP2 Short FSR connected to SYNC/DRDY.
JP3 Short Input buffer op-amps are powered-down.
JP4 Short Clock source selection using software control.
JP5 Short External clock source selected (invalid since using software control).

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2.2 ADS1278EVM-CVAL Operation
Perform the following steps to ensure proper hardware setup as shown in Figure 3.
• Install ADCPro software GUI per the instructions in ADCPro™ Hardware and Software Installation
Manual (SLAU372).
• Install the ADS1278EVM-CVAL plug-in GUI software per the instructions in Appendix A.
• Mate ADS1278EVM-CVAL to MMB0 EVM through connectors J3, J4, and J5.
CAUTION
Do not misalign the pins when plugging the ADS1278EVM-CVAL into the
MMB0. Check the pin alignment of J3, J4, and J5 carefully before applying
power.
• Connect USB cable from MMB0 J1 to PC.
• Connect +6-V power supply to J2 on MMB0 EVM with current limit no lower than 1 A.
• Confirm that four green LEDs on MMB0 EVM light up when powered as shown in Figure 3.
Figure 3. EVM Setup
• Launch ADCPro and then load the ADS1278EVM-CVAL plug-in by clicking on the EVM menu item and
selecting ADS1278EVM-CVAL.
• Verify that the plug-in loaded correctly by observing that the black box at the top of the plug-in screen
reads “Connected to EVM” as shown in Figure 4.

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Figure 4. Connected to EVM Status
To capture Channel 1 waveform configure ADS1278EVM-CVAL PCB as follows and as shown in Figure 5.
• Remove jumper JP3, Power down Buffer.
• Set switches S8 to right position to enable buffers in analog input signal paths.
• Using jumper cable, ground the complementary analog input of Channel 1 by connecting test point
TP1, AGND, to J3.7, ANN1.
• Set function generator to High Z mode, sine wave output, frequency = 500 Hz, Amplitude = 1 Vpp-diff,
DC offset = 500 mV, and enable the output.
• Connect function generator negative output to TP1, AGND, and positive output to J3.8, ANP1, on
ADS1278EVM-CVAL.

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Figure 5. EVM Setup AC Testing Channel 1
• On the EVM plug-in GUI, select the SETTINGS tab, set the Operating Mode to High Resolution as
shown below, leaving all other settings in the default state.

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Figure 6. Set Operating Mode to High-Resolution
• In ADCPro, select the MultiScope plug-in in the Test drop-down menu as shown in Figure 7.
Figure 7. Select Test=>MultiScope
• In ADCPro, select the Continuous button to begin continuous conversions. Confirm that the signal
being applied to Channel 1 is being captured and displayed in the Multichannel Scope window as
shown below and that the signal is roughly 1 Vpp-diff.

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Figure 8. Multichannel Scope Capture of Analog Channel 1

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3 Quick Reference
Table 4 provides a quick summary of the connections required for operation of the EVM as a standalone.
Table 4. Critical Connections
Function Header/Pin Pin Name Description
Interface
SCLK J4.3 CLKX SCLK
DIN J4.11 DX Data In
DOUT J4.13 DR Data Out
Interrupt J4.15 INT DRDY/FSYNC
Power 1.8 V J5.7 +1.8VD Digital supply 3.3 V J5.9 +3.3VD Digital supply
5.0 V J5.3 +5VA Analog supply
Analog Inputs Channels 1-4 J3.1-8 Analog Inputs
Channels 5-8 J1.3-10 Analog Inputs
CAUTION
When using the ADS1278EVM-CVAL with the MMB0 EVM, the DIP switches
S1 and S2 must all be switched up, away from the center of the board. Failure
to do so may damage the EVM.
3.1 Analog Inputs
The analog inputs for the ADS1278EVM-CVAL are connected to J1 and J3. Channels 1-4 connect to J3
and provisions are provided to buffer these signals before being connected to the converter. Switches S4,
S5, S7, and S8 control whether the buffered or unbuffered signal is connected to the ADS1278-SP.
Channels 5-8 connect to J1 and have an RC filter available to filter the input before connecting to the
converter. Channels 5-8 do not have provisions for buffering the signal.
3.2 Digital Control
The digital control signals can be applied directly to J4 (top or bottom side).
3.3 Power Supply
The ADS1278EVM-CVAL requires power rails as follows:
• 5.0-V analog supply - supplied by MMB0 motherboard via J13B
• 3.3-V digital supply - supplied by MMB0 motherboard
• 1.8-V digital supply - supplied by MMB0 motherboard
3.4 Voltage Reference
The ADS1278EVM-CVALhas two options for the reference voltage. Switch S3 selects the reference
voltage from either the buffered REF5025 or a external reference voltage that is connected to the
reference pins of J3 (J3.18 = REFN and J3.20 = REFP). Regardless of the reference source, the voltage
being provided to the ADS1278-SP can be monitored at testpoints TP2, REFN, and TP3, REFP, as shown
in Figure 9 below.