Texas Instruments ADS8354EVM-PDK User manual

User’s Guide
ADS8354EVM-PDK Evaluation Module
ABSTRACT
This user's guide describes the characteristics, operation, and use of the ADS8354 evaluation module (EVM)
performance demonstration kit (PDK). This kit is an evaluation platform for the ADS8354 device, which is a 16-
bit, dual-channel, simultaneous-sampling, 700-kSPS, differential analog input, successive approximation register
(SAR) analog-to-digital converter (ADC) that features an easy-to-use serial programming interface (SPI). The
ADS8354EVM-PDK eases evaluation with hardware, software, and computer connectivity through the universal
serial bus (USB) interface. This user's guide includes complete circuit descriptions, schematic diagrams, and a
bill of materials (BOM). Throughout this document, the terms evaluation board, evaluation module, and EVM are
synonymous with the ADS8354EVM-PDK.
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Table of Contents
1 Overview..................................................................................................................................................................................3
1.1 ADS8354EVM-PDK Features............................................................................................................................................ 3
1.2 ADS8354EVM Features.....................................................................................................................................................3
1.3 Related Documentation From Texas Instruments.............................................................................................................. 3
2 Analog Interface......................................................................................................................................................................4
2.1 Connectors for Analog Inputs.............................................................................................................................................4
2.2 ADC Input Signal Driver..................................................................................................................................................... 5
3 Digital Interfaces.....................................................................................................................................................................7
3.1 SPI for the ADC Digital I/O.................................................................................................................................................7
4 Power Supplies....................................................................................................................................................................... 8
4.1 ADC Input Driver Configuration..........................................................................................................................................8
4.2 ADC Voltage Reference Configuration...............................................................................................................................8
5 ADS8354EVM-PDK Initial Setup............................................................................................................................................ 9
5.1 Default Jumper Settings.....................................................................................................................................................9
5.2 EVM Graphical User Interface Software Installation........................................................................................................ 10
6 ADS8354EVM-PDK Operation..............................................................................................................................................13
6.1 EVM GUI Global Settings for ADC Control...................................................................................................................... 14
6.2 Time Domain Display Tool................................................................................................................................................15
6.3 Spectral Analysis Tool......................................................................................................................................................16
6.4 Histogram Analysis Tool...................................................................................................................................................17
7 Bill of Materials, Printed-Circuit Board Layout, and Schematics.....................................................................................18
7.1 Bill of Materials.................................................................................................................................................................18
7.2 PCB Layout...................................................................................................................................................................... 20
7.3 Schematics.......................................................................................................................................................................21
List of Figures
Figure 2-1. ADS8354EVM Analog Input Path..............................................................................................................................5
Figure 2-2. ADS8354EVM Common-Mode Voltage Buffer Circuit...............................................................................................6
Figure 3-1. ADS8354EVM Debug Header...................................................................................................................................7
Figure 5-1. ADS8354EVM-PDK Jumper Locations..................................................................................................................... 9
Figure 5-2. ADS835xEVM Software Installation Prompts..........................................................................................................10
Figure 5-3. Device Driver Installation Wizard Prompts.............................................................................................................. 11
Figure 5-4. LabVIEW Run-Time Engine Installation.................................................................................................................. 12
Figure 5-5. ADS8354EVM-PDK Installation Final Step............................................................................................................. 12
Figure 6-1. EVM-PDK Hardware Setup and LED Indicators..................................................................................................... 13
Figure 6-2. Launch the EVM GUI Software............................................................................................................................... 13
Figure 6-3. EVM GUI Global Input Parameters......................................................................................................................... 14
Figure 6-4. Time Domain Display Tool Options......................................................................................................................... 15
Figure 6-5. Spectral Analysis Tool............................................................................................................................................. 16
Figure 6-6. Histogram Analysis Tool.......................................................................................................................................... 17
Figure 7-1. ADS8354EVM PCB Layer 1: Top Layer.................................................................................................................. 20
Figure 7-2. ADS8354EVM PCB Layer 2: GND Plane................................................................................................................20
Figure 7-3. ADS8354EVM PCB Layer 3: Power Plane............................................................................................................. 20
Figure 7-4. ADS8354EVM PCB Layer 4: Bottom Layer............................................................................................................ 20
Figure 7-5. Schematic Diagram (Page 1): EEPROM, Power Supplies......................................................................................21
Figure 7-6. Schematic Diagram (Page 2): Analog Inputs, ADC Main, External Reference, PHI Connector............................. 22
Figure 7-7. Schematic Diagram (Page 3): Hardware Components........................................................................................... 23
List of Tables
Table 1-1. Related Documentation.............................................................................................................................................. 3
Table 2-1. Analog Input Connector Description........................................................................................................................... 4
Table 4-1. Jumper Settings for ADC Input Driver Configuration.................................................................................................. 8
Table 5-1. Default Jumper Configurations................................................................................................................................... 9
Table 6-1. External Source Requirements for Device Evaluation (SNR and THD)....................................................................16
Table 7-1. ADS8354EVM Bill of Materials................................................................................................................................. 18
Trademarks
LabVIEW™ is a trademark of National Instruments.
Microsoft® and Windows® are registered trademarks of Microsoft Corporation.
All trademarks are the property of their respective owners.
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1 Overview
The ADS8354EVM-PDK evaluation kit includes the ADS8354EVM board and the precision host interface (PHI)
controller board that enables the accompanying computer software to communicate with the ADC over the USB
for data capture and analysis.
The ADS8354EVM board includes the ADS8354 SAR ADC, all the peripheral analog circuits, and the
components required to achieve optimum performance from the ADC.
The PHI controller board primarily serves three functions:
• Provides a communication interface from the EVM to the computer through a USB port
• Provides the digital input and output signals necessary to communicate with the ADS8354 device
• Supplies power to all active circuitry on the ADS8354EVM board
Along with the ADS8354EVM and PHI controller board, this evaluation kit includes an A-to-micro-B USB cable to
connect to a computer.
1.1 ADS8354EVM-PDK Features
The ADS8354EVM-PDK showcases the following features:
• Hardware and software required for diagnostic testing and accurate performance evaluation of the ADS8354
ADC
• USB powered—no external power supply is required
• The PHI controller board provides a convenient communication interface to the ADS8354 ADC over USB 2.0
(or higher) for power delivery and digital input and output
• Easy-to-use evaluation software for Microsoft® Windows® 7, 64-bit operating systems
1.2 ADS8354EVM Features
The ADS8354EVM showcases the following features:
• Onboard low-noise, low-distortion ADC input drivers optimized to meet ADC performance
• Onboard ultra-low noise, low-dropout (LDO) regulators to generate supplies for the operation amplifiers and
ADC
1.3 Related Documentation From Texas Instruments
The documents in Table 1-1 provide information regarding Texas Instruments integrated circuits used in the
assembly of the ADS8354EVM-PDK. This user's guide is available from the TI web site under literature number
SBAU407. Any letter appended to the literature number corresponds to the document revision that is current at
the time of the writing of this document. Newer revisions may be available from the TI web site at www.ti.com,
or call the Texas Instruments Literature Response Center at [phone] or the Product Information Center at
[phone]. When ordering, identify the document by both title and literature number.
Table 1-1. Related Documentation
Device Literature Number
ADS8354 product data sheet SBAS556
THS4561 product data sheet SBOS874
OPA320 product data sheet SLOS884
TPS7A47-Q1 product data sheet SBVS118
REF6025 product data sheet SBOS708
LM7705 product data sheet SNVS420
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2 Analog Interface
The ADS8354 is a low-power, dual-channel, simultaneous-sampling ADC that supports differential analog inputs.
The ADS8354EVM uses two THS4561 fully-differential amplifiers to drive the differential ADC channel inputs
(AINP_A, AINM_A and AINP_B, AINM_B) and to center the input signal around the required common-mode
voltage for the ADS8354. An OPA320 device is used to buffer the selected common-mode voltage (VOCM). The
ADS8354EVM is designed for easy interfacing to analog sources. This section describes the front-end driver
circuitry details, including jumper configurations for the analog input signal source.
2.1 Connectors for Analog Inputs
The ADS8354EVM has two 16-bit, simultaneous-sampling ADCs. The ADS8354EVM GUI can either be
configured for individual ADC data sampling or simultaneous sampling with both ADCs. The ADS8354EVM
is designed to interface to an external, analog source through either subminiature version A (SMA) connectors
or 100-mil headers. Jumpers J1, J2, J3, and J4 are the SMA connectors that allow for analog signal source
connectivity through coaxial cables. Alternatively, 100-mil jumper cables or mini-grabbers can be used to
connect analog sources to pin 1 of connectors JP1, JP2, JP3, and JP4. Table 2-1 lists the analog input
connectors for the individual ADCs.
Table 2-1. Analog Input Connector Description
Pin Number Signal Description
J1 and J2 AINM_A,
AINP_A Analog inputs provided at the SMA for ADC A
JP2[1] and JP3[1] AINM_A,
AINP_A Alternate location to provide the analog inputs for ADC A
J3 and J4 AINM_B,
AINP_B Analog inputs provided at the SMA for ADC B
JP1[1] and JP4[1] AINM_B,
AINP_B Alternate location to provide the analog inputs for ADC B
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2.2 ADC Input Signal Driver
The SAR ADC inputs terminate in switched-capacitor networks that create large instantaneous current loads
when the switches are closed, which effectively makes the ADC inputs dynamically low impedance. The analog
inputs of the ADC are therefore driven by an THS4561 used with a gain of 1 V/V configuration to maintain ADC
performance with maximum loading at full device throughput of the ADS8354 of 700 kSPS.
2.2.1 Input Signal Path
Figure 2-1 shows the signal path for the analog inputs applied to the ADS8354EVM. Separate THS4561
amplifiers are used with a gain of 1 V/V configuration to drive the individual analog inputs (AINP and AINM)
of each ADC. The OPA320 amplifier circuits help drive the common-mode voltage (VOCM) of the THS4561
amplifiers. An RC filter, with values of Rfilt = 13 Ω, differential Cfilt = 820 pF, and common-mode Cfilt = 10 pF, was
selected to achieve a SINAD greater than 88 dB and a THD less than –97 dB for a 2-kHz sine-wave input at full
throughput of the ADS8354 of 700 kSPS.
Figure 2-1. ADS8354EVM Analog Input Path
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As shown in Figure 2-2, the ADS8354EVM offers two options to provide the output common-mode voltage
(VOCM) of the THS4561 amplifiers. By default, JP7 and JP8 are left open and JP5 and JP6 are installed. This
configuration selects the ADS8354 internal reference voltage (REFIO_A and REFIO_B) and divides the output
by 2 to use REFIO_y / 2 as VOCM (y = A or B), which is required for the default input range of ±VREF. When
using the 2xVREF input range, uninstall the jumpers on JP5 and JP6 such that VOCM = REFIO_y.
Alternatively, the REF6025 (U1) can be used in place of the REFIO_A, REFIO_B voltage to serve as the ADC
reference and to set the VOCM voltage. Disable the internal reference voltage on the ADS8354 by setting the
REF_SEL bit in the CFG register to 0b (external reference) and install jumpers on JP7 and JP8.
to REFIO_A
on ADS8354
to REFIO_B
on ADS8354
Figure 2-2. ADS8354EVM Common-Mode Voltage Buffer Circuit
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3 Digital Interfaces
As discussed in Section 1, the ADS8354EVM interfaces with the PHI, which in turn communicates with the
computer over the USB. The PHI also communicates with the EEPROM over the I2C interface. The electrically
erasable programmable read-only memory (EEPROM) comes preprogrammed with the information required to
configure and initialize the ADS8354EVM-PDK platform. When the hardware is initialized, the EEPROM is no
longer used.
3.1 SPI for the ADC Digital I/O
The ADS8354EVM-PDK supports the interface and ADC input modes detailed in the ADS8354 data sheet. The
PHI is capable of operating at a 3.3-V logic level and is directly connected to the digital I/O lines of the ADC.
As shown in Figure 3-1, a debug header (J5) with the digital I/O lines is included on the ADS8354EVM. This
header can facilitate connections to logic analyzer probes, oscilloscope probes, or external controllers.
Figure 3-1. ADS8354EVM Debug Header
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4 Power Supplies
AVDD operates from 4.5 V to 5.5 V. DVDD operates from 1.65 V to 5.5 V, independent of the AVDD supply.
The analog portion of the ADS8354EVM operates from a 5-V supply (VA) generated using the TPS7A47-Q1 low-
noise, low-dropout regulator. The same supply is used to power the positive supply of the THS4561 front-end
driver amplifiers, and the negative –232-mV supply (AVSS) is generated using the LM7705 low-noise negative
bias generator. AVSS can also be set to GND by shorting pins 2 and 3 of JP9.
The TPS7A47-Q1 regulator can be configured to generate a VA supply other than 5 V through programmable pin
settings. For more information, see the Detailed Description section of the TPS7A47-Q1 device data sheet.
The digital portion of the ADC operates from a 3.3-DVDD supply from the PHI.
4.1 ADC Input Driver Configuration
The ADS8354 only supports fully differential inputs. The ADS8354EVM allows the user to apply a fully-
differential signal on the SMA or jumpers mentioned in the input signal path, as discussed in Section 2.2.1.
A provision for a single-ended to differential conversion exists by populating JP1 or JP2 and applying a
single-ended signal on the unpopulated jumper. The THS4561 common-mode voltage (VOCM) is set by the
REF56025. REFIO / 2 can be used for VOCM by populating JP5 for ADCA and JP6 for ADCB. For various
analog input full-scale ranges supported by the ADS8354 in fully-differential mode, see the ADS8354 data sheet.
Table 4-1 shows the jumper configurations required for single-ended and fully differential analog inputs.
Table 4-1. Jumper Settings for ADC Input Driver Configuration
ADC Input Type ADC Input Full-Scale Range Required Jumper Settings Description
Single-ended analog inputs
±VREF
JP3, JP4 = Open Apply single-ended input at J2, J4
or JP3[1], JP4[1]
JP1, JP2 = Closed Ground unused inputs
JP5, JP6 = Closed Sets VOCM as VREF / 2
±2 × VREF
JP3, JP4 = Open Apply single-ended input at J2, J4
or JP3[1], JP4[1]
JP1, JP2 = Closed Ground unused inputs
JP5, JP6 = Open Sets VOCM as VREF
Fully differential analog
inputs
±VREF
JP1, JP2, JP3, JP4 = Open
Apply differential input signals to
J1, J2, J3, J4 or JP1[1], JP2[1],
JP3[1], JP4[1]
J5, J6 = Closed Sets VOCM as VREF / 2
±2 × VREF
JP1, JP2, JP3, JP4 = Open
Apply differential input signals to
J1, J2, J3, J4 or JP1[1], JP2[1],
JP3[1], JP4[1]
JP5, JP6 = Open Sets VOCM as VREF
4.2 ADC Voltage Reference Configuration
The ADS8354 has a low-noise, low-drift, 2.5-V internal voltage reference. By default, the ADS8354EVM is
configured to work with the ADC internal reference voltage of 2.5 V. The same reference voltage is brought on
pin 2 of jumpers JP7 and JP8 that can be used to drive the THS4561 common-mode voltage (VOCM) pin.
There is also a provision for using an external voltage reference for the ADC. The external reference voltage
can be generated by populating JP7 and JP8 jumpers. When using an external reference, the ADS8354 internal
voltage reference must be disabled and the device must be programmed to accept the external reference
voltage on the REFIO_x pins.
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5 ADS8354EVM-PDK Initial Setup
This section explains the initial hardware and software setup procedure that must be completed for proper
operation of the ADS8354EVM-PDK.
5.1 Default Jumper Settings
Figure 5-1 shows the silkscreen plot, which details the jumper locations for the ADS8354EVM-PDK.
Figure 5-1. ADS8354EVM-PDK Jumper Locations
Table 5-1 lists the functionality and default configuration of each jumper.
Table 5-1. Default Jumper Configurations
Reference Designator Default Configuration Description
JP1, JP2, JP3, JP4 Open Use pin 1 of these jumpers as an alternate location to provide the analog input to ADC A and
ADC B of the ADS8354.
JP5, JP6 Closed Jumpers to feed either VREF or VREF / 2 to the OPA320 input driving the THS4561 common-mode
voltage (VOCM) pin. See Section 7.3 for more details.
JP7, JP8 Open Short these pins to use the REF6025 external reference voltage. See Section 4.2 for more
details.
JP9 Closed [1-2] By default, AVSS (negative supply rail of the THS4561) is set to a –232-mV supply generated by
the LM7705. Shorting JP9[2-3] sets AVSS to GND.
JP10 Closed Jumpers to feed either GND or 5.5 V to the shutdown (SD) pin of the LM7705. By default, GND is
used to keep the SD pin low, so the LM7705 device is on. See the LM7705 data sheet for more
details.
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5.2 EVM Graphical User Interface Software Installation
The following steps describe how to install the software for the ADS8354EVM graphical user interface (GUI).
1. Download the latest version of the ADS835xEVM GUI installer from the Order & start development section
of the ADS8354EVM-PDK Tool Folder, and run the GUI installer to install the EVM GUI software on your
computer.
CAUTION
Manually disable any antivirus software running on the computer before downloading the EVM
GUI installer onto the local hard disk. Failure to disable antivirus software, depending on the
antivirus settings, may cause an error message to appear or the installer.exe file may be
deleted.
2. Accept the license agreements (Figure 5-2) and follow the on-screen instructions to complete the installation.
Figure 5-2. ADS835xEVM Software Installation Prompts
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