Texas Instruments AFE5832 User manual

1
SLOU489–August 2017
Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated
AFE5832 32-Channel Analog Front-End Evaluation Module (EVM Rev. A)
User's Guide
SLOU489–August 2017
AFE5832 32-Channel Analog Front-End
Evaluation Module (EVM Rev. A)
This user’s guide gives a general overview of the AFE5832 evaluation module (EVM) and provides a
general description of the features and functions to be considered while using this module. This manual is
applicable to the AFE5832 analog front-end, and to the Rev. A version of the EVM hardware. The
AFE5832 EVM provides a platform for evaluating the AFE under various signal, clock, reference, and ADC
output formats. In addition, the EVM supports the testing of the low-voltage differential signaling (LVDS)
interface using the TSW1400EVM capture card.
This user’s guide refers to software AFE5832 GUI v.1.0.0 or higher, and High-Speed Data Converter Pro
(HSDC Pro) Software v.4.7 and requires Microsoft Windows 7®or Windows 10®to function.
For any further questions regarding the EVM, GUI or device, contact TI support.
Contents
1 EVM Hardware Overview................................................................................................... 4
2 GUI Software Installation ................................................................................................... 5
3 Quick Views of Evaluation Setups for LVDS Interface.................................................................. 6
3.1 Equipment Setup Overview ....................................................................................... 6
4 Testing the EVM Data Capture with LVDS Interface ................................................................... 8
4.1 EVM Hardware Setup.............................................................................................. 8
4.2 Capturing an Analog Input Signal With the LVDS Interface................................................. 10
5 Testing the EVM in Digital Time Gain Compensation (DTGC) Mode ............................................... 15
6 Using the EVM in CW Mode.............................................................................................. 17
Appendix A Software Installation .............................................................................................. 19
Appendix B Overview of the AFE5832 EVM GUI Features ................................................................ 34
Appendix C Hardware Configuration .......................................................................................... 49
Appendix D Triggering Options................................................................................................. 54
Appendix E Common Hardware Modifications............................................................................... 57
Appendix F Hardware Reference.............................................................................................. 58
Appendix G FAQ and Troubleshooting........................................................................................ 82
List of Figures
1 AFE5832 EVM Hardware Overview....................................................................................... 4
2 Provided Power Cable for J1 Connector ................................................................................. 5
3 Evaluation Setup Overview................................................................................................. 6
4 TSW1400EVM and AFE5832 EVM Hardware Setup for LVDS Capture ............................................ 8
5 Connect to TSW EVM (TSW1400 Shown) ............................................................................. 10
6 Choose Firmware .......................................................................................................... 10
7 TSW1400 EVM LEDs Turn On After Firmware Download ........................................................... 11
8 AFE5832 GUI Launches .................................................................................................. 11
9 Clock Configuration on AFE EVM for LVDS Capture ................................................................. 12
10 Software Reset and Initialize Buttons on AFE5832 EVM GUI ....................................................... 12
11 AFE_RST Hardware Reset Button....................................................................................... 12
12 AFE5832 EVM GUI Data Format and Analog Configuration (LVDS) ............................................... 13
13 LED D5 on the TSW1400 EVM Turns On When ADC is Ready..................................................... 14

www.ti.com
2SLOU489–August 2017
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
AFE5832 32-Channel Analog Front-End Evaluation Module (EVM Rev. A)
14 Analog Input Capture for LVDS .......................................................................................... 14
15 DTGC Mode Test: AFE5832 EVM Switches (S5) ..................................................................... 15
16 DTGC Mode Test: Change GUI Configuration......................................................................... 15
17 DTGC Mode Test: Trigger Options ...................................................................................... 16
18 DTGC Mode Test: HSDC Pro Test Parameter Settings .............................................................. 16
19 DTGC Mode Test: Waveform............................................................................................. 16
20 CW Mode Preset........................................................................................................... 17
21 CW Output .................................................................................................................. 18
22 HSDC Pro Install (Begin).................................................................................................. 19
23 HSDC Pro Install (TI License Agreement) ............................................................................. 20
24 HSDC Pro Install (TI License Agreement).............................................................................. 20
25 HSDC Pro Install (Install Directory)...................................................................................... 21
26 HSDC Pro Install (Installation Ready)................................................................................... 21
27 HSDC Pro Install (Cypress Driver Install)............................................................................... 22
28 HSDC Pro Install (Continue Installation)................................................................................ 22
29 HSDC Pro Install (Continue Driver Installation)........................................................................ 23
30 HSDC Pro Install (Finish Installation).................................................................................... 23
31 AFE5832 GUI Install (Begin Installation)................................................................................ 24
32 AFE5832 GUI Install (TI License Agreement).......................................................................... 25
33 AFE5832 GUI Install (National Instruments®License Agreement) .................................................. 26
34 AFE5832 GUI Install (PSF License Agreement)....................................................................... 27
35 AFE5832 GUI Install (Install Directory) ................................................................................. 28
36 AFE5832 GUI Install (Select Components)............................................................................. 28
37 AFE5832 GUI Install (Installation Ready)............................................................................... 29
38 AFE5832 GUI Install (Installation Progress)............................................................................ 29
39 AFE5832 GUI Install (Installation for Users)............................................................................ 30
40 AFE5832 GUI Install (Python®is Already Installed) .................................................................. 30
41 AFE5832 GUI Install (Destination Directory) .......................................................................... 31
42 AFE5832 GUI Install (Customize Python®)............................................................................ 31
43 AFE5832 GUI Install (Python®Installation Progress) ................................................................. 32
44 AFE5832 GUI Install: (Python®Finished)............................................................................... 32
45 AFE5832 GUI Install (Finished) ......................................................................................... 33
46 AFE5832: Hovering Over Controls....................................................................................... 34
47 AFE5832: Quick Setup Tab............................................................................................... 36
48 AFE5832: Quick Setup: HSDC Pro Related Parameters............................................................. 37
49 AFE5832: VCA: VCA and CW Mixer .................................................................................... 38
50 AFE5832: VCA: DTGC .................................................................................................... 39
51 AFE5832: ADC: Top Level................................................................................................ 40
52 AFE5832: ADC: Test Pattern............................................................................................. 41
53 AFE5832: ADC: Digital Signal Processing.............................................................................. 42
54 Clicking on Register and Field Names .................................................................................. 43
55 AFE5832: Register Map Configuration: Update Modes............................................................... 44
56 AFE5832: Register Map Configuration: Immediate Update Mode................................................... 45
57 AFE5832: Register Map Configuration: Deferred Update Mode..................................................... 46
58 AFE5832: Register Map Configuration: Changing Register Value .................................................. 47
59 AFE5832: Register Map Configuration: Manual Data Entry.......................................................... 48
60 Default Jumper Positions.................................................................................................. 49
61 EVM ADC Clock Source Configuration.................................................................................. 51
62 AFE EVM ADC Clock Source Configuration Schematic .............................................................. 52

www.ti.com
3
SLOU489–August 2017
Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated
AFE5832 32-Channel Analog Front-End Evaluation Module (EVM Rev. A)
63 EVM ADC Clock Source Configuration Examples..................................................................... 52
64 CPLD Switches and LEDs ................................................................................................ 53
65 HSDC Pro Trigger Configuration for SW................................................................................ 54
66 HSDC Pro Trigger Configuration for SW Trigger ...................................................................... 55
67 HSDC Pro Trigger Configuration for HW................................................................................ 55
68 HSDC Pro Trigger Configuration for HW External Trigger ........................................................... 56
69 AFE5832 EVM Block Diagram ........................................................................................... 58
70 AFE5832 Rev. A EVM Schematic 1 of 12 .............................................................................. 59
71 AFE5832 Rev. A EVM Schematic 2 of 12 .............................................................................. 60
72 AFE5832 Rev. A EVM Schematic 3 of 12 .............................................................................. 61
73 AFE5832 Rev. A EVM Schematic 4 of 12 .............................................................................. 62
74 AFE5832 Rev. A EVM Schematic 5 of 12 .............................................................................. 63
75 AFE5832 Rev. A EVM Schematic 6 of 12 .............................................................................. 64
76 AFE5832 Rev. A EVM Schematic 7 of 12 .............................................................................. 65
77 AFE5832 Rev. A EVM Schematic 8 of 12 .............................................................................. 66
78 AFE5832 Rev. A EVM Schematic 9 of 12 .............................................................................. 67
79 AFE5832 Rev. A EVM Schematic 10 of 12............................................................................. 68
80 AFE5832 Rev. A EVM Schematic 11 of 12............................................................................. 69
81 AFE5832 Rev. A EVM Schematic 12 of 12............................................................................. 70
82 Read DDR Error for No Capture ......................................................................................... 82
List of Tables
1 Default Header Configuration Table Rev. A............................................................................ 50
2 EVM Rev. A Testpoints ................................................................................................... 50
3 AFE5832 EVM Bill of Materials .......................................................................................... 71
Trademarks
Microsoft Windows 7, Windows 10 are registered trademarks of Microsoft Corporation.
National Instruments is a registered trademark of National Instruments Corporation.
Python is a registered trademark of Python Software Foundation.
Xilinx is a trademark of Xilinx Incorporated.
All other trademarks are the property of their respective owners.

EVM Hardware Overview www.ti.com
4SLOU489–August 2017
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
AFE5832 32-Channel Analog Front-End Evaluation Module (EVM Rev. A)
1 EVM Hardware Overview
Figure 1. AFE5832 EVM Hardware Overview
The EVM received should resemble Figure 1. For more hardware details and the default jumper map, see
Appendix C.

www.ti.com GUI Software Installation
5
SLOU489–August 2017
Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated
AFE5832 32-Channel Analog Front-End Evaluation Module (EVM Rev. A)
The AFE5832 EVM kit contains the following items:
1. AFE5832 EVM
2. 1 mini-USB cable
3. Power cable with barrel connector
space
Figure 2. Provided Power Cable for J1 Connector
2 GUI Software Installation
The AFE5832 EVM and the TSW capture card EVM have individual software and both require software
installations. Ensure that no USB connections are made to the EVMs until after the installations are
complete. This user’s guide refers to software AFE5832 GUI v.1.0.0, and HSDC Pro Software v.4.7.
See the HSDCPro Installation section for information on the installation of the TSW EVM Software GUI
(HSDC Pro). For information on the installation of the AFE5832 EVM Software GUI, see the AFE5832
EVM GUI Installation section.

AFE58xx32EVM GUI HSDCPro GUI
USB USB
5-V Supply (2-A Capacity)
í5-V Supply (1-A Capacity)
J61 and TP54 (±5 V, GND)
AFE58xx32EVM TSW EVM
USBJ65
Input Signal Generator
5-V Supply (2-A Capacity)
5-V_In (2-A Capacity)
J1íJ34
External Clock Reference (Optional)
J39 or J56
Quick Views of Evaluation Setups for LVDS Interface www.ti.com
6SLOU489–August 2017
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
AFE5832 32-Channel Analog Front-End Evaluation Module (EVM Rev. A)
3 Quick Views of Evaluation Setups for LVDS Interface
The AFE5832 EVM is tested using the TSW1400EVM for LVDS data interface.
3.1 Equipment Setup Overview
As shown in Figure 3, mating the AFE5832 EVM with a TSW EVM allows for testing using the data
interface.
Figure 3. Evaluation Setup Overview
TSW Capture Card EVM: The TSW1400 EVM is required for capturing data from the AFE5832 EVM and
its analysis using the graphical user interface (GUI), called High Speed Data Converter Pro (HSDC Pro).
For more information on the TSW1400EVM, see: TSW1400EVM.
Power Supply: A barrel connector power cable is provided with the EVM and is connected at J61, but
does not support the –5 V needed for the CW mode. This requires an additional cable, not provided.
This 5-V power supply must be able to source up to 2 A, and –5-V supply must provide up to 1 A. The –5-
V supply is used for the negative supply of amplifiers in the CW output external circuitry. The TSW1400
EVM is powered through a power cable similar to Figure 2 that is provided with its own EVM kit.
USB Interface to PC: The USB connections from the AFE5832 EVM and TSW EVM to the PC are used
for communication from the GUIs to the boards. USB 2.0 or 3.0 ports are both acceptable.

www.ti.com Quick Views of Evaluation Setups for LVDS Interface
7
SLOU489–August 2017
Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated
AFE5832 32-Channel Analog Front-End Evaluation Module (EVM Rev. A)
Equipment: Signal generators (with low-phase noise) must be used as source of the input signal for
optimal performance. An onboard crystal oscillator option is provided so that an external clock source is
not needed for basic capture. Additionally, for best performance a band-pass filter (BPF) is recommended
on the analog input signal to attenuate the harmonics and noise from the signal. For coherent sampling or
custom sample rate, an external clock is provided to J39 or J56 (GUI configuration is required for the
external clock configuration). For more information on clock configuration, see Section C.1.3.

Testing the EVM Data Capture with LVDS Interface www.ti.com
8SLOU489–August 2017
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
AFE5832 32-Channel Analog Front-End Evaluation Module (EVM Rev. A)
4 Testing the EVM Data Capture with LVDS Interface
This section outlines (1) the external connections required to test the AFE5832 EVM using the LVDS
interface, (2) how to setup the GUIs for testing, and (3) how to capture an analog input signal.
4.1 EVM Hardware Setup
Make the connections shown in Figure 4 for proper hardware setup.
Figure 4. TSW1400EVM and AFE5832 EVM Hardware Setup for LVDS Capture
1. Board Mating: For LVDS data, mate the TSW1400 EVM at connector J3 to the AFE5832 EVM at
connector J48 through the high-speed ADC interface connector.
2. Power Supply: Connect a 5-V (2-A) power supply using the provided power cable to J12 (+5V_IN) of
the TSW1400 EVM or J11 (+5V_IN) of the TSW14J50 EVM . See the TSW manual for more
information, if needed.
Next, connect a 5-V (2-A) power supply using the provided power cable to J61 of the AFE5832 EVM.
Connect the white-striped side of this cable to the positive side of the 5-V power supply.
Optionally, connect a –5-V (1-A) supply at J63 or TP54 if using the CW circuit. No cable is provided for
this.
Turn on the TSW1400 at the SW7 switch.
3. USB: After installing the GUIs as shown in Appendix A, connect the USB cable from the PC to J65
(USB) located on the top side of the AFE5832 EVM. Connect the USB cable from PC to J5 (USB_IF)
of the TSW1400 EVM.
NOTE: TI recommends that the PC USB port be able to support USB2.0. If unsure, always choose
the USB ports at the back of the PC chassis over ones located on the front or sides.
4. Equipment: Connect a sine wave generator to SMA J1, INP1. Set the frequency to 5 MHz and the
amplitude to –20 dBm. For best performance, a 5-MHz band-pass filter (BPF) is recommended on the
analog input signal to attenuate the harmonics and noise from the signal.
5. CPLD Switches: Ensure that all 4 switches in S5 are in the 'off' position. LEDs D5–D8 should be lit up.

www.ti.com Testing the EVM Data Capture with LVDS Interface
9
SLOU489–August 2017
Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated
AFE5832 32-Channel Analog Front-End Evaluation Module (EVM Rev. A)
S4 should be 'off' immediately after powering up the board for LVDS capture, but can be manipulated
for other modes. For more information on the Complex Programmable Logic Device (CPLD), refer to
Section C.1.4.

Testing the EVM Data Capture with LVDS Interface www.ti.com
10 SLOU489–August 2017
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
AFE5832 32-Channel Analog Front-End Evaluation Module (EVM Rev. A)
4.2 Capturing an Analog Input Signal With the LVDS Interface
This section describes the software setup for capturing an analog input using the AFE5832 EVM. If there
is any issue with a data capture, refer to the troubleshooting section.
Data capture is confirmed by using only the Quick Setup page of the AFE5832 GUI. Assuming the
hardware is connected correctly as in Section 4.1, follow these steps to acquire data:
4.2.1 HSDC Pro Actions
1. Connect both EVMs to the PC using two USB cables as instructed in Section 4.1.
2. Open the HSDC Pro GUI using Run as Administrator.Do not open the AFE5832 GUI before this
step because it opens automatically. If it is already open, close it.
3. If the TSW Hardware is already connected to the USB, then a pop-up window should appear to
connect the HSDC Pro GUI to the EVM Hardware.
Figure 5. Connect to TSW EVM (TSW1400 Shown)
4. A pop-up window prompts the user to choose a firmware to download to the TSW EVM FPGA.
5. Select firmware: In the upper left-hand corner "Select ADC" box, type the name of your device and the
drop-down list will automatically filter based on your input. Then, from the drop-down, choose your
desired format. Be sure to choose the correct device to match the AFE5832 EVM hardware or the
AFE5832 GUI will show an error when launching.
Figure 6. Choose Firmware
6. When prompted to update the firmware, click the Yes button.
7. The firmware begins downloading to the FPGA on the TSW EVM.
8. When the firmware has finished downloading, several Green LEDs are lit on the TSW EVM. For the
TSW1400, D5 (USER_LED3) is usually off when the EVM is not configured, and D6 is off.

www.ti.com Testing the EVM Data Capture with LVDS Interface
11
SLOU489–August 2017
Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated
AFE5832 32-Channel Analog Front-End Evaluation Module (EVM Rev. A)
Figure 7. TSW1400 EVM LEDs Turn On After Firmware Download
9. The AFE5832 EVM GUI opens automatically. Wait until this is finished before continuing. If any errors
arise at this time, contact TI support.
Figure 8. AFE5832 GUI Launches

Testing the EVM Data Capture with LVDS Interface www.ti.com
12 SLOU489–August 2017
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
AFE5832 32-Channel Analog Front-End Evaluation Module (EVM Rev. A)
4.2.2 AFE5832 GUI Actions
1. Verify the clock configuration by matching J42, J40, and J54 to Figure 9. Provide a 160-MHz, +13-dBm
clock to J56.
Figure 9. Clock Configuration on AFE EVM for LVDS Capture
2. Press the DUT RESET button on the AFE5832 GUI.
3. Press the Initialize Device button on the AFE5832 EVM GUI (Figure 10). These buttons are located
close to the upper left-hand corner of the GUI window.
• Alternatively, there is an option to use the hardware reset. Press the AFE_RST button on the AFE
EVM, located above the AFE device (S1), as shown in Figure 11. Hold for 1 second. Then, press
the Initialize Device button on the AFE5832 EVM GUI.
Figure 10. Software Reset and Initialize Buttons on AFE5832 EVM GUI
Figure 11. AFE_RST Hardware Reset Button

www.ti.com Testing the EVM Data Capture with LVDS Interface
13
SLOU489–August 2017
Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated
AFE5832 32-Channel Analog Front-End Evaluation Module (EVM Rev. A)
4. Ensure there is no SMA cable connected to J37 TX_Trig on the AFE5832EVM.
5. Turn switch 4 contained in S5 on the AFE EVM 'off' for LVDS only. The red LED, D8 should light up.
For more information on the Complex Programmable Logic Device (CPLD), refer to Section C.1.4.
6. Choose the Data Formats and the Analog Configuration for each category as shown in Figure 12:
• OUTPUT FORMAT: Select ‘LVDS: 12x 12b’
• ADC FORMAT: Select ‘Analog Input’
• VCA GAIN: Select ‘Mid Gain’
• DTGC Modes: Select ‘Programmable Fixed-Gain Mode’
NOTE: Ensure the right CPLD switches are configured on S5 as detailed for each capture mode.
Figure 12. AFE5832 EVM GUI Data Format and Analog Configuration (LVDS)

Testing the EVM Data Capture with LVDS Interface www.ti.com
14 SLOU489–August 2017
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
AFE5832 32-Channel Analog Front-End Evaluation Module (EVM Rev. A)
7. At this point, D5 on the TSW1400 EVM should turn on. If this is not the case, consult Appendix G.
There is most likely an ADC clock issue.
Figure 13. LED D5 on the TSW1400 EVM Turns On When ADC is Ready
8. Return to HSDC Pro, and press the Capture button in the upper left-hand corner (as shown in
Figure 14). A capture similar to that shown in Figure 14 appears for a successful capture. The quality
of the output spectrum depends heavily on the coherency and the purity of the input signal and clock.
Figure 14. Analog Input Capture for LVDS

www.ti.com Testing the EVM in Digital Time Gain Compensation (DTGC) Mode
15
SLOU489–August 2017
Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated
AFE5832 32-Channel Analog Front-End Evaluation Module (EVM Rev. A)
5 Testing the EVM in Digital Time Gain Compensation (DTGC) Mode
Use the following steps to test the EVM in DTGC mode:
a. Input a 5-MHz, –20-dBm signal to any SMA input on the AFE EVM. Connect a 5-MHz filter to the input
signal. Connect a single SMA-SMA cable from J11 (TSW EVM) to J37 (AFE EVM).
b. Change the jumper configurations as outlined in Section C.1.3 and apply a 160-MHz, 10-dBm external
LMK input clock to J56 or clock at 4× the desired ADC sample rate.
c. Set the switches of the AFE5832 EVM at S5 for 'Up-Down Ramp Mode' as Figure 15 illustrates. LEDs
D6-D8 should be lit and LED D5 should be off.
Figure 15. DTGC Mode Test: AFE5832 EVM Switches (S5)
d. Choose AFE5832.ini as firmware on HSDC Pro.
e. Change the DTGC Mode on the AFE5832 EVM GUI to ‘Up-Down Ramp Mode’ and configure the other
formats as shown in Figure 16:
Figure 16. DTGC Mode Test: Change GUI Configuration
f. In HSDC Pro, navigate to the Trigger Option menu. Choose “Trigger mode enable” and “Arm on next
capture button press” as shown in Figure 17.

Testing the EVM in Digital Time Gain Compensation (DTGC) Mode www.ti.com
16 SLOU489–August 2017
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
AFE5832 32-Channel Analog Front-End Evaluation Module (EVM Rev. A)
Figure 17. DTGC Mode Test: Trigger Options
g. Change the ADC Output Data Rate to '20M' and the ADC Input Target Frequency to '5M'. Set the view
display to ‘Codes’.
Figure 18. DTGC Mode Test: HSDC Pro Test Parameter Settings
h. Press the Capture button on HSDC Pro.
i. The Up-Down Ramp DTGC waveform should appear similar to Figure 19.
Figure 19. DTGC Mode Test: Waveform

www.ti.com Using the EVM in CW Mode
17
SLOU489–August 2017
Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated
AFE5832 32-Channel Analog Front-End Evaluation Module (EVM Rev. A)
6 Using the EVM in CW Mode
Demonstrating the CW mixer in the AFE is done by following these steps:
1. In the AFE5832 GUI, reset and initialize the device by referring to Figure 10 and Figure 11. Remember
to connect a –5-V and a 5-V source to the device.
2. Connect a sine wave generator to any SMA channel. Set the frequency to 1.963125 MHz and the
amplitude to –23 dBm.
3. Provide a 125-MHz, +10-dBm clock input to J56 of the AFE EVM (LMK external clock). Refer to
Section C.1.3 for jumper configurations.
4. Turn Switch 4 contained in S5 on the AFE EVM to 'on'. The red LED, D8 should not light up. For more
information on the CPLD, refer to Section C.1.4.
5. Connect two cables to an oscilloscope with timebase of 40 µs and 500 mV / div. Input resistance
should be 1 MΩon each scope channel. DC couple the oscilloscope.
6. Connect those two cables to SMAs, J66 and J68 on the AFE EVM.
7. Choose the following data format on the AFE5832 EVM GUI:
Figure 20. CW Mode Preset
8. Trigger the oscilloscope on either channel.
9. The oscilloscope displays the frequency I and Q signals at 10 kHz as shown in Figure 21. The
amplitude should be around 1.5 Vpp ±300 mVpp, though this amplitude may change. The frequency
should be 10 kHz and the I and Q signals should be 90 degrees out of phase.

Using the EVM in CW Mode www.ti.com
18 SLOU489–August 2017
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
AFE5832 32-Channel Analog Front-End Evaluation Module (EVM Rev. A)
Figure 21. CW Output

19
SLOU489–August 2017
Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated
Software Installation
Appendix A
SLOU489–August 2017
Software Installation
Section A.1 provides detailed procedures for installing High Speed Data Converter Pro (HSDC Pro), the
software GUI used to control a suite of FPGA capture solutions including the TSW1400. Section A.2
provides details for installing the AFE5832 EVM GUI.
A.1 High Speed Data Converter Pro (HSDC Pro) GUI Installation
Download HSDC Pro v.4.7 from the mySecureSoftware folder at
https://www.ti.com/securesoftware/docs/securesoftwarehome.tsp.
1. Unzip the saved file and run the installer executable (Run as Administrator) to obtain the menu shown
in Figure 22.
2. Click the Next button.
Figure 22. HSDC Pro Install (Begin)

High Speed Data Converter Pro (HSDC Pro) GUI Installation www.ti.com
20 SLOU489–August 2017
Submit Documentation Feedback
Copyright © 2017, Texas Instruments Incorporated
Software Installation
3. Read the License Agreement from Texas Instruments and select I accept the License Agreement, then
press the Next button as shown in Figure 23.
Figure 23. HSDC Pro Install (TI License Agreement)
4. Read the License Agreement from Texas Instruments and select I accept the agreement, then press
the Next button as shown in Figure 24.
Figure 24. HSDC Pro Install (TI License Agreement)