Texas Instruments BQ25611D User manual

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BQ25611D, BQ25619 (BMS025) Evaluation Module
User's Guide
SLUUC27B–June 2019–Revised January 2020
BQ25611D, BQ25619 (BMS025) Evaluation Module
This user's guide provides detailed testing instructions for the BQ25611D and BQ25619 evaluation module
(EVM). Also included are descriptions of the necessary equipment, equipment setup, procedures, the
printed-circuit board layouts, schematics, and the bill of materials (BOM).
Throughout this user's guide, the abbreviations EVM,BQ25611DEVM,BQ25619EVM, BMS025, and the
term evaluation module are synonymous with the BMS025 evaluation module, unless otherwise noted.
Contents
1 Introduction ................................................................................................................... 3
1.1 EVM Features....................................................................................................... 3
1.2 I/O Descriptions..................................................................................................... 3
2 Test Summary................................................................................................................ 4
2.1 Equipment ........................................................................................................... 4
2.2 Equipment Setup.................................................................................................... 5
2.3 Software Setup...................................................................................................... 5
2.4 Test Procedure...................................................................................................... 7
3 PCB Layout Guideline ..................................................................................................... 11
4 Board Layout, Schematic, and Bill of Materials ........................................................................ 12
4.1 Board Layout....................................................................................................... 12
4.2 Schematics......................................................................................................... 20
4.3 Bill of Materials .................................................................................................... 22
List of Figures
1 Original Test Setup for BMS025A......................................................................................... 5
2 BQStudio Device Type Selection Window ............................................................................... 6
3 BQStudio Charger Selection Window..................................................................................... 6
4 Main Window of BQ2561x EVM Software................................................................................ 6
5 BQ25619EVM Charge Mode Efficiency .................................................................................. 9
6 BQ25619EVM Boost Mode Efficiency................................................................................... 10
7 BMS025 Rev. A Top Overlay............................................................................................. 12
8 BMS025 Rev. A Top Solder Mask....................................................................................... 13
9 BMS025 Rev. A Top Layer ............................................................................................... 14
10 BMS025 Rev. A MidLayer 1 .............................................................................................. 15
11 BMS025 Rev. A MidLayer 2 .............................................................................................. 16
12 BMS025 Rev. A Bottom Layer ........................................................................................... 17
13 BMS025 Rev. A Bottom Solder Mask ................................................................................... 18
14 BMS025 Rev. A Bottom Overlay......................................................................................... 19
15 BQ25619EVM Schematic................................................................................................. 20
16 BQ25611DEVM Schematic ............................................................................................... 21
List of Tables
1 Device Data Sheets ......................................................................................................... 3
2 EVM I/O Connections ....................................................................................................... 3
3 EVM Shunt and Switch Installation........................................................................................ 3

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BQ25611D, BQ25619 (BMS025) Evaluation Module
4 Recommended Operating Conditions..................................................................................... 4
5 BQ25619EVM Bill of Materials ........................................................................................... 22
6 BQ25611DEVM Bill of Materials ......................................................................................... 26
Trademarks
Microsoft, Windows are registered trademarks of Microsoft Corporation.
All other trademarks are the property of their respective owners.

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BQ25611D, BQ25619 (BMS025) Evaluation Module
1 Introduction
1.1 EVM Features
For detailed features and operation, refer to Table 1 for a list of devices and their data sheets.
Table 1. Device Data Sheets
Device Data Sheet EVM Label Variant
BQ25611D SLUSDF6 BQ25611DEVM 002
BQ25619 SLUSDF8 BQ25619EVM 005
The BMS025 evaluation module (EVM) is a complete charger module for evaluating an I2C-controlled,
single-cell NVDC charge using any of the devices listed above.
This EVM does not include an EV2300/EV2400 interface board. To evaluate the EVM, an
EV2300/EV2400 interface board must be ordered separately.
1.2 I/O Descriptions
Table 2 lists the input and output connections available on this EVM and their respective descriptions.
Table 2. EVM I/O Connections
Jack Description
J1(2) –VIN Positive rail of the charger input voltage
J1(1) –GND Ground
J2(1) – SYSTEM Positive rail of the charger system output voltage, typically connected to the system
load
J2(2) –GND Ground
J3(1) –PMID Positive rail of the charger output voltage for power bank applications in reverse boost
mode (OTG). This output also shares the rail with the VIN input rail in forward buck
mode
J3(2) –GND Ground
J4(3) –BATTERY Positive rail of the charger battery input, connected to the positive terminal of the
external battery
J4(2) – BATSNS Input connected to the positive node of the battery for remote cell voltage
measurement
J4(1) - GND Ground
J5 I2C 4-pin connector for the EV2300/2400 interface board
J6 Input source Micro B USB port
Table 3 lists the jumper and shunt installations available on this EVM and their respective descriptions.
Table 3. EVM Shunt and Switch Installation
Jack Description BQ25611D Setting BQ25619 Setting
JP1 I/O Pullup rail selection. Selection will have either BAT or SYS as the pullup rail
for SDA, SCL, CE, PG, STAT, and INT pins PULLUP to SYS Short PULLUP to SYS
JP2 Remote BATSNS pin connection to Battery input terminal. Disconnect if sensing
battery voltage remotely through J4(2). If disconnected with no input on J4(2),
charger BATSNS will default connect to BAT pin internally.
Installed Installed
JP3 PMID_GOOD pin connection to control N-Ch. MOSFET for a power bank
application Not Installed Installed
JP4 Thermistor COOL temperature setting. Connect jumper to simulate charger
entering TCOOL (T1-T2) temperature region. Not Installed Not Installed
JP5 Thermistor COLD temperature setting. Connect jumper to simulate charger
entering TCOLD (<T1) temperature region. Not Installed Not Installed
JP6 Micro B USB input D- connection to charger D- pin Installed Not Installed

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Table 3. EVM Shunt and Switch Installation (continued)
Jack Description BQ25611D Setting BQ25619 Setting
JP7 Thermistor NORMAL temperature setting. Connect jumper to simulate charger
entering TNORMAL (T2-T3) temperature region. Installed Installed
JP8 Thermistor WARM temperature setting. Connect jumper to simulate charger
entering TWARM (T3-T5) temperature region. Not Installed Not Installed
JP9 Thermistor HOT temperature setting. Connect jumper to simulate charger
entering THOT (>T5) temperature region. Not Installed Not Installed
JP10 Micro B USB input D+ connection to charger D+ pin Installed Not Installed
JP11 PG pin LED indicator connection. On PG enabled chargers, this indicates the
Power Good status Not Installed Not Installed
JP12 STAT pin LED indicator connection. This indicates the current charger Status Installed Installed
JP13 Charger D+ pin and charger D- pin short connection. Connect this on D+/D-
detection enabled chargers to simulate the connection of a DCP-type USB port
as defined by USB BC1.2
Not Installed Not Installed
JP14 CE pin connection to ground to enable charging. When removed, CE pin will pull
up to disable charge Installed Installed
JP15 PSEL pin input current selection. Connect this to HIGH on PSEL enabled
chargers to select 500mA default input current limit. Connect this to LOW on
PSEL enabled chargers to select 2.4-A default input current limit
Not Installed Short PSEL to
LOW
JP16 VPB status LED indicator connection. On power bank PMID_GOOD enabled
chargers, this indicates VPB rail is active Not Installed Not Installed
S1 QON control switch. Press either for exiting Shipping Mode or System Reset. Default Off Default Off
Table 4 lists the recommended operating conditions for this EVM.
(1) BQ25619EVM maximum IBAT is 1.5A.
Table 4. Recommended Operating Conditions
Symbol Description MIN TYP MAX Unit
VVBUS, VVAC Input voltage applied to VAC and VBUS pins 3.9 14.0 V
VBAT Battery voltage applied to BAT pin 0 4.208 4.52 V
IVBUS Input current into VBUS 0 3.2 A
ISW Output current (SW) 3.2 A
IBAT Fast charging current 0 3.0 (1) A
Discharging current through internal BATFET 6 A
2 Test Summary
2.1 Equipment
This section includes a list of supplies required to perform tests on this EVM.
1. Power Supplies: Power Supply #1 (PS1): A power supply capable of supplying 5 V at 3 A is required.
While this part can handle larger voltage and current, it is not necessary for this procedure.
2. Loads: Load #1 (4-Quadrant Supply, Constant Voltage < 4.5 V): A "Kepco" Load, BOP, 20-5M, DC 0
to ±20 V, 0 to ±5 A (or higher)
Alternative Option: A 0–20V/0–5 A, > 30-W DC electronic load set in a constant voltage loading mode
Load #2(Electronic or Resistive Load): 10 Ω, 5 W (or higher)
3. Meters: (6x) "Fluke 75" multimeters, (equivalent or better).
Alternative Option: (4x) equivalent voltage meters and (2x) equivalent current meters. The current
meters must be capable of measuring at least 5-A.
4. Computer: A computer with at least one USB port and a USB cable. Must have the latest version of
Battery Management Studio installed.
5. USB-TO-GPIO Communication Kit: EV2300/EV2400 USB-based PC interface board.

Power Supply
#1
Load #1
V
V
EV2300/2400
V
4-pin Connector
USB
+
-
+
-
+
-
V
+
-
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6. Software: Download the latest version of BQSTUDIOTEST from www.ti.com.
Double click the Battery Management Studio installation file and follow the installation steps. The
software supports the Microsoft®Windows®XP, 7, and 10 operating systems.
2.2 Equipment Setup
Use the following list to set up the EVM testing equipment:
1. Review EVM connections in Table 2.
2. Set PS1 for 5-V DC, 2-A current limit and then turn off the supply.
3. Connect the output of PS1 in series with a current meter to J1 (VBUS and PGND).
4. Connect a voltage meter across TP12 (VBUS) and TP31 (PGND), or across J1.
5. Turn on Load #1, set to constant voltage mode, and output to 2.5-V. Disable Load. Connect Load in
series with a current meter (multimeter), ground side, to J4 (BAT and PGND) as shown in Figure 1.
6. Connect one voltage meter across TP16 (BAT) and TP30 (PGND), or across J4-3 and J4-1 as shown
in Figure 1.
7. Connect one voltage meter across TP17 (SYS) and TP30 (PGND), or across J2-1 and J2-2 as shown
in Figure 1.
8. Connect one voltage meter across TP14 (VPB) and TP32 (PGND), or across J3-1 and J3-2 as shown
in Figure 1.
9. Connect the EV2300/2400 USB interface board to the computer with a USB cable and from I2C port to
J5 with the 4-pin cable. The connections are shown in Figure 1.
10. Install shunts as shown in Table 3.
Figure 1. Original Test Setup for BMS025A
2.3 Software Setup
Use the following to set up the EVM testing software:
1. On the computer connected to the EV2300/2400 interface board, launch Battery Management Studio
(BQStudio). Select Charger as seen in Figure 2.
2. Select the appropriate configuration file based on the device from the window shown in Figure 3.
3. Choose , on the window that appears, and the main window of the BQ2561X EVM
software will appear, as shown in Figure 4.

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Figure 2. BQStudio Device Type Selection Window Figure 3. BQStudio Charger Selection Window
Figure 4. Main Window of BQ2561x EVM Software

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2.4 Test Procedure
2.4.1 Initial Settings
Use the following steps for enable the EVM test setup:
1. Make sure Equipment Setup steps have been followed.
2. Launch the BQ2561X EVM GUI software, if not already done.
3. Turn on PS1:
•Measure →Vsys (SYS-TP17 and PGND-TP30) = 4.20V ±0.3V
NOTE: Completely dsconnect Load #1 from BATTERY connections if different value is seen.
2.4.2 Communication Verification
Use the following steps for communication verification:
1. In the EVM software, click the button
• Verify that the GUI reads in the top right corner.
NOTE: If the device reads verify Section 2.2 and Section 2.4.1 steps have
been followed.
2. In the Field View (see Figure 4), make the following changes as necessary:
• Set
• Set
• Set
• Set
• Set
• Set
• Set
• Check
• Uncheck
2.4.3 Charger Mode Verification
Use the following steps for charger mode verification:
1. PS1 should be on from Section 2.4.1. In the EVM software, click twice.
• Verify that all Fault statuses read "Normal"

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•Verify →STAT LED (D5) is ON
2. Enable Load #1 (see Section 2.2)and take measurements as follows:
•Measure →VSYS (SYS-TP17 and PGND-TP30) = 3.65V ±0.3V
•Measure →VBAT (BATTERY-TP16 and PGND-TP30) = 2.5V ±0.2V
•Measure →IBAT = 240mA ±50mA
3. Change Load #1 to 3.7V and take measurements as follows:
•Measure →VSYS (SYS-TP17 and PGND-TP30) = 3.8V ±0.3V
•Measure →VBAT (BATTERY-TP16 and PGND-TP30) = 3.7V ±0.2V
•Measure →IBAT = 480mA ±200mA
4. In the EVM software, set
•Measure →IIN = 500mA ±200mA

Charge Current (A)
Charge Efficiency (%)
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.593725
75
80
85
90
95
100
VBUS = 5 V
VBUS = 9 V
VBUS = 12 V
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2.4.4 Boost Mode Verification
Use the following steps for boost mode verification:
1. Turn off and disconnect PS1.
2. Set Load #1 to 3.7V and 2A current limit.
NOTE: If Load #1 connected from BATTERY-J4(3) to PGND-J4(1) is not a four quadrant supply,
remove Load #1 and use PS1 (disconnected in 8.4.1), set to 3.7V, 2A current limit and
connect to BATTERY-J4(3) to PGND-J4(1).
3. In the EVM software, check .
4. Connect Load #2
• For BQ25619 (BMS025-005): across VPB-J3(1) and PGND-J3(2).
• For all others: across VIN-J1(2) and PGND-J1(1).
• For BQ25619, measure VPB (VPB-TP14 and PGND-TP32) = 5.0V ±0.2V.
• For all others, measure VBUS (VBUS-TP12 and PGND-TP31) = 5.0V ±0.2V.
5. Turn off and disconnect power supply.
6. Remove Load #2 from connection.
2.4.5 Evaluation Results
This section contains efficiency data for both Charger Mode and Boost Mode, specifically on the
BQ25619EVM.
Figure 5. BQ25619EVM Charge Mode Efficiency

Boost Output Current (A)
Boost Efficiency (%)
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
75
80
85
90
95
100
VBAT = 3.2 V
VBAT = 3.8 V
VBAT = 4.2 V
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Figure 6. BQ25619EVM Boost Mode Efficiency
2.4.6 Helpful Tips
1. The leads and cables to the various power supplies, batteries and loads have resistance. The current
meters also have series resistance. The charger dynamically reduces charge current depending on the
voltage sensed at its VAC/VBUS pin (using the VINDPM feature), BAT pin (as part of normal
termination), and TS pin (through its battery temperature monitoring feature via battery thermistor).
Therefore, voltmeters must be used to measure the voltage as close to the IC pins as possible instead
of relying on the digital readouts of the power supply. If a battery thermistor is not available, make sure
shuntJP7 is in place.
2. When using a source meter that can source and sink current as your battery simulator, TI highly
recommends adding a large (1000+ μF) capacitor at the EVM BATTERY and GND connectors in order
to prevent oscillations at the BAT pin due to mismatched impedances of the charger output and source
meter input within their respective regulation loop bandwidths. Configuring the source meter for 4-wire
sensing eliminates the need for a separate voltmeter to measure the voltage at the BAT pin.
When using 4-wire sensing, always ensure that the sensing leads are connected in order to prevent
accidental overvoltage by the power leads.
3. For precise measurements of input and output currents, especially battery charging current regulation
near termination, the current meter in series with the battery or battery simulator should not be set to
auto-range and may need be removed entirely. An alternate method for measuring charge current is to
either use an oscilloscope with hall effect current probe or by a differential voltage measurement
across the relevant sensing resistors populated on the BMS025 EVM.

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3 PCB Layout Guideline
Minimize the switching node rise and fall times for minimum switching loss. Proper layout of the
components minimizing high-frequency current path loop is important to prevent electrical and magnetic
field radiation and high-frequency resonant problems. This PCB layout priority list must be followed in the
order presented for proper layout:
1. Place the input capacitor as close as possible to the PMID pin and GND pin connections and use the
shortest copper trace connection or GND plane.
2. Place the inductor input terminal as close to the SW pin as possible. Minimize the copper area of this
trace to lower electrical and magnetic field radiation but make the trace wide enough to carry the
charging current. Do not use multiple layers in parallel for this connection. Minimize parasitic
capacitance from this area to any other trace or plane.
3. Put an output capacitor near to the inductor and the IC. Tie ground connections to the IC ground with a
short copper trace connection or GND plane.
4. Route analog ground separately from power ground. Connect analog ground and connect power
ground separately. Connect analog ground and power ground together using power pad as the single
ground connection point or use a 0-Ωresistor to tie analog ground to power ground.
5. Use a single ground connection to tie the charger power ground to the charger analog ground just
beneath the IC. Use ground copper pour but avoid power pins to reduce inductive and capacitive noise
coupling.
6. Place decoupling capacitors next to the IC pins and make the trace connection as short as possible.
7. It is critical that the exposed power pad on the backside of the IC package be soldered to the PCB
ground. Ensure that there are sufficient thermal vias directly under the IC connecting to the ground
plane on the other layers.
8. The via size and number should be enough for a given current path.
See the EVM design for the recommended component placement with trace and via locations. For the
QFN information, refer to Quad Flatpack No-Lead Logic Packages Application Report and QFN and SON
PCB Attachment Application Report.

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4 Board Layout, Schematic, and Bill of Materials
4.1 Board Layout
Figure 7 through Figure 14 illustrate the PCB board layouts.
Figure 7. BMS025 Rev. A Top Overlay

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Figure 8. BMS025 Rev. A Top Solder Mask

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Figure 9. BMS025 Rev. A Top Layer

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Figure 10. BMS025 Rev. A MidLayer 1

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Figure 11. BMS025 Rev. A MidLayer 2

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Figure 12. BMS025 Rev. A Bottom Layer

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Figure 13. BMS025 Rev. A Bottom Solder Mask

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Figure 14. BMS025 Rev. A Bottom Overlay

PGND
VIN
GND
SYSTEM
GND
VBUS 1
D- 2
D+ 3
ID 4
GND 5
6 7 8
11 10 9
J6
0
R7
10.0k
R16
10.0k
R18
0.047uF
C6
PGND
SDA
/CE
1
2
JP14
AGND
Green
1
2
D4
DNP Green
1
2
D5
2.21k
R22
DNP 2.21k
R23
PULL-UP
VIN
TP20
TP16
TP19TP17
TP31 TP32
AGND
PSEL
HI
LOW
TEST POINTS
10.0k
R27
PGND
PGND
4.7uF
C5
4.7k
R29
AGND
S1
30V
D2
DNP
4
1
2
3
J5
SCL
REGN
BTST
1
2
JP11
DNP
SW 19
BTST 21
REGN 22
VBUS
24
QON 12
SYS 15
SDA
6
SW 20
SYS 16
BATSNS 10
TS 11
INT 7
PSEL
2
STAT 4
NC
8
PMID
23
BAT 13
CE
9
VAC
1
PGND 18
PMID_GOOD
3
PGND 17
SCL
5BAT 14
PAD 25
BQ25619RTW
U1
10.0k
R19
PULL-UP
PSEL_D+_/ACDRV
REGN
TP11
VPB
GND
PGND
10uF
C17
DNP
AGND
NT1
Net-Tie
PMID
VBUS
/QON
0.01
R14
0.01
R3
0.01
R2
0.01
R10
PGND
GND
BATTERY
BATSNS
30.1k
R24 NORMAL
5.23k
R20
AGND
TS
WARM
1
2
JP8
TS
COOL
1
2
JP4
TS
HOT
1
2
JP9
TS
REGN
TS
COLD
1
2
JP5
TS
10.0k
R25
1
2
JP7
4.87k
R26
7.68k
R21
15.0k
R15
100k
R11
DNP
20.0k
R13
1
23
Q3
ZVN4106FTA
AGND
1
2
JP3
1nF
C16
DNP
3
1
2
Q2
SI2343CDS-T1-GE3
100V
D3 DNP
4.7uF
C15
1uF
C1
DNP
TP1 TP2
TP8
TP3 TP4
VIN
CSD17571Q2
3
5,6,84,7
1,2,
Q1
DNP
TP7
40VD1
DNP
0
R8
DNP
PSEL_D+_/ACDRV
SCL
TP9
TP10
SW
BAT
SYS
REGN
STAT
/QON
/INT
TS
BATSNS
PGND
0.1uF
C12
DNP
1uF
C3
1uF
C2
DNP 1000pF
C4
DNP
10uF
C18
1000pF
C19
DNP
PGND
AGND
1
2
JP2
PGND
SW
2.2µH
L2
1µH
L1
DNP
10uF
C8
DNP
10uF
C9
10uF
C10
10uF
C14
PULL-UP
1
2
3
JP1
PGND
BATTERY
BATSNS
0.1uF
C21
PULL-UP
10.0k
R12
BAT
SYS
PULLUP
VPB
0
R30
0
R31
DNP
VAC
VBUS
VIN
1
2
JP13
DNP
SDA
VPB
2.21k
R28
Green
1
2
D6
AGND
1
2
JP12
PSEL_D+_/ACDRV
PSEL_D+_/ACDRV
PSEL_D+_/ACDRV
1
2
JP16
TP12
TP14 TP15
TP21 TP22
TP23 TP24 TP25
TP29TP28
TP34 TP35TP30 TP33
/CE
STAT
BAT
SYS
VBUSVIN
VPB PMID
TP13
VAC
TP18
REGN
BTST
BATSNS
TS /CE
/QON STAT /INT
PSEL_D+_/ACDRV
USB D-
USB D+
CHARGE
ENABLE
/PG LED
CONNECT
STAT LED
CONNECT
VPB
CONNECT
LED
1 2
JP6
DNP
1 2
JP10
DNP
PMIDGOOD_D-_/PG
2.21k
R17 REGN
VAC
PMIDGOOD_D-_/PG
PMIDGOOD_D-_/PG
PMIDGOOD_D-_/PG
2.0
R5
DNP
2200pF
C11
DNP
PMIDGOOD_D-_/PG
0
R9
DNP
0
R1
0.1uF
C20
AGND
1
2
J1
1
2
J3
0.1uF
C7
DNP
0.1uF
C13
DNP
AGND
1
2
3
JP15
TP26 TP27
SCL SDA
1
2
J2
1
2
3
J4
1.0M
R6
DNP TP5
DNP
TP6
DNP
PMID_GOOD
PFET
CONTROL
PGND AGND
10.0k
R4
PGND
3.9V - 13.5V
3.9V - 13.5V
0V - 4.7V
0V - 4.5V
3A
3A3.2A
1.2A
Board Layout, Schematic, and Bill of Materials www.ti.com
20 SLUUC27B–June 2019–Revised January 2020
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BQ25611D, BQ25619 (BMS025) Evaluation Module
4.2 Schematics
Figure 15 illustrates the schematic for this BQ25619EVM.
Figure 15. BQ25619EVM Schematic