Texas Instruments LM5157EVM-BST User manual

User’s Guide
LM5157EVM-BST Evaluation Module
ABSTRACT
The LM5157EVM-BST evaluation module showcases the features and performance of the LM5157 device
as wide input voltage, non-synchronous boost converter with dual random spread spectrum. The standard
configuration is designed to provide a regulated output of 12 V at 1.6 A from an input of 3 V to 9 V (load derated
for input voltages below 6 V), switching at a frequency of 2.1 MHz.
Table of Contents
1 Features and Electrical Performance................................................................................................................................... 3
2 Application Schematic........................................................................................................................................................... 5
3 EVM Picture.............................................................................................................................................................................6
4 Test Setup and Procedure......................................................................................................................................................7
5 Test Results.............................................................................................................................................................................8
6 Design Files...........................................................................................................................................................................14
7 Revision History................................................................................................................................................................... 18
List of Figures
Figure 2-1. Application Circuit......................................................................................................................................................5
Figure 3-1. EVM Picture.............................................................................................................................................................. 6
Figure 4-1. Test Setup................................................................................................................................................................. 7
Figure 5-1. Efficiency vs Load......................................................................................................................................................8
Figure 5-2. Load Regulation........................................................................................................................................................ 8
Figure 5-3. Thermal Image VIN = 3 V IOUT = 0.6 A, VBIAS = VIN, no Forced Air Cooling..............................................................9
Figure 5-4. Thermal Image VIN = 3 V IOUT = 0.6 A, VBIAS = 12 V, no Forced Air Cooling............................................................ 9
Figure 5-5. Thermal Image VIN = 6 V IOUT = 1.6 A, VBIAS = VIN, no Forced Air Cooling..............................................................9
Figure 5-6. Thermal Image VIN = 9 V IOUT = 1.6 A, VBIAS = VIN, no Forced Air Cooling..............................................................9
Figure 5-7. Steady State, VIN = 3 V, IOUT = 0.6 A...................................................................................................................... 10
Figure 5-8. Steady State, VIN = 6 V, IOUT = 1.6 A...................................................................................................................... 10
Figure 5-9. Steady State, VIN = 9 V, IOUT = 1.6 A...................................................................................................................... 10
Figure 5-10. Start-Up, VIN = 3 V, IOUT = 0.6 A (20 Ω).................................................................................................................11
Figure 5-11. Start-Up, VIN = 6 V, IOUT = 1.6 A (7.5 Ω)................................................................................................................ 11
Figure 5-12. Start-Up, VIN = 9 V, IOUT = 1.6 A (7.5 Ω)................................................................................................................11
Figure 5-13. Load Transient, VIN = 3 V, IOUT = 0.3 A to 0.6 A....................................................................................................12
Figure 5-14. Load Transient, VIN = 6 V, IOUT = 0.8 A to 1.6 A....................................................................................................12
Figure 5-15. Load Transient, VIN = 9 V, IOUT = 0.8 A to 1.6 A....................................................................................................12
Figure 5-16. Control Loop Response, VIN = 3 V, IOUT = 0.6 A................................................................................................... 13
Figure 5-17. Control Loop Response, VIN = 6 V, IOUT = 1.6A.................................................................................................... 13
Figure 5-18. Control Loop Response, VIN = 9 V, IOUT = 1.6 A................................................................................................... 13
Figure 6-1. Top Layer and Silkscreen........................................................................................................................................ 14
Figure 6-2. Top Layer.................................................................................................................................................................14
Figure 6-3. Signal Layer 1......................................................................................................................................................... 14
Figure 6-4. Signal Layer 2......................................................................................................................................................... 14
Figure 6-5. Bottom Layer........................................................................................................................................................... 14
Figure 6-6. Bottom Layer and Silkscreen (mirrored)..................................................................................................................14
Figure 6-7. LM5157EVM-BST Schematic..................................................................................................................................15
List of Tables
Table 1-1. Electrical Performance Standard Configuration..........................................................................................................3
Table 1-2. Jumper Description..................................................................................................................................................... 4
Table 4-1. Standard Configuration Jumper Connections............................................................................................................. 7
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Table 6-1. LM5157EVM-BST Bill of Materials............................................................................................................................16
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1 Features and Electrical Performance
The LM5157EVM-BST supports the following features and performance capabilities:
• Tightly regulated output voltage of 12 V with 1% accurate reference voltage
• High conversion efficiency of > 92% at full load
• Constant cycle-by-cycle peak inductor current limit over input voltage range
• Programmable hiccup mode for output overcurrent protection
• User-adjustable soft-start time using CSS
• Output overvoltage protection
• Multiple BIAS pin and VCC pin connections to test multiple configurations
– BIAS connect to VCC
– BIAS supplied with external power supply
– BIAS supplied by output voltage
• Power-good (PGOOD) indicator with selectable pullup source
• 2.1-MHz switching frequency
• External clock synchronization
• Programmable dual random spread spectrum reduces the EMI
1.1 Electrical Parameters
Table 1-1. Electrical Performance Standard Configuration
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT CHARACTERISTICS
Input voltage range VIN Operation 3 6 9 V
OUTPUT CHARACTERISTICS
Output Voltage VOUT 12 V
Maximum output current IOUT
VIN = 6 V~9 V 1.6 A
VIN = 4 V~6 V 0.8
Output Over-voltage VOUT_OV 13.6 V
SYSTEM CHARACTERISTICS
Switching frequency 2.1 MHz
External clock synchronization 1.8 2.4 kHz
Full load efficiency VIN = 6 V, IOUT = 1.6 A 92.2 %
Junction temperature, TJ-40 150 C
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1.2 Configuration Points
Table 1-2 indicates the available test points and configuration jumpers. These points offer flexibility in configuring
the evaluation module and include but not limited to:
• BIAS pin to be connected to the following:
– External supply (VAUX)
– Input voltage (VIN)
– Regulated output voltage (VOUT)
– VCC pin
• PGOOD pin to be supplied by either VCC or VAUX
• External clock synchronization
• Shut-down signal by pulling the SD pin high
• Four different operation modes to enable and disable the spread spectrum and hiccup mode
Table 1-2. Jumper Description
JUMPER PIN DESCRIPTION
TP1 VIN+ Positive input voltage sense connection
TP2 SW Probe point for the switch node of the LM5157 boost circuit
TP3 VOUT+ Positive output voltage sense connection
TP4 GND Negative input voltage sense connection
TP5 GND Negative output voltage sense connection
TP6 SYNC Input for external clock signal. To implement the external clock synchronization, remove the
jumper resistor R10 and tie the external signal to the TP6 (SYNC).
TP7 VAUX Supply the BIAS pin from an external supply (if J9 is connected).
TP8 VOUT+ Loop response positive injection point (bottom side)
TP9 UVLO Middle point of UVLO resistor divider
TP10 VOUT– Loop response negative injection point (bottom side)
TP11 SD High signal pulls the UVLO pin to ground entering shutdown mode
TP12 AGND Negative input of external signals
J6 Pin 1 to pin 2 Connect VOUT to the BIAS pin of the LM5157 through D2 (only set one jumper to J6, J7, J8, or
J9).
Pin 2 to pin 3 Directly connect VOUT to the BIAS pin of the LM5157 (only set one jumper to J6, J7, J8, or J9).
J7 Pin 1 to pin 2 Connect VIN to the BIAS pin of the LM5157 through D3 (only set one jumper to J6, J7, J8, or J9).
Pin 2 to pin 3 Directly connect VIN to BIAS pin of the LM5157 (only set one jumper to J6, J7, J8, or J9).
J8 Pin 1 to pin 2 Directly connect VCC to the BIAS pin (only set one jumper to J6, J7, J8 or J9).
J9 Pin 1 to pin 2 Directly connect VAUX to the BIAS pin (only set one jumper to J6, J7, J8, or J9).
J10
SS (Pin 1) Monitor the SS pin.
COMP (Pin 2) Monitor the COMP pin.
AGND (Pin 3) Connection to AGND plane
SYNC (Pin 4) Monitor the EN/UVLO/SYNC pin.
PGOOD (Pin 5) Monitor the PGOOD pin.
BIAS-IC (Pin 6) Monitor the BIAS pin.
VCC (Pin 7) Monitor the VCC pin.
J11 (only use
one jumper on
J11)
Pin 1 to pin 2 (NN) Hiccup mode disabled, spread spectrum disabled
Pin 3 to pin 4 (HS) Hiccup mode enabled, spread spectrum enabled
Pin 5 to pin 6 (HN) Hiccup mode enabled, spread spectrum disabled
Pin 7 to pin 8 (NS) Hiccup mode disabled, spread spectrum enabled
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2 Application Schematic
The LM5157EVM-BST is capable of multiple configurations. Figure 2-1 shows the standard configuration of the
LM5157EVM-BST for which the parameters in Table 1-1 are valid. Section 4.2 describes the correct jumper
settings and measurement locations to recreate the data presented in Section 5.
VCC
BIAS
UVLO/SYNC
AGND
PGOOD
RT
SS
SW
PGND
FB
COMP
MODE
VCC
VCC
VSUPPLY VLOAD
LMD
LM5157 RFBT
RFBB
CHF
CCOMP
RCOMP
CSS
CVCC
RPG
COUT
RUVB
RUVT
CIN
RFREQ
RMODE
Figure 2-1. Application Circuit
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3 EVM Picture
Figure 3-1 shows the 3D-rendered picture of the LM5157EVM-BST. The actual board color can differ.
Figure 3-1. EVM Picture
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4 Test Setup and Procedure
4.1 Test Setup
Figure 4-1 shows the correct jumper positions to configure the evaluation module for the typical application, as
shown in Figure 2-1. The correct equipment connections and measurement points are shown in Table 4-1.
Table 4-1. Standard Configuration Jumper Connections
JUMPER POSITION
J7 Jumper from pin 2 to pin 3 (VIN to BIAS)
J11 Jumper from pin 3 to pin 4 (HS)
Power Supply
+
-
Ammeter 1
ACOM
Ammeter 2
ACOM
Electronic Load
-
+
Voltmeter 1
V
COM
Voltmeter 2
VCOM
Figure 4-1. Test Setup
4.2 Test Equipment
Power Supply: The input voltage source (VIN) should be a variable supply capable of 0 V to 10 V and source at
least 10 A.
Multi-meters:
• Voltmeter 1: Input voltage, connect from VIN+ to GND.
• Voltmeter 2: Output voltage, connect from VOUT+ to GND.
• Ammeter 1: Input current, must be able to handle 10 A. Shunt resistor can be used as needed.
• Ammeter 2: Output current, must be able to handle 2 A. Shunt resistor can be used as needed.
Electronic Load: The load should be constant resistance (CR) or constant current (CC) capable. It should safely
handle 2 A at 12 V.
Oscilloscope: 20-MHz bandwidth and AC coupling. Measure the output voltage ripple directly across an output
capacitor with a short ground lead. It is not recommended to use a long-leaded ground connection due to
the possibility of noise being coupled into the signal. To measure other waveforms, adjust the oscilloscope as
needed.
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5 Test Results
Figure 5-1 through Figure 5-17 present the typical performance of the LM5157EVM-BST according to the BOM
and the configuration described in Section 4. Based on measurement techniques and environmental variables,
measurements can differ slightly than the data presented.
5.1 Efficiency Curve
IOUT (A)
Efficiency (%)
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
0
20
40
60
80
100
VIN = 3 V
VIN = 4 V
VIN = 6 V
VIN = 9 V
Figure 5-1. Efficiency vs Load
5.2 Load Regulation Curve
IOUT (A)
VOUT (V)
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
11.88
11.9
11.92
11.94
11.96
11.98
12
12.02
12.04
12.06
12.08
12.1
12.12
VIN = 3 V
VIN = 4 V
VIN = 6 V
VIN = 9 V
Figure 5-2. Load Regulation
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5.3 Thermal Performance
Figure 5-3 shows the thermal image.
Figure 5-3. Thermal Image VIN = 3 V IOUT = 0.6 A,
VBIAS = VIN, no Forced Air Cooling
Figure 5-4. Thermal Image VIN = 3 V IOUT = 0.6 A,
VBIAS = 12 V, no Forced Air Cooling
Figure 5-5. Thermal Image VIN = 6 V IOUT = 1.6 A,
VBIAS = VIN, no Forced Air Cooling
Figure 5-6. Thermal Image VIN = 9 V IOUT = 1.6 A,
VBIAS = VIN, no Forced Air Cooling
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5.4 Steady State Waveforms
The output voltage ripple is measured directly next to C16.
Figure 5-7. Steady State, VIN = 3 V, IOUT = 0.6 A Figure 5-8. Steady State, VIN = 6 V, IOUT = 1.6 A
Figure 5-9. Steady State, VIN = 9 V, IOUT = 1.6 A
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5.5 Start-Up Waveforms
Figure 5-10. Start-Up, VIN = 3 V, IOUT = 0.6 A (20 Ω) Figure 5-11. Start-Up, VIN = 6 V, IOUT = 1.6 A (7.5 Ω)
Figure 5-12. Start-Up, VIN = 9 V, IOUT = 1.6 A (7.5 Ω)
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5.6 Load Transient Waveforms
The load transients are measured with J11 set to NN.
Figure 5-13. Load Transient, VIN = 3 V, IOUT = 0.3 A
to 0.6 A
Figure 5-14. Load Transient, VIN = 6 V, IOUT = 0.8 A
to 1.6 A
Figure 5-15. Load Transient, VIN = 9 V, IOUT = 0.8 A to 1.6 A
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5.7 AC Loop Response Curves
Figure 5-16. Control Loop Response, VIN = 3 V, IOUT = 0.6 A
Figure 5-17. Control Loop Response, VIN = 6 V, IOUT = 1.6A
Figure 5-18. Control Loop Response, VIN = 9 V, IOUT = 1.6 A
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6 Design Files
Figure 6-1 through Figure 6-6 illustrate the EVM PCB layout images.
Figure 6-1. Top Layer and Silkscreen Figure 6-2. Top Layer
Figure 6-3. Signal Layer 1 Figure 6-4. Signal Layer 2
Figure 6-5. Bottom Layer Figure 6-6. Bottom Layer and Silkscreen (mirrored)
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6.1 Schematic
Figure 6-7 shows the EVM schematic.
PGND
PGND
VOUTVIN TP2SW TP3VOUT+
10uF
C9
0
R3
J1
J4 J5
J2
2200pF
C1
10uF
C6
1000pF
C3
100nF
C4
10nF
C5
1uH
L1
TP4
VIN-
TP1
VIN+
TP5GND
J3
VIN = 3V- 9VDC VOUT = 12VDC
Fsw = 2.1MHz
0
R1
100nF
C19
1µF
C21
VCC
PGND
VIN
0
R4
PGND
AGND
BIAS
100pF
C24
VCC
AGND
BIAS-IC
PGOOD
COMP
SS
SYNC
BIAS-IC
COMP
SS
SYNC
VOUT VINBIAS
60V
D2
60V
D3
INPUT VOLTAGE SELECTION
UVLO Shutdown
VCC VAUX TP7
VAUX
TP11
SD
1
2
3
J6
1
2
J8
1
2
3
J7
1
2
J9
10.0k
R17
Q1
BSS123
UVLO
Default: OPEN Default: Pins 2-3
10.0
R7
VOUT
AGND
3V
D4
Diode clamp FB
TP8
VOUT+
TP10
VOUT-
MODE
100nF
C22
10uF
C7
10uF
C8
100nF
C20
2.00
R2
10uF
C10
4.53k
R13
49.9k
R8
NC 15
PGND 16
PGND 1
VCC
2
BIAS
3
PGOOD 4
RT
5
EN/UVLO/SYNC
6
AGND 7 SS
10
COMP
8
FB
9
MODE
11
SW 12
SW 13
SW 14
EP 17
LM5157QRTERQ1
U1
VCCVAUX
PGOOD 100k
R10
100k
R11
PGND AGND
NT1
Net-Tie
1
3
2
45V
D1
AGND
AGND
1nF
C23
FBFB
1.6A/0.8A
4.7uF
C13
4.7uF
C14
4.7uF
C15
4.7uF
C16
4.7uF
C17
4.7uF
C18
100pF
C27
22nF
C259.53k
R14
71.5k
R12
61.9k
R5
1.6A/0.8A
LM5157EVM-BST
2.61k
R19
10nF
C26
100uF
C11
100uF
C12
1.5uH
L2
MODE
AGND
0
R15
37.4k
R16
62.0k
R18
100k
R20
1 2
3 4
5 6
7 8
J11
0
R9
MODE Select
AGND
UVLO
TP9
UVLO
5
4
1
2
3
6
7
J10
TP12
AGND
TP6
SYNC
22uF
C2
Default: Pins 3-4
4.99
R6
Default: OPEN Default: OPEN
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Figure 6-7. LM5157EVM-BST Schematic
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6.2 Bill of Materials
Table 6-1 lists the EVM bill of materials.
Table 6-1. LM5157EVM-BST Bill of Materials
DESIGNATOR QTY VALUE DESCRIPTION PACKAGE
REFERENCE
PART NUMBER MANUFACTURER
C2 1 22 μF CAP, AL, 22 μF, 100 V, ±20%, 1.3 Ω,
AEC-Q200 Grade 2, SMD
SMT Radial F EEE-FK2A220P Panasonic
C3 1 1000 pF CAP, CERM, 1000 pF, 50 V, ±10%,
X7R, 0603
603 C0603X102K5RACTU Kemet
C4, C19, C20 3 0.1 μF CAP, CERM, 0.1 µF, 50 V, ±10%,
X7R, AEC-Q200 Grade 1, 0603
603 C0603C104K5RACAUTO Kemet
C5, C26 2 0.01 μF CAP, CERM, 0.01 μF, 50 V, ±10%,
X7R, 0603
603 C0603X103K5RACTU Kemet
C6, C7, C8, C9, C10 5 10 μF CAP, CERM, 10 μF, 50 V, ±10%,
X7R, 1210
1210 GRM32ER71H106KA12L MuRata
C13, C14, C15, C16, C17,
C18
6 4.7 μF CAP, CERM, 4.7 μF, 50 V, ±10%,
X7R, AEC-Q200 Grade 1, 1210
1210 CGA6P3X7R1H475K250AB TDK
C21 1 1 μF CAP, CERM, 1 µF, 16 V,±10%, X7R,
AEC-Q200 Grade 1, 0603
603 CGA3E1X7R1C105K080AC TDK
C22 1 0.1 μF CAP, CERM, 0.1 μF, 100 V,±10%,
X7R, AEC-Q200 Grade 1, 0603
603 GCJ188R72A104KA01D MuRata
C25 1 0.022 μF CAP, CERM, 0.022 μF, 50 V, ±10%,
X7R, 0603
603 C0603X223K5RACTU Kemet
C27 1 100 pF CAP, CERM, 100 pF, 50 V, ±5%,
C0G/NP0, AEC-Q200 Grade 0, 0603
603 CGA3E2NP01H101J080AA TDK
D1 1 45 V Diode, Schottky, 45 V, 10 A, AEC-
Q101, CFP15
CFP15 PMEG045V100EPDAZ Nexperia
D2, D3 2 60 V Diode, Schottky, 60 V, 1 A,
SOD-123F
SOD-123F PMEG6010CEH,115 Nexperia
L2 1 1.5 μH Inductor, Shielded, Composite, 1.5
μH, 14 A, 0.01052 Ω, AEC-Q200
Grade 1, SMD
XEL6030-152MEB Coilcraft
Q1 1 100 V MOSFET, N-CH, 100 V, 0.17 A,
SOT-23
SOT-23 BSS123 Fairchild Semiconductor
R1 1 0 RES, 0, 5%, 2 W, 2512 WIDE 2512 WIDE RCL12250000Z0EG Vishay Draloric
R3, R4, R9, R15 4 0 RES, 0, 5%, 0.1 W, 0603 603 RC0603JR-070RL Yageo
R5 1 61.9 k RES, 61.9 k, 1%, 0.1 W, 0603 603 RC0603FR-0761K9L Yageo
R6 1 4.99 RES, 4.99, 1%, 0.1 W, 0603 603 RC0603FR-074R99L Yageo
R7 1 10 RES, 10.0, 1%, 0.1 W, 0603 603 RC0603FR-0710RL Yageo
R8 1 49.9 k RES, 49.9 k, 1%, 0.1 W, 0603 603 RC0603FR-0749K9L Yageo
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Table 6-1. LM5157EVM-BST Bill of Materials (continued)
DESIGNATOR QTY VALUE DESCRIPTION PACKAGE
REFERENCE
PART NUMBER MANUFACTURER
R11, R20 2 100 k RES, 100 k, 1%, 0.1 W, 0603 603 RC0603FR-07100KL Yageo
R12 1 71.5 k RES, 71.5 k, 1%, 0.1 W, 0603 603 RC0603FR-0771K5L Yageo
R13 1 4.53 k RES, 4.53 k, 1%, 0.1 W, 0603 603 RC0603FR-074K53L Yageo
R14 1 9.53 k RES, 9.53 k, 1%, 0.1 W, 0603 603 RC0603FR-079K53L Yageo
R16 1 37.4 k RES, 37.4 k, 1%, 0.1 W, 0603 603 RC0603FR-0737K4L Yageo
R17 1 10.0 k RES, 10.0 k, 1%, 0.1 W, 0603 603 RC0603FR-0710KL Yageo
R18 1 62.0 k RES, 62.0 k, 1%, 0.1 W, 0603 603 RC0603FR-0762KL Yageo
R19 1 2.61 k RES, 2.61 k, 1%, 0.1 W, 0603 603 RC0603FR-072K61L Yageo
U1 1 2.2-MHz Wide VIN Boost/Sepic/
Flyback Converter with Dual
Random Spread Spectrum,
RTE0016K (WQFN-16)
RTE0016K LM5157QRTERQ1 Texas Instruments
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7 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision * (October 2020) to Revision A (August 2021) Page
• Updated all measurements.................................................................................................................................1
• Added resistor in series to the VCC capacitor.................................................................................................... 1
• Updated Figure 6-7 ..........................................................................................................................................15
• Updated Table 6-1 ........................................................................................................................................... 16
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STANDARD TERMS FOR EVALUATION MODULES
1. Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or
documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance
with the terms set forth herein. User's acceptance of the EVM is expressly subject to the following terms.
1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms that accompany such Software
1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.
2Limited Warranty and Related Remedies/Disclaimers:
2.1 These terms do not apply to Software. The warranty, if any, for Software is covered in the applicable Software License
Agreement.
2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for a nonconforming EVM if (a) the nonconformity was caused by
neglect, misuse or mistreatment by an entity other than TI, including improper installation or testing, or for any EVMs that have
been altered or modified in any way by an entity other than TI, (b) the nonconformity resulted from User's design, specifications
or instructions for such EVMs or improper system design, or (c) User has not paid on time. Testing and other quality control
techniques are used to the extent TI deems necessary. TI does not test all parameters of each EVM.
User's claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects in the EVMs within ten (10)
business days after delivery, or of any hidden defects with ten (10) business days after the defect has been detected.
2.3 TI's sole liability shall be at its option to repair or replace EVMs that fail to conform to the warranty set forth above, or credit
User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the warranty
period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to repair or
replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall be
warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.
WARNING
Evaluation Kits are intended solely for use by technically qualified,
professional electronics experts who are familiar with the dangers
and application risks associated with handling electrical mechanical
components, systems, and subsystems.
User shall operate the Evaluation Kit within TI’s recommended
guidelines and any applicable legal or environmental requirements
as well as reasonable and customary safeguards. Failure to set up
and/or operate the Evaluation Kit within TI’s recommended
guidelines may result in personal injury or death or property
damage. Proper set up entails following TI’s instructions for
electrical ratings of interface circuits such as input, output and
electrical loads.
NOTE:
EXPOSURE TO ELECTROSTATIC DISCHARGE (ESD) MAY CAUSE DEGREDATION OR FAILURE OF THE EVALUATION
KIT; TI RECOMMENDS STORAGE OF THE EVALUATION KIT IN A PROTECTIVE ESD BAG.

www.ti.com
2
3Regulatory Notices:
3.1 United States
3.1.1 Notice applicable to EVMs not FCC-Approved:
FCC NOTICE: This kit is designed to allow product developers to evaluate electronic components, circuitry, or software
associated with the kit to determine whether to incorporate such items in a finished product and software developers to write
software applications for use with the end product. This kit is not a finished product and when assembled may not be resold or
otherwise marketed unless all required FCC equipment authorizations are first obtained. Operation is subject to the condition
that this product not cause harmful interference to licensed radio stations and that this product accept harmful interference.
Unless the assembled kit is designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must
operate under the authority of an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
3.1.2 For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:
CAUTION
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not
cause harmful interference, and (2) this device must accept any interference received, including interference that may cause
undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to
operate the equipment.
FCC Interference Statement for Class A EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to
correct the interference at his own expense.
FCC Interference Statement for Class B EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance
with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference
will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which
can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more
of the following measures:
•Reorient or relocate the receiving antenna.
•Increase the separation between the equipment and receiver.
•Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
•Consult the dealer or an experienced radio/TV technician for help.
3.2 Canada
3.2.1 For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210 or RSS-247
Concerning EVMs Including Radio Transmitters:
This device complies with Industry Canada license-exempt RSSs. Operation is subject to the following two conditions:
(1) this device may not cause interference, and (2) this device must accept any interference, including interference that may
cause undesired operation of the device.
Concernant les EVMs avec appareils radio:
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation
est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit
accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concerning EVMs Including Detachable Antennas:
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser)
gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type
and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for
successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types
listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated.
Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited
for use with this device.