Texas Instruments LM5169FQEVM User manual

User’s Guide
LM5169FQEVM EVM User Guide
ABSTRACT
The LM5169FQEVM is a 115-V DC/DC fly-buck regulator that employs synchronous rectification to achieve
high conversion efficiency in a small footprint. The EVM operates over a wide input voltage range of 20 V to
115 V (120 V absolute maximum) to provide a regulated 10-V output, 0.3A at 750-kHz switching frequency,
and an additional 10-V, 0.3A floating output. The output voltage has better than 1.5% set-point accuracy
and is adjustable using an external resistor divider. The module design uses the LM5169F-Q1 synchronous
buck converter with wide input voltage range, wide duty-cycle range, integrated high-side and low-side power
MOSFETs, advanced over current protection, and precision enable. With AEC-Q100 grade 1 automotive
qualification, the LM5169F-Q1 is rated to operate over a junction temperature range of –40°C to +150°C.
Please note that for EVMs labeled as LM5168FQEVM, that the LM5168F is installed and approximately one half
of the load current is available from this device. Both EVMs are identical, except for the converter IC installed.
For the LM5169F version, please contact your local Texas Instruments representative.
Table 1-1. EVM Configuration
EVM CONVERTER IC PACKAGE
LM5169FQEVM LM5169F-Q1 8-pin SO package with PowerPAD (4.89 mm × 3.90 mm)
LM5168FQEVM LM5168F-Q1 8-pin SO package with PowerPAD (4.89 mm × 3.90 mm)
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Table of Contents
1 General TI High Voltage Evaluation User Safety Guidelines.............................................................................................. 3
2 EVM Characteristics............................................................................................................................................................... 5
3 LM5169FQEVM Evaluation Module....................................................................................................................................... 6
3.1 Quick Start Procedure........................................................................................................................................................6
3.2 Detailed Descriptions......................................................................................................................................................... 7
4 Schematic................................................................................................................................................................................8
5 PCB Layout..............................................................................................................................................................................9
6 Bill of Materials......................................................................................................................................................................11
7 Performance Curves.............................................................................................................................................................13
List of Figures
Figure 3-1. LM5169FQEVM Top View......................................................................................................................................... 6
Figure 4-1. LM5169FQEVM EVM Schematic.............................................................................................................................. 8
Figure 5-1. Top Layer...................................................................................................................................................................9
Figure 5-2. Mid-Layer 1 Ground Plane........................................................................................................................................ 9
Figure 5-3. Mid-Layer2 Routing................................................................................................................................................. 10
Figure 5-4. Bottom Layer........................................................................................................................................................... 10
List of Tables
Table 1-1. EVM Configuration......................................................................................................................................................1
Table 2-1. LM5168FQEVM Electrical Performance Characteristics............................................................................................ 5
Table 6-1. LM5168FQEVM Bill of Materials .............................................................................................................................. 11
Trademarks
PowerPAD™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
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1 General TI High Voltage Evaluation User Safety Guidelines
WARNING
Always follow TI’s set-up and application instructions, including use of all interface components within their
recommended electrical rated voltage and power limits. Always use electrical safety precautions to help ensure
your personal safety and the safety of those working around you. Contact TI’s Product Information Center http://
support.ti.com for further information.
Save all warnings and instructions for future reference.
Failure to follow warnings and instructions may result in personal injury, property damage, or death due
to electrical shock and/or burn hazards.
The term TI HV EVM refers to an electronic device typically provided as an open framed, unenclosed printed-
circuit board assembly. It is intended strictly for use in development laboratory environments, solely for qualified
professional users having training, expertise, and knowledge of electrical safety risks in development and
application of high-voltage electrical circuits. Any other use and/or application are strictly prohibited by Texas
Instruments. If you are not suitably qualified, you should immediately stop from further use of the HV EVM.
•Work Area Safety:
– Maintain a clean and orderly work area.
– Qualified observer(s) must be present anytime circuits are energized.
– Effective barriers and signage must be present in the area where the TI HV EVM and its interface
electronics are energized, indicating operation of accessible high voltages may be present, for the
purpose of protecting inadvertent access.
– All interface circuits, power supplies, evaluation modules, instruments, meters, scopes, and other related
apparatus used in a development environment exceeding 50 VRMS/75 VDC must be electrically located
within a protected Emergency Power Off (EPO) protected power strip.
– Use a stable and non-conductive work surface.
– Use adequately insulated clamps and wires to attach measurement probes and instruments. No freehand
testing whenever possible.
•Electrical Safety:
As a precautionary measure, it is always a good engineering practice to assume that the entire EVM may
have fully accessible and active high voltages.
– De-energize the TI HV EVM and all its inputs, outputs, and electrical loads before performing any
electrical or other diagnostic measurements. Confirm that TI HV EVM power has been safely de-
energized.
– With the EVM confirmed de-energized, proceed with required electrical circuit configurations, wiring,
measurement equipment hook-ups, and other application needs, while still assuming the EVM circuit and
measuring instruments are electrically live.
– When EVM readiness is complete, energize the EVM as intended.
WARNING
WARNING: While the EVM is energized, never touch the EVM or its electrical circuits as
they could be at high voltages capable of causing electrical shock hazard.
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•Personal Safety:
– Wear personal protective equipment, for example, latex gloves and/or safety glasses with side shields or
protect EVM in an adequate lucent plastic box with interlocks from accidental touch.
•Limitation for Safe Use:
– EVMs are not to be used as all or part of a production unit.
Safety and Precautions
The EVM is designed for professionals who have received the appropriate technical training, and is designed
to operate from an AC power supply or a high-voltage DC supply. Please read this user guide and the safety-
related documents that come with the EVM package before operating this EVM.
CAUTION
!
Do not leave the EVM powered when unattended.
WARNING
Hot surface! Contact may cause burns. Do not touch!
WARNING
High Voltage! Electric shock is possible when connecting board to live wire. Board should be
handled with care by a professional.
For safety, use of isolated test equipment with overvoltage and overcurrent protection is highly
recommended.
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2 EVM Characteristics
Unless otherwise specified the following condition apply: TA = 25ºC, IOUT1 = Primary output current, IOUT2 =
Secondary output current. LM5168FQEVM; both EVMs are identical, except for the converter IC installed.
Table 2-1. LM5168FQEVM Electrical Performance Characteristics
Parameter Test Conditions MIN TYP MAX UNITS
INPUT CHARACTERISTICS
Input voltage range, VVIN EVM input voltage operating range 20 48 115 V
Input voltage turn on, VIN(ON)
Adjusted by EN/UVLO resistors
6.0 V
Input voltage turn off, VIN(OFF) 5.6 V
Input voltage hysteresis, VIN(HYS) 0.4 V
Input current, no load, IIN(NL) IOUT = 0 A VIN = 48 V 13 mA
Input current, disabled, IIN(OFF) VEN/UVLO = 0 V, no EN
divider
VIN = 36 V 10 µA
OUTPUT CHARACTERISTICS
Output voltage, VOUT1 VIN = 48 V, IOUT1 = IOUT2 = 0A 10.0 V
Output voltage, VOUT2 VIN = 48 V, IOUT1=0 A, IOUT2 = 0A 10.0
Output Current, IOUT: Total for both outputs VIN = 48 V 0.25 A
Output voltage regulation, ΔVOUT1
Load regulation, VIN =
48 V
IOUT1 = 0 A to 0.25
A, IOUT2 = 0 A
1 mV
Output voltage regulation, ΔVOUT2
Load regulation, VIN =
48 V
IOUT1 = 0 A to 0.25
A, IOUT2 = 0 A
200
Output voltage regulation, ΔVOUT1
Load regulation, VIN =
48 V
IOUT2 = 0 A to 0.25
A, IOUT1 = 0 A
7
Output voltage regulation, ΔVOUT2
Load regulation, VIN =
48 V
IOUT2 = 0 A to 0.25
A, IOUT1 = 0 A
1000
Output voltage regulation, ΔVOUT1
Line regulation, IOUT1
= IOUT2 = 0 A
VIN = 24 V to 115 V 50
Output voltage regulation, ΔVOUT2
Line regulation, IOUT1
= IOUT2 = 0 A
VIN = 24 V to 115 V 750
Maximum Output Current VIN = 48 V 0.27 A
Soft-start time, tSS 3.5 ms
SYSTEM CHARACTERISTICS
Switching frequency VIN = 36 V, IOUT1 = 0 A , IOUT2 = 0 A 730 kHz
Half-load efficiency IOUT1 = IOUT2 = 0.08 A VIN = 48 V 70 %
Full load efficiency IOUT1 = IOUT2 = 0.125
A
VIN = 48 V 76 %
VIN = 60 V 72 %
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3 LM5169FQEVM Evaluation Module
The LM5169FQEVM EVM is configured to deliver a regulated 10-V output, 0.3 A at 750-kHz switching
frequency, and an additional 10-V, 0.3 A floating output. The LM5169 uses a COT control architecture, with
input voltage feed-forward, to provide constant frequency regulator with tightly regulated output voltage. This
type of control requires adequate voltage ripple at the FB input to achieve stable regulation. The LM5169FQEVM
is set up with type III ripple injection to minimize the output voltage ripple, while ensuring a stable regulator. The
LM5169FQEVM also provides the option to use type I or type II ripple injection. See the LM5169 data sheet for
more information. An overall view of the LM5169FQEVM and the schematic are shown inFigure 3-1, and Figure
4-1 respectively.
Please note that for EVMs labeled as LM5168FQEVM, that the LM5168F is installed and approximately one half
of the load current is available from this device. Both EVMs are identical, except for the converter IC installed.
3.1 Quick Start Procedure
1. Connect the input voltage supply to the VIN connector (+ and -).
2. Connect the load(s) to the VOUT and the VOUT2 connectors (+ and -).
3. Set the input supply voltage to an appropriate level between 20 V to 115 V.
4. Turn on the power supply. The EVM powers up and provides VOUT = 10 V, and VOUT2 = 10 V.
See Figure 3-1 for the location of the connectors.
CAUTION
Caution Hot surface.
Contact may cause burns.
Do not touch.
Figure 3-1. LM5169FQEVM Top View
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3.2 Detailed Descriptions
This section describes the connectors and the test points on the EVM and how to properly connect, set up and
use the LM5169FQEVM EVM. See Figure 3-1 for location of connectors and jumpers.
VOUT Output voltage of the converter.
VOUT screw terminal connector. Apply load to this connector (+ and -). VOUT test point is used for
monitoring output voltage.
VOUT2 Secondary output voltage of the converter.
VOUT2 screw terminal connector. One side of this output is connected to the primary ground
(GND) through a tie resistor Rtie (R12). This resistor may be removed for a true floating voltage
source. Apply load to this connector (+ and -).
GND Ground of the converter.
GND and GNDS test points. Used as ground test points for the EVM.
VIN Input voltage to the converter.
VIN screw terminal connector. Apply input voltage to this connector (+ and -). VIN test point is used
for monitoring input voltage.
VINEMI Input voltage to input filter of the converter.
If it is desired to use the built-in EMI filter on the EVM, then connect the input supply to the VINEMI
screw terminal connector (+ and -).
Input
Filter
EMI mitigation.
An input EMI filter is provided on the EVM. Note L2 and C18 are not populated and must be
installed for the EMI filter to operate. Also, note that the maximum input voltage to the filter is 100
VDC.
EN/UVLO
Jumper
Set EN/UVLO pin options.
Use this jumper to enable/disable the EVM. The resistors connected to this pin set the input UVLO
thresholds. Input UVLO thresholds are set to approximately 6 V and 5.6 V. These levels can be
changed by changing the values of R5 and R7. For external control of the device, these resistors
should be removed and the control signal applied to the center pin of the header. Note that for
accurate shut-down current measurement, these resistors must also be removed and the EN input
(center pin) grounded.
1. Jumper open (default set-up): device starts-up and shuts-down with UVLO.
2. Center pin connected to ON: device starts-up and shuts-down without UVLO.
3. Center pin connected to OFF: device is off.
PGOOD PGOOD header used as a test point to monitor the power-good indicator. This flag indicates
whether the output voltage has reached its regulation level. PGOOD is an open-drain output that is
tied to VOUT through a 100k Ω, resistor R10.
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4 Schematic
Figure 4-1. LM5169FQEVM EVM Schematic
Schematic www.ti.com
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5 PCB Layout
Figure 5-1 through Figure 5-4 show the board layout for theLM5169FQEVM.
The 8-pin SO PowerPAD™ package offers an exposed thermal pad, which must be soldered to the copper
landing on the PCB for optimal thermal performance. The PCB consists of a 4-layer design. There are 2-oz
copper planes on the top and bottom and 1-oz copper mid-layer planes to dissipate heat with an array of thermal
vias under the thermal pad to connect to all four layers.
Figure 5-1. Top Layer
Figure 5-2. Mid-Layer 1 Ground Plane
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Figure 5-3. Mid-Layer2 Routing
Figure 5-4. Bottom Layer
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6 Bill of Materials
Please note that for EVMs labeled as LM5168FQEVM, that the LM5168F is installed and approximately one half
of the load current is available from this device. Both EVMs are identical, except for the converter IC installed.
Table 6-1. LM5168FQEVM Bill of Materials
Designator Quantity Description PartNumber Manufacturer
C1 1 CAP, CERM, 0.1 uF, 250 V, +/- 10%,
X7T, 0805
C2012X7T2E104K125AA TDK
C3 1 CAP, CERM, 2200 pF, 50 V, +/- 10%,
X7R, AEC-Q200 Grade 1, 0402
GCM155R71H222KA37D MuRata
C4 1 CAP, CERM, 3300 pF, 100 V, +/- 10%,
X7R, AEC-Q200 Grade 1, 0603
CGA3E2X7R2A332K080AA TDK
C6, C7, C24 3 CAP, CERM, 22 µF, 25 V,+/- 10%, X5R,
AEC-Q200 Grade 3, 1210
GRT32ER61E226KE13L MuRata
C9, C10, C22, C23 4 Cap Ceramic 1uF 250V X7T 10% Pad
SMD 1812 +125°C Automotive T/R
CGA8P3X7T2E105K250KE TDK
C11 1 CAP, CERM, 56 pF, 50 V, +/- 5%, C0G/
NP0, 0603
C0603C560J5GACTU Kemet
C16, C17 2 CAP, CERM, 4.7 uF, 100 V, +/- 10%,
X7S, AEC-Q200 Grade 1, 1210
CGA6M3X7S2A475K200AB TDK
C19, C20 2 CAP, CERM, 0.1 µF, 100 V,+/- 10%,
X7R, AEC-Q200 Grade 1, 0603
HMK107B7104KAHT Taiyo Yuden
C21 1 Aluminum Electrolytic Capacitors Radial
33uF 20% 160V, Can - SMD - 2000 Hrs
@ 125°C
ULT2C330MNL1GS Nichicon
D1 1 Diode, Schottky, 150 V, 1 A,
PowerDI123
DFLS1150-7 Diodes Inc.
J2, J3, J7, J8 4 Terminal Block, 3.5mm Pitch, 2x1, TH ED555/2DS On-Shore Technology
J6 1 Header, 100mil, 2x1, Gold, TH TSW-102-07-G-S Samtec
L3 1 Ferrite Bead, 2000 ohm @ 100 MHz,
1.2 A, 1210
FBMH3225HM202NT Taiyo Yuden
R2 1 RES, 0, 5%, 0.063 W, AEC-Q200
Grade 0, 0402
CRCW04020000Z0ED Vishay-Dale
R4 1 RES, 118 k, 1%, 0.1 W, 0603 RC0603FR-07118KL Yageo
R5 1 RES, 1.00 M, 1%, 0.1 W, 0603 RC0603FR-071ML Yageo
R6 1 RES, 453 k, 1%, 0.1 W, 0603 RC0603FR-07453KL Yageo
R7 1 RES, 332 k, 1%, 0.1 W, 0603 RC0603FR-07332KL Yageo
R8 1 RES, 33.2 k, 1%, 0.1 W, 0603 RC0603FR-0733K2L Yageo
R9 1 RES, 61.9 k, 1%, 0.1 W, 0603 RC0603FR-0761K9L Yageo
R10 1 RES, 100 k, 1%, 0.1 W, 0402 ERJ-2RKF1003X Panasonic
R11 1 RES, 1.00 k, 1%, 0.125 W, AEC-Q200
Grade 0, 0805
CRCW08051K00FKEA Vishay-Dale
R12 1 RES, 0, 5%, 0.1 W, AEC-Q200 Grade
0, 0603
CRCW06030000Z0EA Vishay-Dale
T1 1 Power inductor, coupled, shielded, 20%
tol, RoHS, halogen-free
LPD8035V-333MRC Coilcraft
TP1 1 Test Lead clips and hooks, SMT S1751-46 Harwin
TP2, TP3, TP4 3 Terminal, Turret, TH, Triple 1598-2 Keystone
U1 1 IC LM5168FQDDAR Texas Instruments
C2 0 CAP, CERM, 1000 pF, 200 V,+/- 10%,
X7R, 0603
GRM188R72D102KW07D MuRata
C5 0 CAP, AL, 100 µF, 25 V, +/- 20%, SMD UWT1E101MCL1GS Nichicon
C12, C13 0 CAP, CERM, 22 uF, 25 V, +/- 10%,
X7R, AEC-Q200 Grade 1, 1210
TMK325B7226KMHT Taiyo Yuden
C14 0 CAP, CERM, 0.01 µF, 100 V,+/- 10%,
X8R, AEC-Q200 Grade 0, 0603
CGA3E2X8R2A103K080AD TDK
C15 0 CAP, CERM, 1000 pF, 50 V, +/- 5%,
X7R, AEC-Q200 Grade 1, 0603
C0603C102J5RACAUTO Kemet
C18 0 CAP, CERM, 4.7 uF, 100 V, +/- 10%,
X7S, AEC-Q200 Grade 1, 1210
CGA6M3X7S2A475K200AB TDK
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Table 6-1. LM5168FQEVM Bill of Materials (continued)
Designator Quantity Description PartNumber Manufacturer
C25 0 CAP, CERM, 22 µF, 25 V,+/- 10%, X5R,
AEC-Q200 Grade 3, 1210
GRT32ER61E226KE13L MuRata
J1, J5 0 Header, 100mil, 2x1, Gold, TH TSW-102-07-G-S Samtec
J4 0 Header, 100mil, 3x1, Gold, TH HTSW-103-07-G-S Samtec
L2 0 Inductor, Shielded Drum Core, Ferrite,
15 uH, 1.8 A, 0.05 ohm, AEC-Q200
Grade 1, SMD
MSS7341T-153MLB Coilcraft
R1 0 RES, 1.0, 5%, 0.1 W, AEC-Q200 Grade
0, 0603
CRCW06031R00JNEA Vishay-Dale
R3 0 RES, 0.2, 1%, 1 W, 2010 CSRN2010FKR200 Stackpole Electronics Inc
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7 Performance Curves
Unless otherwise specified the following condition apply: TA = 25ºC, IOUT1 = Primary output current, IOUT2 =
Secondary output current. Please note that for EVMs labeled as LM5168FQEVM, that the LM5168F is installed
and approximately one half of the load current is available from this device. Both EVMs are identical, except for
the converter IC installed.
Output Current (A)
Efficiency (%)
0.015 0.03 0.045 0.06 0.075 0.09 0.105 0.12 0.135 0.15
0
10
20
30
40
50
60
70
80
90
100
48V
60V
80V
Output Current = IOUT1 = IOUT2
Figure 7-1. Efficiency
Primary Output Current (A)
Primary Output Voltage (V)
Secondary Output Voltage (V)
0 0.05 0.1 0.15 0.2 0.25 0.3
10.156 10
10.1562 10.1
10.1564 10.2
10.1566 10.3
10.1568 10.4
10.157 10.5
Primary Output Voltage
Secondary Output Voltage
IOUT2 = 0 A VIN = 48 V
Figure 7-2. Load Regulation
Secondary Output Current (A)
Primary Output Voltage (V)
Secondary Output Voltage (V)
0 0.05 0.1 0.15 0.2 0.25
10.155 9.2
10.156 9.3
10.157 9.4
10.158 9.5
10.159 9.6
10.16 9.7
10.161 9.8
10.162 9.9
10.163 10
10.164 10.1
10.165 10.2
Primary Output
Secondary Output
IOUT1 = 0 A VIN = 48 V
Figure 7-3. Load Regulation
20V/div
1µs/div
0
VIN = 48 V IOUT = 0 A
Figure 7-4. Typical Switching Waveform
800µs/div
Primary Output
5V/div
Secondary Output
5V/div
Power Good
10V/div
EN, 10V/div
0
0
0
0
VIN = 48 V IOUT = IOUT2 = 100 mA
Figure 7-5. Typical Start-up Waveform
2ms/div
Primary Output
5V/div
Secondary Output
5V/div
Power Good
10V/div
EN, 10V/div
VIN = 48 V IOUT = IOUT2 = 100 mA
Figure 7-6. Typical Shut-down Waveform
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