Texas Instruments EVMK2G User manual

Evaluation Modules for the the 66AK2Gxx DSP
+ ARM processors (EVMK2G, EVMK2GX, and
EVMK2GXS)
User's Guide
Literature Number: SPRUI65A
April 2016–Revised January 2018

2SPRUI65A–April 2016–Revised January 2018
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Table of Contents
Contents
Preface ........................................................................................................................................ 7
1 Introduction......................................................................................................................... 9
1.1 Features................................................................................................................... 9
1.2 Description............................................................................................................... 10
1.3 System View............................................................................................................. 10
1.4 What's in the Box?...................................................................................................... 10
1.5 What's Not in the Box?................................................................................................. 10
1.6 Acronyms ................................................................................................................ 13
2 Testing and Results............................................................................................................ 13
2.1 Overview................................................................................................................. 13
2.2 Setup ..................................................................................................................... 13
2.3 Test Points............................................................................................................... 14
3 System Description ............................................................................................................ 15
3.1 Functional Block Diagram ............................................................................................. 15
3.2 Basic Operation......................................................................................................... 15
3.3 Over Voltage Protection Circuit....................................................................................... 17
3.4 JTAG Emulation Overview ............................................................................................ 18
3.5 Board Management Controller (BMC) ............................................................................... 20
3.6 Clock Distribution ....................................................................................................... 22
3.7 DDR3L Interface........................................................................................................ 24
3.8 NAND Flash ............................................................................................................. 25
3.9 SPI Flash ................................................................................................................ 26
3.10 Quad SPI (QSPI) Flash................................................................................................ 27
3.11 EEPROM ................................................................................................................ 27
3.12 SD Card.................................................................................................................. 28
3.13 eMMC .................................................................................................................... 28
3.14 Gigabit Ethernet......................................................................................................... 30
3.15 PCIe ...................................................................................................................... 31
3.16 Display Interface........................................................................................................ 31
3.17 Touch Connector ....................................................................................................... 33
3.18 Audio Codec............................................................................................................. 33
3.19 COM8 Connector ....................................................................................................... 34
3.20 DCAN..................................................................................................................... 34
3.21 MLB....................................................................................................................... 35
3.22 USB Host ................................................................................................................ 36
3.23 USB Dual Role.......................................................................................................... 36
3.24 UART..................................................................................................................... 37
3.25 Audio Expansion Connector........................................................................................... 39
3.26 Serial Expansion Connector........................................................................................... 40
3.27 I2C Address Mapping .................................................................................................. 41
3.28 McASP Configuration .................................................................................................. 42

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Contents
4 Power Supply..................................................................................................................... 43
4.1 Power Distribution Diagram ........................................................................................... 44
4.2 Power Supply Calculation ............................................................................................. 45
4.3 Power-Up Sequence ................................................................................................... 46
5 Booting ............................................................................................................................. 47
5.1 Boot Mode Selection ................................................................................................... 47
5.2 Matrix Demonstrations ................................................................................................. 47
6 Connector Descriptions ...................................................................................................... 53
6.1 DC Jack (J3) ............................................................................................................ 53
6.2 Mini USB for On-board XDS (J1) and CP2105 (J23).............................................................. 53
6.3 COM8 (J2)............................................................................................................... 55
6.4 PCI Express (J5)........................................................................................................ 56
6.5 JTAG MIPI-60 (J19).................................................................................................... 57
6.6 LCD (J22) and Touch Screen (J21).................................................................................. 58
6.7 RJ45 Ethernet (J31).................................................................................................... 60
6.8 Stereo Analog Audio Input (J32) and Output (J33) ................................................................ 60
6.9 MLB (J34)................................................................................................................ 61
6.10 USB0 Host Type A (J35) .............................................................................................. 61
6.11 HDMI (J36) .............................................................................................................. 62
6.12 MMC/SD (J37) .......................................................................................................... 63
6.13 USB1-Micro (J38)....................................................................................................... 63
6.14 DB9 Connector (P1, P2, and P3)..................................................................................... 64
7 Switch Descriptions............................................................................................................ 65
7.1 Slide Switch ............................................................................................................. 65
7.2 Tactile Switch ........................................................................................................... 66
7.3 DIP Switch............................................................................................................... 67
7.4 DIP SPST Switch....................................................................................................... 67
8 EVM Board Physical Specifications...................................................................................... 68
8.1 Mounting of LCD and Spacers........................................................................................ 68
8.2 Board Layout............................................................................................................ 70
8.3 System LEDs............................................................................................................ 72
8.4 Design Files ............................................................................................................. 72
9 EVM with Audio Daughter Card............................................................................................ 74
9.1 K2G Audio Daughter Card Block Diagram .......................................................................... 75
9.2 EVM with Audio Daughter Card Connections....................................................................... 76
10 EVMK2GXS Secure EVM ..................................................................................................... 79
10.1 Removing and Installing a K2G in the Socket ...................................................................... 79
10.2 Initial Use of a Socketed Board....................................................................................... 80
11 EVM Important Notice ......................................................................................................... 80
Revision History.......................................................................................................................... 81

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List of Figures
List of Figures
1 EVMK2G Board Assembly Pictorial - Top View........................................................................ 11
2 EVMK2G Board Assembly Pictorial - Bottom View.................................................................... 12
3 EVMK2G Functional Block Diagram..................................................................................... 16
4 Over Voltage Protection Circuit........................................................................................... 17
5 Fault Indication Circuit..................................................................................................... 17
6 Display and Trace Resistor Multiplexing ................................................................................ 18
7 JTAG Interface Block Diagram ........................................................................................... 19
8 Board Management Controller (BMC) Block Diagram................................................................. 21
9 66AK2Gxx SoC Clocks Block Diagram.................................................................................. 22
10 Other Clocks Block Diagram.............................................................................................. 23
11 DDR3L Interface Block Diagram ......................................................................................... 24
12 NAND Flash Block Diagram .............................................................................................. 25
13 SPI Flash Block Diagram.................................................................................................. 26
14 Quad SPI (QSPI) Flash Block Diagram ................................................................................. 27
15 EEPROM Interface Block Diagram ...................................................................................... 27
16 SD/MMC Interface Block Diagram ....................................................................................... 28
17 eMMC Interface Block Diagram .......................................................................................... 28
18 eMMC and COM8 Resistor Multiplexing ................................................................................ 29
19 Gigabit Ethernet Interface Block Diagram .............................................................................. 30
20 PCIe Interface Block Diagram............................................................................................ 31
21 Display Interface Block Diagram ......................................................................................... 32
22 Touch Interface Block Diagram........................................................................................... 33
23 Audio Codec Interface Block Diagram................................................................................... 33
24 COM8 Connector Interface Block Diagram............................................................................. 34
25 DCAN Interface Block Diagram .......................................................................................... 34
26 MLB Interface Block Diagram............................................................................................. 35
27 USB Host Interface Block Diagram ...................................................................................... 36
28 USB Dual Role Interface Block Diagram................................................................................ 36
29 UART0 Interface Block Diagram ......................................................................................... 37
30 UART1 Interface Block Diagram ......................................................................................... 38
31 UART2 Interface Block Diagram ......................................................................................... 38
32 Audio Expansion Connector Interface Block Diagram ................................................................ 39
33 Serial Expansion Connector Interface Block Diagram ................................................................ 40
34 McASP Interface Block Diagram......................................................................................... 42
35 Power Distribution Diagram............................................................................................... 44
36 Power-Up Sequence Diagram............................................................................................ 46
37 EVMK2G Board Connectors.............................................................................................. 54
38 LCD (J22) and Touch Screen (J21) Connectors....................................................................... 58
39 EVMK2G Switches......................................................................................................... 65
40 DIP (SW3) Switch.......................................................................................................... 67
41 EVMK2G Mechanical Drawing ........................................................................................... 69
42 EVMK2G Board Assembly Layout - Top View ......................................................................... 70
43 EVMK2G Board Assembly Layout - Bottom View ..................................................................... 71
44 EVMK2G Board LEDs ..................................................................................................... 73
45 K2G Audio Daughter Card................................................................................................ 74
46 K2G Audio Daughter Card Block Diagram.............................................................................. 75
47 Connecting the K2G Audio Daughter Card............................................................................. 76

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List of Figures
48 Ironwood Socket............................................................................................................ 79

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List of Tables
List of Tables
1 Acronyms.................................................................................................................... 13
2 EVMK2G Test Points ...................................................................................................... 14
3 Display and Trace Resistor Multiplexing ................................................................................ 19
4 Muxing Between BMC UART1 and SOC_UART2..................................................................... 20
5 Muxing Between BMC UART0 to USB and 4-pin Header ............................................................ 20
6 eMMC and COM8 Resistor Multiplexing ................................................................................ 29
7 DSS Lines Between LCD and HDMI Multiplexing ..................................................................... 32
8 HDMI Audio Line Selection Between McASP0 and McASP2 ........................................................ 33
9 Audio Codec Multiplexing ................................................................................................. 33
10 UART0 Multiplexing........................................................................................................ 37
11 UART1 Multiplexing........................................................................................................ 37
12 SoC Address Table ........................................................................................................ 41
13 BMC I2C Address Table................................................................................................... 41
14 McASP Configuration...................................................................................................... 42
15 EVMK2G Regulators....................................................................................................... 43
16 Power Supply Calculation................................................................................................. 45
17 Total Current and Power Consumption ................................................................................. 46
18 EVMK2G Board Connectors.............................................................................................. 53
19 COM8 (J2) Pin List......................................................................................................... 55
20 PCI Express (J5) Pin List.................................................................................................. 56
21 JTAG MIPI-60 (J19) Pin List.............................................................................................. 57
22 LCD (J22) and Touch Screen (J21) Pin List............................................................................ 58
23 RJ45 Ethernet (J31) Pin List.............................................................................................. 60
24 Stereo Analog Audio Input (J32) and Output (J33) Pin List .......................................................... 60
25 MLB (J34) Pin List.......................................................................................................... 61
26 USB0 Host Type A (J35) Pin List ........................................................................................ 61
27 HDMI (J36) Pin List ........................................................................................................ 62
28 MMC/SD (J37) Pin List .................................................................................................... 63
29 USB1-Micro (J38) Pin List................................................................................................. 63
30 DB9 Connector (P1, P2, and P3) Pin List............................................................................... 64
31 EVMK2G Tactile Switches ................................................................................................ 66
32 Boot Mode Configurations for SW3...................................................................................... 67
33 EVMK2G Board LEDs ..................................................................................................... 72

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Preface
Preface
SPRUI65A–April 2016–Revised January 2018
Read This First
About This Manual
This user's guide (UG) describes the hardware architecture of the 66AK2Gxx General Purpose (GP)
Evaluation Module (EVMK2G) designed and developed by Mistral Solutions Pvt. Ltd. The 66AK2Gxx is a
KeyStone™ II-based DSP + ARM System-on-Chip (SoC).
There are three variants of the EVM for the K2G. These include the EVMK2G, the EVMK2GX, and the
EVMK2GXS.
The EVMK2G has a 66AK2G02 operating at 600 MHz installed. This board includes the TPS659118
power supply for generating all voltages needed by the 66AK2G02.
The EVMK2GX has a 66AK2G12 operating at 1 GHz installed. This board includes the TPS65911A power
supply for generating all voltages needed by the 66AK2G12.
The EVMK2GXS has a socket for installation of a 66AK2G12HS operating at 1 GHz. This board includes
the TPS65911A power supply for generating all voltages needed by the 66AK2G12.
The information in this document pertains to all three versions of the board. In all cases, the EVM is
referred to generically as the EVMK2G.
Glossary
TI Glossary —This glossary lists and explains terms, acronyms, and definitions.
Related Documentation From Texas Instruments
For product information, visit the Texas Instruments website at http://www.ti.com.
SPRUHY8—66AK2Gx Multicore DSP+ARM KeyStone II System-on-Chip (SoC) Technical Reference
Manual. Details the integration, the environment, the functional description, and the programming
models for each peripheral and subsystem in the device.
Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the
respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views;
see TI's Terms of Use.
TI E2E™ Online Community—TI's Engineer-to-Engineer (E2E) Community. Created to foster
collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore
ideas and help solve problems with fellow engineers.
TI Embedded Processors Wiki—Texas Instruments Embedded Processors Wiki. Established to help
developers get started with Embedded Processors from Texas Instruments and to foster innovation
and growth of general knowledge about the hardware and software surrounding these devices.
Board History
PCB Revision History
Rev A Pre-Proto EVM for power, Board management Controller and On-board emulator validation.
Rev B Socketed Proto EVM for Silicon bring up.
Rev C Modified as per change list MS_TI_EVMK2G_MC_REVC_CHNG_LIST.xls
Rev D Over Voltage protection circuit added.

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Read This First
Trademarks
KeyStone, E2E, Code Composer Studio, Tiva, WiLink are trademarks of Texas Instruments.
ARM, Cortex are registered trademarks of ARM Limited.

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K2G General Purpose Evaluation Module (EVMK2G)
User's Guide
SPRUI65A–April 2016–Revised January 2018
K2G General Purpose Evaluation Module (EVMK2G)
1 Introduction
This user's guide describes the hardware architecture of the 66AK2Gxx General Purpose (GP) Evaluation
Module (EVMK2G) designed and developed by Mistral Solutions Pvt. Ltd. The 66AK2Gxx is a KeyStone™
II-based DSP + ARM System-on-Chip (SoC). There are three variants of the K2G EVM.
1.1 Features
The key features of the EVMK2G are:
• Based on the KeyStone II architecture with ARM®Cortex®-A15 @ 600 MHz or 1 GHz, and
TMS320C66x DSP @ 600 MHz or 1 GHz
• Board Management Controller (BMC) for board management functions like system status and Boot
mode control
• 2 GByte of DDR3L with ECC
• 2 Gbit of NAND Flash
• 128 Mbit of SPI Flash
• 512 Mbit of QSPI Flash
• 128 kByte of I2C EEPROM for Boot support from I2C
• Micro SD-Card slot
• 16 GByte of eMMC
• Gigabit Ethernet port supporting 10/100/1000 Mbps data rate on RJ45 connector
• PCIe ×1 card slot
• 4.3” LCD display with Capacitive touch (not provided)
• HDMI transmitter
• Audio Line In and Line Out
• COM8 interface
• DCAN and MLB interfaces
• One USB2.0 host and one USB2.0 Dual-role ports
• One RS-232 serial interface on DB9 connector or UART over mini-USB connector, One UART
interface on 6-pin header
• Audio Daughter Card (not provided) plugable to Audio Expansion, Serial Expansion headers
• MIPI 60-pin JTAG header to support all types of external emulator
• On-board XDS200 Emulator
• RoHS compliant design
• Powered by DC power-wall adapter (12V/5A) (not provided)
• ATX form factor (12” × 9.6” )

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K2G General Purpose Evaluation Module (EVMK2G)
1.2 Description
The EVMK2G is a high-performance, cost-efficient, standalone, general-purpose development platform
that enables you to evaluate and develop applications for the Texas Instrument’s Keystone II System-on-
Chip (SoC) 66AK2Gxx.
The K2G SoC (66AK2Gxx) is the new device from TI’s Keystone II architecture with:
• ARM®Cortex®-A15 Microprocessor Unit (ARM A15) Subsystem at up to 600 MHz or 1 GHz
• TMS320C66x Fixed- and Floating-Point VLIW DSP Subsystem at up to 600 MHz or 1 GHz
• Two Programmable Real-Time Unit and Industrial Communication Subsystems (PRU-ICSS)
• Multicore Shared Memory Controller (MSMC) with 1024KB of Shared L2 RAM
• Up to 36-Bit DDR3 External Memory Interface (EMIF) with ECC (32-Bit Data + 4-Bit ECC)
• Peripheral Component Interconnect Express (PCIe) 2.0 Port with Integrated PHY
• Three Multichannel Audio Serial Port (McASP) Peripherals
• Multichannel Buffered Serial Port (McBSP)
• Six Enhanced High-Resolution Pulse Width Modulation (eHRPWM) Modules
• Three Inter-Integrated Circuit (I2C) Interfaces
• Three Universal Asynchronous Receiver/Transmitter (UART) Interfaces
• Four Serial Peripheral Interfaces (SPI)
• Seven 64-Bit Timers
• Secure Device - Supports Standard secure boot and One-time-Programmable (OTP) memory for key
storage
• 21 × 2 mm20.8mm pitch WBBGA
1.3 System View
The top and the bottom pictorial views of the EVMK2G are provided in Figure 1 and Figure 2, respectively.
1.4 What's in the Box?
The EVMK2G Kit contains the following parts:
• An on-board, high-speed XDS200 Emulator
• Parts for assembling the LCD and the spacers
• Mini-B to standard A-type USB cable
• Micro-B to standard A-type USB cable
• USB adapters: USB micro-A/B to A socket type adapter
• Ethernet cable
• Female to female RS-232 serial cable (cross cable)
• Micro-SD card 32GB
• SD card reader
• uSD to SD adapter
1.5 What's Not in the Box?
The EVMK2G Kit does not contain the following parts:
• Audio Daughter Card (TI part number AUDK2G)
• Power supply (CUI, Inc., part number SDI65-12-U-P5)
• LCD Touchscreen display (Newhaven Display, Intl., part number NHD-4.3-480272EF-ATXL#-CTP)

BMC
LCD BMC JTAG COM8 Connector +12 V DC
BMC
Controller 66AK2Gxx SoC PCIe Connector
DCAN0
UART0
Over DB9
SoC UART0
&
BMC UART0
Over USB
BMC
UART0
DCAN1
UART2
LCD
Connector HDMI Connector
RJ45
Ethernet
Connection
USB0
Host Mini USB For XDS200 Audio Line Out
Touch
Connector MLB Connector USB1 Dual Role Micro SD card Connector Audio Line In
MiPi 60
Connector
Audio
Expansion
Connector
Serial
Expansion
Connector
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K2G General Purpose Evaluation Module (EVMK2G)
Figure 1. EVMK2G Board Assembly Pictorial - Top View

NAND
Flash
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K2G General Purpose Evaluation Module (EVMK2G)
Figure 2. EVMK2G Board Assembly Pictorial - Bottom View

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K2G General Purpose Evaluation Module (EVMK2G)
1.6 Acronyms
Table 1 is a description of some terms used in this document.
Table 1. Acronyms
Acronym Description
ATX Advanced Technology eXtended
BMC Board Management Controller
CCS Code Composer Studio
DDR3 Double Data Rate 3 Interface
DSP Digital Signal Processor
eHRPWM Enhanced High-Resolution Pulse Width Modulation
EEPROM Electrically-Erasable Programmable Read-Only Memory
EMAC Ethernet Media Access Controller
EMIF External Memory Interface
EVM Evaluation Module
EVMK2G 66AK2Gxx General Purpose (GP) Evaluation Module
I2C Inter-Integrated Circuit
JTAG Joint Test Action Group
LED Light-Emitting Diode
McASP Multichannel Audio Serial Port
MMC Module Management Controller
PCIe Peripheral Component Interconnect Express
SoC System-on-Chip
SPI Serial Peripheral Interfaces
UART Universal Asynchronous Receiver/Transmitter
USB Universal Serial Bus
XDS200 Texas Instruments’ Emulator
2 Testing and Results
2.1 Overview
2.2 Setup

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K2G General Purpose Evaluation Module (EVMK2G)
2.3 Test Points
The EVMK2G board has 187 test points. Each test point and its function is given in Table 2.
Table 2. EVMK2G Test Points
Test
Point Signal Test Point Signal Test Point Signal Test Point Signal
9 Reserved for U51 61 DGND 110 LDO5_3V3 160 Reserved for U62.45
13 Reserved for U20B 62 DGND 111 U32-2.G6-GPIO5 161 Reserved for U62.45
14 Reserved for J2 63 VCC12V0_DC_IN 112 NRESPWRON1 162 Reserved for U62.45
15 Reserved for J2 64 VCC12V0_DC_IN 113 PMIC_VDD2 163 Reserved for U62.45
16 Reserved for J2 65 Reserved for U17-4 114 U32-2.EN2 164 MFP2
17 Reserved for J2 66 Reserved for U20A 115 Reserved for U39.A7 165 MFP3
18 Reserved for J2 67 Reserved for U20A 116 U32-2.EN1 166 HDMI_CEC_D
19 Reserved for U20B 68 Reserved for U20A 117 U32-2.GPIO8 167 U96-GPIO2
20 Reserved for U20G.V5 69 Reserved for U20A 118 LDO2_1V8 168 U96-GPIO1
21 Reserved for U20A 70 Reserved for U20A 119 LDO8_3V3 169 LINE2L+
22 Reserved for U20A 71 Reserved for U20A 120 LDO6_3V3 170 LINE2L-
23 Reserved for J2 72 Reserved for U20A 121 LDO7_3V3 171 LED_MODE
25 Reserved for J2 74 Reserved for U20A 122 LDO1_1V8 172 HPLCOM
26 Reserved for J2 75 Reserved for U20A 123 Reserved for U46.A7 173 HPRCOM
29 TPS65000_PG# 76 Reserved for U20A 124 MMC1POW 174 Reserved for J34
30 COM_GPIO9 77 Reserved for U20A 125 Reserved for U1-16.J3 175 U32-2 . GPIO0
31 COM_BTUARTDEBUG 78 Reserved for U20A 126 Reserved for U49.A7 176 BMC_JTAG_TRSTn
33 COM_GPIO10 79 Reserved for U20A 127 SYSCLKOUT 177 Reserved for U17-6
34 COM_GPIO12 80 Reserved for U20A 128 Reserved for U52.A7 178 Reserved for U17-9
35 COM_GPIO11 81 Reserved for U20A 129 DGND 179 Reserved for J34
36 T_TDIS 82 Reserved for U17-4 131 OBSCLK_N 180 Reserved for U20F
37 SPARE0 84 VRTC 132 RMIIREFCLK/
PR0ECAP0ECAP
SYNCOUT
181 Reserved for U20F
38 SPARE1 85 PMIC_PGOOD 133 SoC Reserved pin 182 Reserved for U20B
39 uEXP3 86 Reserved for U20B 135 OBSCLK_P 184 Reserved for U51
40 MEM_A12 88 U32-2 - GPIO3 136 SoC Reserved pin 185 Reserved for U51
41 uEXP2 89 U32-2 - TEST 138 SoC Reserved pin 186 Reserved for U51
42 VCC5V0_DCDC 90 DGND 139 SoC Reserved pin 187 Reserved for U51
43 Reserved for U17-1 91 U32-2.C6-TRAN 140 SoC Reserved pin 189 Reserved for U51
44 uEXP1 92 DGND 141 SoC Reserved pin 191 Reserved for U51
45 Reserved for U17-1 93 Reserved for U20-L 142 SoC Reserved pin 192 Reserved for U51
46 uEXP0 94 Reserved for U20-L 143 SoC Reserved pin 193 BUF_McASP2ACLKX
47 Reserved for U17-1 95 Reserved for U20-L 144 SoC Reserved pin 194 VCC3V3_DC_CONN
48 Reserved for U17-6 96 Reserved for U20-L 145 SoC Reserved pin 195 VCC3V3
49 Reserved for U17-1 97 XOSC1 146 SoC Reserved pin 196 VCC1V2_XDS
50 Reserved for U17-6 98 BMC_HIBn 147 SoC Reserved pin 197 VCC1V8_XDS
51 U18 SS/TR 100 LDO4_1V8 149 SoC Reserved pin 198 VCC3V3_XDS
52 5V_PWRGD 101 CLK32KOUT 150 SoC Reserved pin 199 VCC3V3_DCIN
53 U18.8-COMP 102 U32-2.D5-EN 151 SoC Reserved pin 200 3V3_DCIN_PG
54 Reserved for U20B 103 LDO3_1V8 152 VLED+ 201 DGND
55 3V3_CONN_PG 104 DGND 153 DDR_ODT1 202 DGND
56 Reserved for U20J.A4 106 Reserved for U27.A7 154 DDR_CKE1 203 DGND
57 Reserved for
U17-5.T19 107 U32-2.F6-GPIO1 155 DDR_CE1Z 204 DGND

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K2G General Purpose Evaluation Module (EVMK2G)
Table 2. EVMK2G Test Points (continued)
Test
Point Signal Test Point Signal Test Point Signal Test Point Signal
58 Reserved for U20A 108 U32-2.H7-GPIO4 157 SOC_DSS_FID 205 BUF_McASP2FSX
59 Reserved for U20A 109 U32-2.G8-VREF 158 Reserved for U62.45 206 BUF_MCASP2AXR2
159 SOC_SPI3_MISO 207 BUF_MCASP2AXR3
208 HDMI_AUDD0
209 HDMI_AUDD1
210 HDMI_AUDD2
211 HDMI_AUDD3
212 HDMI_AUDMCLK
213 HDMI_AUDBCLK
214 HDMI_AUDFSX
3 System Description
3.1 Functional Block Diagram
The functional block diagram of the EVMK2G is shown in Figure 3.
3.2 Basic Operation
The EVMK2G is a full-featured general-purpose development tool for the 66AKGxx Keystone II-based
SoC. It supports a comprehensive software including the Texas Instruments Code Composer Studio™
(CCS) integrated development environment (IDE) and Processor Software Development Kit (SDK). The
Processor SDK is a unified software platform for TI embedded processors providing easy setup and fast
out-of-the-box access to benchmarks and demos.
The Processor SDK for the EVMK2G can be downloaded from Processor SDK for 66AK2Gx Processors -
Linux and TI-RTOS Support.
The latest version of CCS can be downloaded from Code Composer Studio (CCS) Integrated
Development Environment (IDE). It is recommended to use CCS revision 6.1.2 or later with the EVMK2G.
The Processor SDK Linux images are preprogrammed to the SD Card that is shipped with the EVMK2G.
Refer to the Processor SDK user guide for more details on running Linux with the EVM.
Refer to documentation available at Processor SDK for 66AK2Gx Processors - Linux and TI-RTOS
Support for instructions on setting up CCS and exploring software packages delivered with the EVMK2G.
NOTE: For TI RTOS users, refer to the Processor SDK RTOS Getting Started Guide.

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TLV70708LP2996A
PMIC tTPS659118 or TPS65911N
PB Switch Bank (4)
DIP Switch Bank (4)
NAND (x16) Flash
66AK2Gxx
SoC
1x PCIe Card-Edge
Connector
Serial expansion header
JTAG / EMU[1:0]
GPIO / EMU[19:2]
JTAG / EMU Muxes /
Buffers
MIPI Connector
JTAG EMU[19:0]
GPIOs
SPI0
Mini
USB
CP2105
UART1
Timer 1
I2C0
SmartReflex
Resets /
Boot
PCI CE Reference Clock
SYSCLK
DDRCLK
USB0_CLK
24MHz XO
MMC0 (3.3V)
MMC1 (1.8V)
DDR3 EMIF
(x36)
DDR3 devices
QSPI
MLB
LCD, touch
connectors
DSS-UL
NSS (RGMII)
UART0
SPI1
SPI2
CDCM620
8
USB1_CLK
I2C1
I2C2
McBSP
Quad SPI
512 Mbit
Samtec
QSH-020-01-L-D-DP-A
PCIe
USB0 t2.0pair
USB1 t2.0pair
PCIECLK
UART2
SPI3
I2C EEPROM
SPI
NOR FLASH
USB2.0
Type A socket
NSS (MDIO)
Micrel
KSZ9031RNX RJ45
25 MHz
Xtal
MDIO
eMMC
uSDCard
CPTS CS2000
DCAN1
To DSS-UL
touch screen
connector
I2C1,
GPIO
AUDIOOSC
22.5792 MHz Xtal
SYSOSC
24 MHz Xtal
DUT Adj. Supply
#1
AVS Core /
_s_
(+0.9V)
DUT Adj. Supply
#2
DSP Core Fixed
Core / ^s1"
(+0.9V)
SERDES L.V. Supply
^>K_PCIE/USB_W_
(+0.85V)
DUT Adj. Supply
#5
^s_Z_
(+1.35V) DUT Fixed Supply
³''595()667/´
DDR VTT
(+0.675V)
DUT Adj. Supply
#3
^s18_
DSP IO / PLL
(+1.8V)
DUT Adj. Supply
#4
^s33_
DSP IO
(+3.3V)
INA226 INA226 INA226 INA226 INA226
S25FL512S
Timer 0
SiI902
2A
HDMI
Type A
To DSS-UL connectors,
due to pin muxing.
Need isolation in
between.
100 MHz (HCSL)
100 MHz (LVDS)
24 MHz (LVCMOS)
CPTSREFCLK
24 MHz (LVDS)
USB2.0
Micro-AB
DCAN0
To 2-pin
header
CAN xcvr
SN65HVDA54
To DB-9
1588
DAC
TC-
VCXO SPI3
SPI3 to 1588 circuit
DB9
Conn RS232
COM8
connector
To COM8
UART1
Level
shifter McASP2
GPIO
Console header
To BMC
To BMC
McASP2
McASP1
McASP0
AIC310
6
McASP2 3.5mm
stereo jacks
To AIC3106
I2C1
GPMC
Audio
expansion
header
To COM8
eQEP
eHRPWM3, 4, 5
eCAP0, 1
To DSS-UL connectors, due to
pin muxing.
eHRPWM0, 1, 2
Mini-
USB XDS200
I2C2
BMC
LED x4
16x2 LCD character display
BMC, WARM,
FULL RESETS
CP2105
Console header
NOTE: all port
numbers within the
BMC block are BMC
port numbers, not
SoC port numbers.
PH[3:0]
PJ0, PJ1, RSTn
UART0
I2C1
To K2G SOC
JTAG
14-pin header
SPI1
UART1 Rx
SoC UART2 Tx
DSS Isolator
To 2-pin
header
CAN xcvr
SN65HVDA54
To DB-9
PHY can also be clocked
from RMII_CLK output
pin.
Kingston
Switch
Resistor MUX
100 MHz (CML)
250 MHz (LVDS)
Rakon
E6718LF
DAC8550
20 MHz
MT29F2G16ABA
MT41K512M8RH (qty 5)
Y4
Y5
Y3
Y2
Y6
Y7
To PMIC
I2C1
MAX3221
MINI USB
Temperature
Sensor
I2C0 To INA226 x5
McASP0 from
Expansion
Connector
SN74AVC4T245PWR
I2C to GPIO
expander
TCA9555RTWR
To 5 pin
header/BMC
System Description www.ti.com
16 SPRUI65A–April 2016–Revised January 2018
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Copyright © 2016–2018, Texas Instruments Incorporated
K2G General Purpose Evaluation Module (EVMK2G)
Figure 3. EVMK2G Functional Block Diagram

Condition LED Status(LD14)
VINPUT between 11 to 13V
&
Current below 5A
ON
OFF
RED
VINPUT above 13V or below 11V
&
Current above 5A
PGD
DGND
VINPUT VINPUT
DGND
R925
100 K
LD14
598-8110-107F
12
R924
10 K
D18
BZT52C13S
21
R923
10 K Q19
BSS138
3
1
2
Copyright © 2016, Texas Instruments Incorporated
Note:-
Vinput nominal = 12V
I input max = 5A
RED
Condition
ONReverse Voltage
LED Status(LD15)
PGD
GATE
GATE
DGND DGND
DGND
DGNDDGND DGNDDGND DGND
VCC12V0_DC_IN
DGND
VINPUT
VINPUT
DGND
DGND DGND
VCC12V0_DC_IN
VINPUT
DGND
+
C23 100uF_35V
R922
100K
+
C825
22uF_100V
U149
LM5060MM
SENSE
1
VIN 2
OVP
3
UVLO
4
EN 5
GND
6
TIMER
7
NPGD
8
OUT 9
GATE 10
R918
261K_1%
D19
S1G-13-F
21
R917
5.62k_1%
LD15
598-8110-107F
1
2
J50
HDR_2X1
1
2
R892
0E
R919
237K_1%
R926
10K
LD9
598-8170-107F
12
C827
0.01uF
DNI
F2
5A
1 2
D17
SMCJ64CA
21
R920
47K _1%
C826
0.1uF
R30
1K
D3
B540C-13-F
2 1
R921
47K _1%
Q20 SUM60N10-17-E3
4
1
3
C824
0.1uF
C2
22uF
J3
CON_PWRJACK3_RAPC722
1
2
3
SW1
500ASSP3M2QE
1
2
3
Copyright © 2016, Texas Instruments Incorporated
www.ti.com System Description
17
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K2G General Purpose Evaluation Module (EVMK2G)
3.3 Over Voltage Protection Circuit
The Voltage Protection Circuit on the EVMK2G protects the board from over voltage, under voltage,
transient voltage, and reverse voltage input cases. The safe operation input voltage range is 11v to 13v.
Any voltage not in this range is considered a fault and the voltage protection circuit (Figure 4) isolates the
board from this input. LED LD14 (Figure 5) indicates if the DC input applied to board is in a safe input
range.
Figure 4. Over Voltage Protection Circuit
Figure 5. Fault Indication Circuit

MIPI_EMU18
MIPI_EMU19
MIPI_EMU17
MIPI_EMU16
MIPI_EMU14
MIPI_EMU11
MIPI_EMU15
MIPI_EMU10
MIPI_EMU12
MIPI_EMU13
MIPI_EMU02
MIPI_EMU03
MIPI_EMU04
MIPI_EMU05
MIPI_EMU06
MIPI_EMU07
MIPI_EMU08
MIPI_EMU09
SOC_DSSDATA620
SOC_DSSDATA720
BUFF_DSSDATA6 19
BUFF_DSSDATA7 19
SOC_DSSDATA520
SOC_DSSDATA420 BUFF_DSSDATA4 19
BUFF_DSSDATA5 19
SOC_DSSDATA1920
SOC_DSSDATA1720
SOC_DSSDATA2220
SOC_DSSDATA1620
SOC_DSSDATA2320
SOC_DSSDATA2120
SOC_DSSDATA1820
SOC_DSSDATA2020 BUFF_DSSDATA20 19
BUFF_DSSDATA18 19
BUFF_DSSDATA21 19
BUFF_DSSDATA23 19
BUFF_DSSDATA16 19
BUFF_DSSDATA22 19
BUFF_DSSDATA17 19
BUFF_DSSDATA19 19
SOC_DSSDATA820
SOC_DSSDATA920
SOC_DSSDATA1120
SOC_DSSDATA1420
SOC_DSSDATA1020
SOC_DSSDATA1520
SOC_DSSDATA1320
SOC_DSSDATA1220 BUFF_DSSDATA12 19
BUFF_DSSDATA13 19
BUFF_DSSDATA15 19
BUFF_DSSDATA10 19
BUFF_DSSDATA14 19
BUFF_DSSDATA11 19
BUFF_DSSDATA9 19
BUFF_DSSDATA8 19
RA8 0E
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
RA7 0E
1
2
3
4 5
6
7
8
RA19 10EDNI
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
RA17 10E
DNI
1
2
3
4 5
6
7
8
RA9 0E
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
RA18 10EDNI
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Copyright © 2016, Texas Instruments Incorporated
System Description www.ti.com
18 SPRUI65A–April 2016–Revised January 2018
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K2G General Purpose Evaluation Module (EVMK2G)
3.4 JTAG Emulation Overview
The EVM supports two types of Emulation: On-Board-XDS200 emulator and 60-pin MIPI Header.
When external emulator is not connected to MIPI 60-pin connector, On-board XDS200 embedded JTAG
emulator is the default type of emulation (SoC JTAG signals are routed to XDS200 on-board emulator).
When external emulator is connected to MIPI 60-pin header, it is automatically detected and SoC JTAG
signals are routed to external emulator.
3.4.1 On-Board XDS200 Emulator
The EVMK2G has on-board XDS200 embedded JTAG emulation circuitry. Hence user does not require
any external emulator to connect EVM with Code Composer Studio (CCS). You can connect the target
SoC in the EVM to CCS through the USB cable supplied in the EVM kit.
3.4.2 MIPI 60-pin Header for Connecting External Emulator
In case you want to connect an external emulator to the EVM, the MIPI 60-pin JTAG header is provided
on-board for high-speed real-time emulation. All JTAG and EMUx signals are terminated on the MIPI 60-
pin header.
The MIPI 60-pin JTAG header supports all standard (XDS510 or XDS560) TI DSP emulators. Refer to the
documentation supplied with your emulator for connection assistance.
EMU pins are pin muxed with DSS (Display Subsystem) and Boot mode pins. The EMU signals are
resistor muxed with DSS signals. A Boot mode buffer is enabled during boot-up to latch the Boot mode
signals.
Resistor muxing between display and trace functionality is shown in Figure 6 and Table 3.
Figure 6. Display and Trace Resistor Multiplexing

K2G SoC
CPLD
BUFFER
FET SWICH
RESISTOR
MUX
EMU [00:01]
EMU [02:19]
2
18
SD RAM
AM1802
PROCESSOR
JTAG
SIGNALS
CPLD
I/Os
SPI1 6 A0-11
12
DQ0-15
BA0-1
18
6
6
MIPI - 60
JTAG
SIGNALS
BUFFER
FET
SWITCH
JTAG
SIGNALS
6
6
SPI FLASH
CONTROL
SIGNALS
8
Copyright © 2016, Texas Instruments Incorporated
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19
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K2G General Purpose Evaluation Module (EVMK2G)
Table 3. Display and Trace Resistor Multiplexing
DNI Mount Description
RA17, RA18, RA19 RA7, RA8, RA9 For HDMI/LCD display (default)
RA7, RA8, RA9 RA17, RA18, RA19 For Trace
The JTAG interface, on-board XDS200 emulator, MIPI 60-pin header for external emulator connection
details are shown in Figure 7.
Figure 7. JTAG Interface Block Diagram

System Description www.ti.com
20 SPRUI65A–April 2016–Revised January 2018
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K2G General Purpose Evaluation Module (EVMK2G)
3.5 Board Management Controller (BMC)
The Tiva™ C Series ARM®Cortex®-M4 microcontroller TM4C129XNCZAD is used as a board
management controller for the EVMK2G. The BMC controls the SoC boot sequence and displays the
status on the character LCD interfaced to the BMC. The BMC facilitates the selection of Boot mode, reset
settings, and configuring clock generators.
The JTAG interface is provided to access and program the BMC controller. Note that the BMC is used
mainly for EVM test automation and, in general, is not required for customer products.
The push buttons, DIP switches, and LEDs are connected to the BMC by way of GPIOs. The 4-bit DIP
switch is used to set the processor boot mode, the three push buttons are for reset, and the remaining are
user configurable.
Isolators are used between the BMC and SoC peripherals. The BMC is interfaced to the SoC through
I2C1 and UART1. The BMC I2C0 is interfaced to the INA devices for processor current monitoring. The
BMC UART0 is muxed between the 4-pin header through RS-232 level translator and the CP2105 for
console purpose.
Table 4. Muxing Between BMC UART1 and SOC_UART2
Signal Logic SoC UART 2 Connected To
BMC_UART_SEL High UART2 header (J49)
Low BMC
Table 5. Muxing Between BMC UART0 to USB and 4-pin Header
Signal Logic BMC_UART0 Pins Connected To
BMC_UART0_DETECT High USB-to-UART module CP2105
Low BMC console 4-pin header (J6)