Texas Instruments TPS54334EVM-722 User manual

User's Guide
SLVUAH4–August 2015
TPS54334EVM-722 3-A Regulator Evaluation Module
This user's guide contains background information for the TPS54334 as well as support documentation for
the TPS54334EVM-722 evaluation module (PWR722-001). Also included are the performance
specifications, the schematic, and the bill of materials for the TPS54334EVM-722.
Contents
1 Introduction ................................................................................................................... 2
2 Test Setup and Results..................................................................................................... 4
3 Board Layout................................................................................................................ 12
4 Schematic and Bill of Materials........................................................................................... 14
List of Figures
1 TPS54334EVM-722 Efficiency............................................................................................. 5
2 TPS54334EVM-722 Low Current Efficiency ............................................................................. 5
3 TPS54334EVM-722 Load Regulation..................................................................................... 6
4 TPS54334EVM-722 Line Regulation...................................................................................... 6
5 TPS54334EVM-722 Transient Response ............................................................................... 7
6 TPS54334EVM-722 Loop Response ..................................................................................... 7
7 TPS54334EVM-722 Output Ripple, IOUT = 3 A .......................................................................... 8
8 TPS54334EVM-722 Output Ripple, IOUT = 200 mA...................................................................... 8
9 TPS54334EVM-722 Output Ripple, IOUT = 0 A ........................................................................... 8
10 TPS54334EVM-722 Input Ripple ......................................................................................... 9
11 TPS54334EVM-722 Startup Relative to VIN ............................................................................ 10
12 TPS54334EVM-722 Startup Relative to Enable ....................................................................... 10
13 TPS54334EVM-722 Shutdown Relative to VIN ......................................................................... 11
14 TPS54334EVM-722 Shutdown Relative to EN......................................................................... 11
15 TPS54334EVM-722 Top-Side Assembly................................................................................ 12
16 TPS54334EVM-722 Top-Side Layout 3................................................................................. 13
17 TPS54334EVM-722 Bottom-Side Layout ............................................................................... 13
18 TPS54334EVM-722 Schematic .......................................................................................... 14
List of Tables
1 Input Voltage and Output Current Summary............................................................................. 2
2 TPS54334EVM-722 Performance Specification Summary............................................................. 2
3 Output Voltages Available .................................................................................................. 3
4 EVM Connectors and Test Points ......................................................................................... 4
5 TPS54334EVM-722 Bill of Materials..................................................................................... 15
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Introduction www.ti.com
1 Introduction
This user's guide contains background information for the TPS54334 as well as support documentation for
the TPS54334EVM-722 evaluation module (PWR722-001). Also included are the performance
specifications, the schematic, and the bill of materials for the TPS54334EVM-722.
1.1 Background
The TPS54334 dc/dc converter is designed to provide up to a 3-A output from an input voltage source of
4.2 V to 28 V. Rated input voltage and output current range for the evaluation module are given in
Table 1. This evaluation module is designed to demonstrate the small printed-circuit-board areas that may
be achieved when designing with the TPS54334 regulator. The switching frequency is externally set at a
nominal 570 kHz. The high-side and low-side MOSFETs are incorporated inside the TPS54334 package
along with the gate-drive circuitry. The low drain-to-source on resistance of the MOSFETs allow the
TPS54334 to achieve high efficiencies and helps keep the junction temperature low at high output
currents. The compensation components are external to the integrated circuit (IC), and an external divider
allows for an adjustable output voltage. Additionally, the TPS54334 provides an adjustable undervoltage
lockout input. The absolute maximum input voltage is 30 V for the TPS54334EVM-722.
Table 1. Input Voltage and Output Current Summary
EVM INPUT VOLTAGE RANGE OUTPUT CURRENT RANGE
TPS54334EVM-722 VIN = 4.2 V to 28 V 0 A to 3 A
1.2 Performance Specification Summary
A summary of the TPS54334EVM-722 performance specifications is provided in Table 2. Specifications
are given for an input voltage of VIN = 24 V and an output voltage of 5.0 V, unless otherwise specified. The
TPS54334EVM-722 is designed and tested for VIN = 4.2 V to 28 V. The ambient temperature is 25°C for
all measurements, unless otherwise noted.
Table 2. TPS54334EVM-722 Performance Specification Summary
Specification Test Conditions MIN TYP MAX Unit
VIN operating voltage range 4.2 24 28 V
VIN start voltage 4.1 V
VIN stop voltage 3.9 V
Output voltage set point 3.3 V
Output current range(1) VIN = 4.2 V to 28 V 0 3 A
Line regulation IO= 1.5 A, VIN = 4.2 V to 28 V ±0.05%
Load regulation VIN = 12 V, IO= 0 A to 3 A ±0.2%
Voltage change –190 mV
IO= 0.75 A to 2.25 A Recovery time 150 μs
Load transient response Voltage change 190 mV
IO= 2.25 A to 0.75 A Recovery time 150 μs
Loop bandwidth VIN = 24 V, IO= 1.5 A 54.26 kHz
Phase margin VIN = 24 V , IO= 1.5 A 82 °
Input ripple voltage IO= 3 A 400 mVPP
Output ripple voltage IO= 3 A <30 mVPP
Output rise time 2 ms
Operating frequency 570 kHz
Maximum Efficiency TPS54334EVM-722, VIN = 12 V, IO= 1 A 91.38%
(1) When VIN = 4.2 V, maximum IOUT is 2 A.
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( )
´
- + +
ENFALLING
STOP ENFALLING p h
R1 V
R2 =
V V R1 I I
æ ö -
ç ÷
è ø
æ ö
- +
ç ÷
è ø
ENFALLING
START STOP
ENRISING
ENFALLING
p h
ENRISING
V
V V
V
R1 = V
I 1 I
V
´
OUT
R5 0.8 V
R6 =
V - 0.8 V
www.ti.com Introduction
1.3 Modifications
These evaluation modules are designed to provide access to the features of the TPS54334. Some
modifications can be made to this module.
1.3.1 Output Voltage Set Point
The voltage divider, R5 and R6, is used to set the output voltage. To change the output voltage of the
EVM, it is necessary to change the value of resistor R6. Changing the value of R6 can change the output
voltage above 0.8 V. The value of R6 for a specific output voltage can be calculated using Equation 1.
Use 31.6 kΩfor R5.
(1)
Table 3 lists the R5 and R6 values for some common output voltages. Note that VIN must be in a range so
that the minimum on-time is greater than 145 ns, and the maximum duty cycle is less than 100%. The
values given in Table 3 are standard values, not the exact value calculated using Equation 1.
Table 3. Output Voltages Available
Output Voltage (V) R5 Value (kΩ) R6 Value (kΩ)
1.8 31.6 25.5
2.5 31.6 15
3.3 31.6 10
1.3.2 Adjustable UVLO
The under voltage lock out (UVLO) can be adjusted externally using R1 and R2. The EVM is set for a start
voltage of 4.1 V and a stop voltage of 3.23 V using R1 = 220 kΩand R2 = 84.5 kΩ. Use Equation 2 and
Equation 3 to calculate required resistor values for different start and stop voltages. Considering the VIN
UVLO, the stop voltage is set to 3.9 V.
(2)
(3)
Ip= 1.15 µA, Ih= 3.3 µA, VENFALLING = 1.17 V and VENRISING = 1.21 V
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Test Setup and Results www.ti.com
2 Test Setup and Results
This section describes how to properly connect, set up, and use the TPS54334EVM-722 evaluation
module. The section also includes test results typical for the evaluation module and covers efficiency,
output voltage regulation, load transients, loop response, output ripple, input ripple, and start-up.
2.1 Input/Output Connections
The TPS54334EVM-722 is provided with input/output connectors and test points as shown in Table 4. A
power supply capable of supplying 2 A must be connected to J1 through a pair of 20-AWG wires. The load
must be connected to J4 through a pair of 20-AWG wires. The maximum load current capability must be
at least 4 A to use the full capability of this EVM. Wire lengths must be minimized to reduce losses in the
wires. Test-point TP1 provides a place to monitor the VIN input voltages with TP2 providing a convenient
ground reference. TP6 is used to monitor the output voltage with TP7 as the ground reference.
Table 4. EVM Connectors and Test Points
Reference Designator Function
J1 VIN (see Table 1 for VIN range)
J2 VOUT, 3.3 V at 3 A maximum
JP1 2-pin header for enable. Connect EN to ground to disable, open to enable.
JP2 2-pin header for VDD. Connect VOUT to VDD as the power supply.
TP1 VIN test point at VIN connector
TP2 GND test point at VIN
TP3 PGOOD test point
TP4 PH test point
TP5 Test point between voltage divider network and output. Used for loop response measurements.
TP6 Output voltage test point at OUT connector
TP7 GND test point at VOUT connector
TP8 VDD test point at the VDD connector
TP9 GND test point at the VDD connector
TP10 EN test point
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Output Current (A)
Efficiency %
0
10
20
30
40
50
60
70
80
90
100
1m 10m 100m 1 3
D018
VIN = 12 V
VIN = 24 V
Output Current (A)
Efficiency %
0 0.5 1 1.5 2 2.5 3
0
10
20
30
40
50
60
70
80
90
100
D017
VIN = 12 V
VIN = 24 V
www.ti.com Test Setup and Results
2.2 Efficiency
The efficiency of this EVM peaks at a load current of about 0.5 A – 1 A, and then decreases as the load
current increases towards full load. Figure 1 shows the efficiency for the TPS54334EVM-722 at an
ambient temperature of 25°C.
Figure 1. TPS54334EVM-722 Efficiency
Figure 2 shows the efficiency for the TPS54334EVM-722 on a semi-log scale to better show light load
efficiency. The ambient temperature is 25°C.
Figure 2. TPS54334EVM-722 Low Current Efficiency
The efficiency may be lower at higher ambient temperatures, due to temperature variation in the drain-to-
source resistance of the internal MOSFET.
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Input Voltage (V)
Line Regulation %
4 6 8 10 12 14 16 18 20 22 24
-0.1
-0.08
-0.06
-0.04
-0.02
0
0.02
0.04
0.06
0.08
0.1
D020
Output Current (A)
Load Regulation %
0 0.5 1 1.5 2 2.5 3
-0.5
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
D019
VIN = 12 V
VIN = 24 V
Test Setup and Results www.ti.com
2.3 Output Voltage Load Regulation
Figure 3 shows the load regulation for the TPS54334EVM-722.
Figure 3. TPS54334EVM-722 Load Regulation
Measurements are given for an ambient temperature of 25°C.
2.4 Output Voltage Line Regulation
Figure 4 shows the line regulation for the TPS54334EVM-722.
Figure 4. TPS54334EVM-722 Line Regulation
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Frequency (Hz)
Gain (dB)
Phase (q)
-60 -180
-40 -120
-20 -60
0 0
20 60
40 120
60 180
100 1k 10k 100k 1M
D021
Gain
Phase
VOUT = 200 mV/div(AC coupled)
IOUT = 1 A/div
www.ti.com Test Setup and Results
2.5 Load Transients
Figure 5 shows the TPS54334EVM-722 response to load transients. The current step is from 25% to 75%
of maximum rated load at 12-V input. Total peak-to-peak voltage variation is as shown, including ripple
and noise on the output.
Figure 5. TPS54334EVM-722 Transient Response
2.6 Loop Characteristics
Figure 6 shows the TPS54334EVM-722 loop-response characteristics. Gain and phase plots are shown
for VIN voltage of 24 V. Load current for the measurement is 1.5 A.
Figure 6. TPS54334EVM-722 Loop Response
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SW = 5 V/div
VOUT = 20 mV/div (AC coupled)
VOUT = 20 mV/div (AC coupled)
SW = 5 V/div
SW = 5 V/div
VOUT = 20 mV/div (AC coupled)
Test Setup and Results www.ti.com
2.7 Output Voltage Ripple
Figure 7,Figure 8, and Figure 9 show the TPS54334EVM-722 output voltage ripple for full load, light load,
and skip mode operation. VIN = 12 V. The output The ripple voltage is measured directly across the output
capacitors.
Figure 7. TPS54334EVM-722 Output Ripple, IOUT =3A
Figure 8. TPS54334EVM-722 Output Ripple, IOUT = 200 mA
Figure 9. TPS54334EVM-722 Output Ripple, IOUT =0A
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VIN = 200 mV/div (AC coupled)
SW = 5 V/div
www.ti.com Test Setup and Results
2.8 Input Voltage Ripple
Figure 10 shows the TPS54334EVM-722 input voltage ripple. The output current is the rated full load of
3 A and VIN = 12 V. The ripple voltage is measured directly across the input capacitors.
Figure 10. TPS54334EVM-722 Input Ripple
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EN = 2 V/div
PGOOD = 2 V/div
V 2 V/div
OUT =
V = 5 V/div
IN
EN = 2 V/div
PGOOD = 2 V/div
V 2 V/div
OUT =
V = 5 V/div
IN
Test Setup and Results www.ti.com
2.9 Powering Up
Figure 11 and Figure 12 show the start-up waveforms for the TPS54334EVM-722. In Figure 11, the output
voltage ramps up as soon as the input voltage reaches the UVLO threshold as set by the R1and R2
resistor divider network. In Figure 12, the input voltage is initially applied and the output is inhibited by
using a jumper at JP1 to tie EN to GND. When the jumper is removed, EN is released. When the EN
voltage reaches the enable-threshold voltage, the start-up sequence begins and the output voltage ramps
up to the externally set value of 3.3 V. The input voltage for these plots is 12 V and the load is 5 Ω.
Figure 11. TPS54334EVM-722 Startup Relative to VIN
Figure 12. TPS54334EVM-722 Startup Relative to Enable
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EN = 2 V/div
PGOOD = 2 V/div
V 2 V/div
OUT =
V = 5 V/div
IN
EN = 2 V/div
PGOOD = 2 V/div
V 2 V/div
OUT =
V = 5 V/div
IN
www.ti.com Test Setup and Results
2.10 Powering Down
Figure 13 and Figure 14 show the start-up waveforms for the TPS54334EVM-722. In Figure 13, the output
voltage ramps down as soon as the input voltage falls below the UVLO stop threshold as set by the R1
and R2 resistor divider network. In Figure 14, the output is inhibited by using a jumper at JP1 to tie EN to
GND. The input voltage for these plots is 12 V and the load is 2.2 Ω.
Figure 13. TPS54334EVM-722 Shutdown Relative to VIN
Figure 14. TPS54334EVM-722 Shutdown Relative to EN
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Board Layout www.ti.com
3 Board Layout
This section provides a description of the TPS54334EVM-722, board layout, and layer illustrations.
3.1 Layout
Figure 15 through Figure 17 show the board layout for the TPS54334EVM-722. The topside layer of the
EVM is laid out in a manner typical of a user application. The top and bottom layers are 2-oz. copper.
The top layer contains the main power traces for VIN, VOUT, and VPHASE. Also on the top layer are
connections for the remaining pins of the TPS54334 and a large area filled with ground. To facilitate the
placement of the main input bypass capacitor as close to the VIN and GND pins as possible, the trace for
VPHASE is routed to the bottom layer immediately at the pin 3 connection. It is routed back to the top
layer at the L1 inductor and C3 BOOT capacitor. The bottom layer contains a ground plane plus a copper
fill area for VPHASE, an etch run to connect the upper resistor of the voltage set point divider to the
regulation point at the J2 output connector, and a trace to connect the upper resistor of the UVLO set
point divider network to VIN. The top-side ground areas are connected to the bottom and internal ground
planes with multiple vias placed around the board including four vias directly under the TPS54334 device
to provide a thermal path from the top-side ground area to the bottom-side and internal ground planes.
The input decoupling capacitors (C2, and C1) and bootstrap capacitor (C3) are all located as close to the
IC as possible. In addition, the voltage set-point resistor divider components are also kept close to the IC.
For the TPS54334, an additional input bulk capacitor may be required, depending on the EVM connection
to the input supply.
Figure 15. TPS54334EVM-722 Top-Side Assembly
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www.ti.com Board Layout
Figure 16. TPS54334EVM-722 Top-Side Layout 3
Figure 17. TPS54334EVM-722 Bottom-Side Layout
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0.1µF
C3
0.1µF
C2
10µF
C1
0.015µF
C4
150pF
C5
200pF
C8
1µF
C10
DNP
31.6k
R5
10k
R6
51.1
R4
84.5k
R2
221k
R1
0
R8
2.05k
R3
J1
J2
GND
GND
TP4
TP3 TP5
GND GND GNDJP1
GNDGND
GND
VSENSE
VSENSE
TP6TP1
TP7TP2
22µF
C6
22µF
C9
DNP
22µF
C7
VOUT = 3.3 V
GNDGND
VIN = 4.2 - 28V
100k
R7
TP8
TP9
PGOOD
VIN
COMP
GND
EN
PH
BOOT VOUT
VDD
VIN
1
VSENSE
6
EN
8
PGOOD
10 GND 3
COMP 7
PH 2
BOOT 9
PAD 11
GND 4
GND 5
U1
TPS54334DRCR
L1
6.8uH
TP10
JP2
VOUT
Schematic and Bill of Materials www.ti.com
4 Schematic and Bill of Materials
This section presents the TPS54334EVM-722 schematic and bill of materials.
4.1 Schematic
Figure 18 is the schematic for the TPS54334EVM-722.
Spacer
Figure 18. TPS54334EVM-722 Schematic
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www.ti.com Schematic and Bill of Materials
4.2 Bill of Materials
Table 5 presents the bill of materials for the TPS54334EVM-722.
Table 5. TPS54334EVM-722 Bill of Materials
Designator Qty Value Description Package Reference Part Number Manufacturer
C1 1 10uF CAP, CERM, 10uF, 35V, +/-10%, X7R, 1210 1210 GRM32ER7YA106KA12L Murata
C2, C3 2 0.1uF CAP, CERM, 0.1uF, 50V, +/-10%, X7R, 0603 0603 GRM188R71H104KA93D Murata
C4 1 0.015uF CAP, CERM, 0.015 µF, 50 V, +/- 10%, X7R, 0603 0603 GRM188R71H153KA01D Murata
C5 1 150pF CAP, CERM, 150 pF, 50 V, +/- 5%, C0G/NP0, 0603 0603 GRM1885C1H151JA01D Murata
C6, C7 2 22uF CAP, CERM, 22 µF, 25 V, +/- 10%, X7R, 1210 1210 GRM32ER71E226KE15L Murata
C8 1 200pF CAP, CERM, 200 pF, 50 V, +/- 5%, C0G/NP0, 0603 0603 GRM1885C1H201JA01D Murata
J1, J2 2 2x1 Conn Term Block, 2POS, 3.81mm, TH PhoenixConact_1727010 1727010 Phoenix Contact
JP1, JP2 2 Header, TH, 100mil, 2x1, Gold plated, 230 mil above insulator TSW-102-07-G-S TSW-102-07-G-S Samtec, Inc.
L1 1 6.8uH Inductor, Shielded, Powdered Iron, 6.8 µH, 8 A, 0.0233 ohm, SMD IHLP-4040DZ IHLP4040DZER6R8M01 Vishay-Dale
R1 1 221k RES, 221 k, 1%, 0.1 W, 0603 0603 RC0603FR-07221KL Yageo America
R2 1 84.5k RES, 84.5 k, 1%, 0.1 W, 0603 0603 CRCW060384K5FKEA Vishay-Dale
R3 1 2.05k RES, 2.05 k, 1%, 0.1 W, 0603 0603 CRCW06032K05FKEA Vishay-Dale
R4 1 51.1 RES, 51.1 ohm, 1%, 0.1W, 0603 0603 CRCW060351R1FKEA Vishay-Dale
R5 1 31.6k RES, 31.6 k, 1%, 0.1 W, 0603 0603 CRCW060331K6FKEA Vishay-Dale
R6 1 10k RES, 10 k, 5%, 0.1 W, 0603 0603 CRCW060310K0JNEA Vishay-Dale
R7 1 100k RES, 100 k, 0.1%, 0.063 W, 0603 0603 CPF0603B100KE TE Connectivity
R8 1 0 RES, 0 ohm, 5%, 0.1W, 0603 0603 CRCW06030000Z0EA Vishay-Dale
SH-JP1 1 1x2 Shunt, 100mil, Gold plated, Black 382811-6 AMP
TP1, TP6, TP8 3 Red Test Point, TH, Miniature, Red Keystone5000 5000 Keystone
TP2, TP7, TP9 3 Black Test Point, TH, Miniature, Black Keystone5001 5001 Keystone
TP3, TP5, 3 White Test Point, TH, Miniature, White Keystone5002 5002 Keystone
TP10
TP4 1 Yellow Test Point, TH, Miniature, Yellow Keystone5004 5004 Keystone
U1 1 4.2V TO 28V INPUT, 3A OUTPUT, SYNCHRONOUS SWIFT™ STEP DRC0010J TPS54334DRCR Texas Instruments
DOWN VOLTAGE CONVERTER, DRC0010J
C9 0 22uF CAP, CERM, 22 µF, 25 V, +/- 10%, X7R, 1210 1210 GRM32ER71E226KE15L Murata
C10 0 1uF CAP, CERM, 1 µF, 50 V, +/- 10%, X5R, 0603 0603 GRM188R61H105KAALD Murata
FID1, FID2, 0 Fiducial mark. There is nothing to buy or mount. Fiducial N/A N/A
FID3
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STANDARD TERMS AND CONDITIONS FOR EVALUATION MODULES
1. Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, or
documentation (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms and conditions set forth herein.
Acceptance of the EVM is expressly subject to the following terms and conditions.
1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms and conditions that accompany such Software
1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.
2Limited Warranty and Related Remedies/Disclaimers:
2.1 These terms and conditions do not apply to Software. The warranty, if any, for Software is covered in the applicable Software
License Agreement.
2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for any defects that are caused by neglect, misuse or mistreatment
by an entity other than TI, including improper installation or testing, or for any EVMs that have been altered or modified in any
way by an entity other than TI. Moreover, TI shall not be liable for any defects that result from User's design, specifications or
instructions for such EVMs. Testing and other quality control techniques are used to the extent TI deems necessary or as
mandated by government requirements. TI does not test all parameters of each EVM.
2.3 If any EVM fails to conform to the warranty set forth above, TI's sole liability shall be at its option to repair or replace such EVM,
or credit User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the
warranty period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to
repair or replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall
be warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.
3Regulatory Notices:
3.1 United States
3.1.1 Notice applicable to EVMs not FCC-Approved:
This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit
to determine whether to incorporate such items in a finished product and software developers to write software applications for
use with the end product. This kit is not a finished product and when assembled may not be resold or otherwise marketed unless
all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause
harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is
designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of
an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
3.1.2 For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:
CAUTION
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not
cause harmful interference, and (2) this device must accept any interference received, including interference that may cause
undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to
operate the equipment.
FCC Interference Statement for Class A EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to
correct the interference at his own expense.
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FCC Interference Statement for Class B EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance
with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference
will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which
can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more
of the following measures:
•Reorient or relocate the receiving antenna.
•Increase the separation between the equipment and receiver.
•Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
•Consult the dealer or an experienced radio/TV technician for help.
3.2 Canada
3.2.1 For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210
Concerning EVMs Including Radio Transmitters:
This device complies with Industry Canada license-exempt RSS standard(s). Operation is subject to the following two conditions:
(1) this device may not cause interference, and (2) this device must accept any interference, including interference that may
cause undesired operation of the device.
Concernant les EVMs avec appareils radio:
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation
est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit
accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concerning EVMs Including Detachable Antennas:
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser)
gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type
and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for
successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types
listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated.
Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited
for use with this device.
Concernant les EVMs avec antennes détachables
Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et
d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage
radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope
rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le
présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le
manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne
non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de
l'émetteur
3.3 Japan
3.3.1 Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に
輸入される評価用キット、ボードについては、次のところをご覧ください。
http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page
3.3.2 Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan may not be certified
by TI as conforming to Technical Regulations of Radio Law of Japan.
If User uses EVMs in Japan, not certified to Technical Regulations of Radio Law of Japan, User is required by Radio Law of
Japan to follow the instructions below with respect to EVMs:
1. Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal
Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for
Enforcement of Radio Law of Japan,
2. Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to
EVMs, or
3. Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan
with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note
that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan.
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【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて
いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの
措置を取っていただく必要がありますのでご注意ください。
1. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用
いただく。
2. 実験局の免許を取得後ご使用いただく。
3. 技術基準適合証明を取得後ご使用いただく。
なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。
上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ
ンスツルメンツ株式会社
東京都新宿区西新宿６丁目２４番１号
西新宿三井ビル
3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧くださ
い。http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
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4EVM Use Restrictions and Warnings:
4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT
LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling
or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information
related to, for example, temperatures and voltages.
4.3 Safety-Related Warnings and Restrictions:
4.3.1 User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user
guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and
customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input
and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or
property damage. If there are questions concerning performance ratings and specifications, User should contact a TI
field representative prior to connecting interface electronics including input power and intended loads. Any loads applied
outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible
permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any
load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative.
During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit
components may have elevated case temperatures. These components include but are not limited to linear regulators,
switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the
information in the associated documentation. When working with the EVM, please be aware that the EVM may become
very warm.
4.3.2 EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the
dangers and application risks associated with handling electrical mechanical components, systems, and subsystems.
User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees,
affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic
and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely
limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and
liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or
designees.
4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal,
state, or local laws and regulations related to User’s handling and use of the EVM and, if applicable, User assumes all
responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and
liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local
requirements.
5. Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate
as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as
accurate, complete, reliable, current, or error-free.
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6. Disclaimers:
6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY WRITTEN DESIGN MATERIALS PROVIDED WITH THE EVM (AND THE
DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL FAULTS." TI DISCLAIMS ALL OTHER
WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT NOT LIMITED TO ANY IMPLIED
WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY
THIRD PARTY PATENTS, COPYRIGHTS, TRADE SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS.
6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS AND
CONDITIONS SHALL BE CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY
OTHER INDUSTRIAL OR INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD
PARTY, TO USE THE EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY
INVENTION, DISCOVERY OR IMPROVEMENT MADE, CONCEIVED OR ACQUIRED PRIOR TO OR AFTER DELIVERY OF
THE EVM.
7. USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS
LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES,
EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY
HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS AND CONDITIONS. THIS OBLIGATION
SHALL APPLY WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY
OTHER LEGAL THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED.
8. Limitations on Damages and Liability:
8.1 General Limitations. IN NO EVENT SHALL TI BE LIABLE FOR ANY SPECIAL, COLLATERAL, INDIRECT, PUNITIVE,
INCIDENTAL, CONSEQUENTIAL, OR EXEMPLARY DAMAGES IN CONNECTION WITH OR ARISING OUT OF THESE
TERMS ANDCONDITIONS OR THE USE OF THE EVMS PROVIDED HEREUNDER, REGARDLESS OF WHETHER TI HAS
BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. EXCLUDED DAMAGES INCLUDE, BUT ARE NOT LIMITED
TO, COST OF REMOVAL OR REINSTALLATION, ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS
OR SERVICES, RETESTING, OUTSIDE COMPUTER TIME, LABOR COSTS, LOSS OF GOODWILL, LOSS OF PROFITS,
LOSS OF SAVINGS, LOSS OF USE, LOSS OF DATA, OR BUSINESS INTERRUPTION. NO CLAIM, SUIT OR ACTION SHALL
BE BROUGHT AGAINST TI MORE THAN ONE YEAR AFTER THE RELATED CAUSE OF ACTION HAS OCCURRED.
8.2 Specific Limitations. IN NO EVENT SHALL TI'S AGGREGATE LIABILITY FROM ANY WARRANTY OR OTHER OBLIGATION
ARISING OUT OF OR IN CONNECTION WITH THESE TERMS AND CONDITIONS, OR ANY USE OF ANY TI EVM
PROVIDED HEREUNDER, EXCEED THE TOTAL AMOUNT PAID TO TI FOR THE PARTICULAR UNITS SOLD UNDER
THESE TERMS AND CONDITIONS WITH RESPECT TO WHICH LOSSES OR DAMAGES ARE CLAIMED. THE EXISTENCE
OF MORE THAN ONE CLAIM AGAINST THE PARTICULAR UNITS SOLD TO USER UNDER THESE TERMS AND
CONDITIONS SHALL NOT ENLARGE OR EXTEND THIS LIMIT.
9. Return Policy. Except as otherwise provided, TI does not offer any refunds, returns, or exchanges. Furthermore, no return of EVM(s)
will be accepted if the package has been opened and no return of the EVM(s) will be accepted if they are damaged or otherwise not in
a resalable condition. If User feels it has been incorrectly charged for the EVM(s) it ordered or that delivery violates the applicable
order, User should contact TI. All refunds will be made in full within thirty (30) working days from the return of the components(s),
excluding any postage or packaging costs.
10. Governing Law: These terms and conditions shall be governed by and interpreted in accordance with the laws of the State of Texas,
without reference to conflict-of-laws principles. User agrees that non-exclusive jurisdiction for any dispute arising out of or relating to
these terms and conditions lies within courts located in the State of Texas and consents to venue in Dallas County, Texas.
Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief
in any United States or foreign court.
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2015, Texas Instruments Incorporated
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IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
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Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
TI is not responsible or liable for any such statements.
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support
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of any TI components in safety-critical applications.
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and
requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
have executed a special agreement specifically governing such use.
Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in
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which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and
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TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of
non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.
Products Applications
Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive
Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications
Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers
DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps
DSP dsp.ti.com Energy and Lighting www.ti.com/energy
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Interface interface.ti.com Medical www.ti.com/medical
Logic logic.ti.com Security www.ti.com/security
Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense
Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video
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Wireless Connectivity www.ti.com/wirelessconnectivity
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2015, Texas Instruments Incorporated