Texas Instruments PGA5807A User manual

User's Guide
SLAU538–October 2013
PGA5807A, 8-Channel, High-Bandwidth, Analog Front-End
Evaluation Module
This user’s guide gives a general overview of the PGA5807A evaluation module (EVM) and provides a
general description of the features and functions to be considered while using this module. This manual is
applicable to the PGA5807A analog front-end. The PGA5807A EVM provides a platform for evaluating the
ADC under various signal, clock, reference, and ADC output formats.
Contents
1 Quick View of Evaluation Setup ........................................................................................... 4
2 GUI Software Installation .................................................................................................. 5
2.1 TSW1400 EVM GUI Installation (High Speed Data Converter Pro (HSDCpro)) .......................... 5
2.2 PGA5807A EVM GUI Installation .............................................................................. 10
3 Hardware and EVM Setup for Testing PGA5807A .................................................................... 14
3.1 External Connections ............................................................................................ 15
3.2 PGA5807A EVM Header Configuration ....................................................................... 16
3.3 PGA5807A EVM 0-ΩJumper Configuration .................................................................. 18
4 Testing the PGA5807A EVM ............................................................................................. 19
4.1 TSW1400 and PGA5807 GUI Setup ........................................................................... 19
4.2 Capturing a RAMP Test Pattern ................................................................................ 24
4.3 Capturing Sinusoidal Input for ADS5296A Only .............................................................. 28
4.4 SNR, THD, and Gain Test for PGA5807A + ADS5296A .................................................... 32
5 PGA5807 GUI in Detail ................................................................................................... 37
5.1 Read Me First tab ................................................................................................ 38
5.2 PGA5807 tab ...................................................................................................... 39
5.3 ADS5296 Tab ..................................................................................................... 43
6 PGA5807A EVM Schematics ............................................................................................ 44
7 PGA5807A EVM Bill of Materials ........................................................................................ 60
8 PGA5807A EVM Layout .................................................................................................. 63
List of Figures
1 Evaluation Setup............................................................................................................ 4
2 HSDCpro Install (a)......................................................................................................... 5
3 HSDCpro Install (b)......................................................................................................... 6
4 HSDCpro Install (c) ......................................................................................................... 6
5 HSDCpro Install (d)......................................................................................................... 7
6 HSDCpro Install (e)......................................................................................................... 7
7 HSDCpro Install (f).......................................................................................................... 8
8 HSDCpro Install (g)......................................................................................................... 8
9 HSDCpro Install (h)......................................................................................................... 9
10 HSDCpro Install (i).......................................................................................................... 9
11 PGA5807 GUI Install (a).................................................................................................. 10
12 PGA5807 GUI Install (b).................................................................................................. 10
13 PGA5807 GUI Install (c).................................................................................................. 11
14 PGA5807 GUI Install (d).................................................................................................. 11
15 PGA5807 GUI Install (e).................................................................................................. 12
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16 PGA5807 GUI Install (f) .................................................................................................. 12
17 PGA5807 GUI Install (g).................................................................................................. 13
18 PGA5807A EVM Configuration.......................................................................................... 14
19 TSW1400 and PGA5807A Setup ....................................................................................... 15
20 PGA5807A EVM Default Header Configuration ...................................................................... 17
21 PGA5807A EVM Schematic 0-ΩJumper Options .................................................................... 18
22 TSW1400 GUI Setup (a) ................................................................................................. 19
23 TSW1400 GUI Setup (b) ................................................................................................. 19
24 TSW1400 GUI Setup (c).................................................................................................. 20
25 TSW1400 GUI Setup (d) 70.............................................................................................. 20
26 TSW1400 GUI Setup (e) ................................................................................................. 20
27 TSW1400 GUI Setup (f) .................................................................................................. 21
28 PGA5807 Plug-in GUI Setup............................................................................................. 21
29 PGA5807 Plug-in GUI Setup (h) ........................................................................................ 22
30 PGA5807 Tab in the PGA5807 GUI .................................................................................... 22
31 ADS5296 Tab of the PGA5807 GUI .................................................................................... 23
32 ADS5296A Setup for RAMP Test ....................................................................................... 24
33 HSDCpro GUI Setup for RAMP Test ................................................................................... 25
34 RAMP Capture............................................................................................................. 26
35 RAMP Capture by Channel .............................................................................................. 26
36 Zoom on RAMP Capture ................................................................................................. 27
37 Turn off RAMP Test Pattern ............................................................................................. 27
38 Jumper JP11 and JP9 Positions for Enabled XTAL (default)........................................................ 28
39 Jumper JP11 and JP9 Positions for Disabled XTAL.................................................................. 29
40 PGA5807A EVM Setup for ADS5296A Only Testing................................................................. 30
41 HSDCpro GUI Setup...................................................................................................... 31
42 ADS5296A Only Sinusoidal Capture 1 ................................................................................. 31
43 PGA5807A + ADS5296A Gain Test Setup ............................................................................ 32
44 PGA5807 GUI Setup for PGA5807A + ADS5296A 1................................................................. 33
45 PGA5807A + ADS5296A SNR, THD, Gain Test Capture 1 ......................................................... 33
46 PGA5807 GUI Setup for PGA5807A + ADS5296A SNR, THD, Gain Test 2...................................... 34
47 PGA5807A + ADS5296A Gain Test Capture 2........................................................................ 35
48 PGA5807 GUI Setup for PGA5807A + ADS5296A Gain Test 3 .................................................... 35
49 PGA5807A + ADS5296A Gain Test Capture 3........................................................................ 36
50 PGA5807 GUI Setup for PGA5807A + ADS5296A Gain Test 4 .................................................... 36
51 PGA5807A + ADS5296A Gain Test Capture 4........................................................................ 37
52 PGA5807 GUI Simulation Mode......................................................................................... 37
53 PGA5807 GUI Simulation Mode Checkbox Indicator................................................................. 38
54 RECORD/PLAYBACK COMMAND SEQUENCE ..................................................................... 39
55 PLAYBACK COMMAND SEQUENCE.................................................................................. 39
56 PGA5807 Tab.............................................................................................................. 40
57 DIGITAL WAVEFORM GRAPH-WRITE Indicator..................................................................... 40
58 Device Pin Control Section............................................................................................... 41
59 Gain Info Button ........................................................................................................... 41
60 Gain Info Button ........................................................................................................... 41
61 Custom WRITE/READ.................................................................................................... 42
62 ADS5296 Tab.............................................................................................................. 43
63 PGA5807A Schematic, (Sh. 1 of 16), PGA5807A Device ........................................................... 44
64 PGA5807A Schematic, (Sh. 2 of 16), ADS5296A Device............................................................ 45
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65 PGA5807A Schematic, (Sh. 3 of 16), ADS5296A Sampling Clock................................................. 46
66 PGA5807A Schematic, (Sh. 4 of 16), PGA5807A Analog Inputs Ch1-4........................................... 47
67 PGA5807A Schematic, (Sh. 5 of 16), PGA5807A Analog Inputs Ch5-8........................................... 48
68 PGA5807A Schematic, (Sh. 6 of 16), PGA_CH1, ADC_CH5 ....................................................... 49
69 PGA5807A Schematic, (Sh. 7 of 16), PGA_CH2, ADC_CH6 ....................................................... 50
70 PGA5807A Schematic, (Sh. 8 of 16), PGA_CH3, ADC_CH7 ....................................................... 51
71 PGA5807A Schematic, (Sh. 9 of 16), PGA_CH4, ADC_CH8 ....................................................... 52
72 PGA5807A Schematic, (Sh. 10 of 16), PGA_CH5, ADC_CH1...................................................... 53
73 PGA5807A Schematic, (Sh. 11 of 16), PGA_CH6, ADC_CH2...................................................... 54
74 PGA5807A Schematic, (Sh. 12 of 16), PGA_CH7, ADC_CH3...................................................... 55
75 PGA5807A Schematic, (Sh. 13 of 16), PGA_CH8, ADC_CH4...................................................... 56
76 PGA5807A Schematic, (Sh. 14 of 16), FTDI Serial Interface ....................................................... 57
77 PGA5807A Schematic, (Sh. 15 of 16), ADS5296A External Reference ........................................... 58
78 PGA5807A Schematic, (Sh. 16 of 16), Power Supply................................................................ 59
79 PGA5807A EVM Top Layer Assembly Drawing – Top View ........................................................ 63
80 PGA5807A EVM Bottom Layer Assembly Drawing – Bottom View ................................................ 64
81 PGA5807A EVM Top Side ............................................................................................... 65
82 PGA5807A EVM Ground Plane 1....................................................................................... 66
83 PGA5807A EVM Power Split Plane 1 .................................................................................. 67
84 PGA5807A EVM Power Split Plane 2 .................................................................................. 68
85 PGA5807A EVM GND Split Plane 2.................................................................................... 69
86 PGA5807A EVM Bottom Side ........................................................................................... 70
List of Tables
1 PGA5807A EVM Header Configuration ................................................................................ 16
2 PGA5807A EVM Bill of Materials........................................................................................ 60
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1 Quick View of Evaluation Setup
Figure 1 is an overview of the evaluation setup that includes the PGA5807A EVM, TSW1400 data
capturing card, external equipment, personal computer (PC), and software requirements.
Figure 1. Evaluation Setup
PGA5807A EVM: The PGA5807A EVM contains both the PGA5807A device and the ADS5296A ADC
from Texas Instruments. With this, a complete signal chain can be evaluated with the output of the
ADS5296A ADC being captured by the TSW1400 EVM. The EVM is configured to allow for the following
without any hardware changes required: testing stand-alone PGA5807A, testing stand-alone ADS5296A,
or testing cascaded PGA5807A plus ADS5296A. For more information pertaining to the ADS5296A
device, see:
http://www.ti.com/product/ads5296a
TSW1400 EVM: The high-speed LVDS deserializer board is required for capturing data from the
PGA5807A EVM and its analysis using the TSW1400 graphical user interface (GUI), called High Speed
Data Converter Pro (HSDCpro). For more information pertaining to the TSW1400 EVM, see:
http://focus.ti.com/docs/toolsw/folders/print/tsw1400evm.html
Equipment: Signal generators (with low-phase noise) must be used as source of input signal and clock in
order to get the desired performance. Additionally, band-pass filters (BPF) are required in signal and clock
paths to attenuate the harmonics and noise from the generators.
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Power Supply: A +5-V supply powers the PGA5807A EVM through connectors J21(+5V) and J25(GND)
providing power to both the PGA5807A and ADS296 devices. The positive power supply must be able to
source up to 1.5 A. A –5-V (negative) supply is required to provide power to amplifiers on the EVM when
testing the PGA5807A in stand-alone mode only. The negative power supply must be able to source 300
mA. The TSW1400 EVM is powered through an AC adaptor provided with its EVM kit.
USB Interface to PC: The USB connections from the PGA5807A EVM and TSW1400 EVM to the
personal computer (PC) are used for communication from the GUIs to the boards. Section 2 explains the
TSW1400 and PGA5807 GUI installation procedures.
2 GUI Software Installation
The PGA5807A EVM and the TSW1400 EVM both require software installations. The following two
sections explain where to find and how to install the software properly. Ensure that no USB connections
are made to the EVMs until after the installations are complete.
2.1 TSW1400 EVM GUI Installation (High Speed Data Converter Pro (HSDCpro))
From the Texas Instruments website, www.ti.com, search for TSW1400. Under Technical Documents, one
will find a Software section from which High Speed Data Converter Pro GUI Installer can be
downloaded and saved (slwc107e.zip or higher).
• Unzip the saved folder and run the installer executable to obtain the menu shown in Figure 2.
• Click the Install button.
Figure 2. HSDCpro Install (a)
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• Set the destination directories, or leave as default, for the TSW1400 GUI installation and press the
Next button as shown in Figure 3.
Figure 3. HSDCpro Install (b)
• Read the License Agreement from Texas Instruments and select I accept the License Agreement and
press the Next button as shown in Figure 4.
Figure 4. HSDCpro Install (c)
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• Read the License Agreement from National Instruments and select I accept the License Agreement
and press the Next button as in Figure 5.
Figure 5. HSDCpro Install (d)
• Press the Next button as shown in Figure 6.
Figure 6. HSDCpro Install (e)
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• The window shown in Figure 7 should appear, indicating that installation is in progress.
Figure 7. HSDCpro Install (f)
• The window shown in Figure 8 appears indicating Installation Complete. Press the Next button.
Figure 8. HSDCpro Install (g)
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• The window in Figure 9 appears briefly to complete the process.
Figure 9. HSDCpro Install (h)
• As shown in Figure 10, a computer restart might be requested depending on whether or not the PC
already has the National Instruments’ MCR installer. If requested, hit the Restart button to complete
the installation.
Figure 10. HSDCpro Install (i)
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2.2 PGA5807A EVM GUI Installation
From the Texas Instruments website, www.ti.com, search for PGA5807AEVM. Clicking on the hyperlink in
the table will lead to another link titled PGA5807 GUI Installer, v1.0. Click on this link to download and
save the zipped file (slac571.zip).
• Unzip the folder and run the Setup.bat file as administrator by right clicking on it and selecting Run as
administrator as shown in Figure 11.
Figure 11. PGA5807 GUI Install (a)
• Set the destination directories for the PGA5807 GUI installation or leave as default and press the Next
button as shown in Figure 12.
Figure 12. PGA5807 GUI Install (b)
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• Read the License Agreement from Texas Instruments and select the I accept the License Agreement
button and then press the Next button as shown in Figure 13.
Figure 13. PGA5807 GUI Install (c)
• Read the License Agreement from National Instruments and select the I accept the License Agreement
button and then press the Next button as shown in Figure 14.
Figure 14. PGA5807 GUI Install (d)
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• To begin the installation, press the Next button as shown in Figure 15.
Figure 15. PGA5807 GUI Install (e)
• The window shown in Figure 16 should appear showing that installation is in progress.
Figure 16. PGA5807 GUI Install (f)
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• Upon completion of the installation, the window in Figure 17 appears. Press the Finish button to
continue.
Figure 17. PGA5807 GUI Install (g)
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3 Hardware and EVM Setup for Testing PGA5807A
This section outlines the external connections required for PGA5807A EVM as well as the default
configuration of the EVM’s 3-pin headers and 0-Ωjumper resistors with an explanation of configuration
options. The EVM is delivered with three unique signal path configurations available to the user with only
header changes required to the EVM. These configurations are PGA5807A + ADS5296A (PGA + ADC),
PGA5807A only (PGA Input/Output), and ADS5296A only (ADC Input). Figure 18 highlights which SMAs
are to be used for each configuration. (Note: The PGA5807A output channels do not numerically match
the input channels of the ADS5296A, hence, there is a mapping from one to the other. The silkscreen
designators are named in such a way as to describe the mapping. For instance, the signal input to
channel 1 of the PGA5807A at SMA J10 will be captured on channel 5 at the output of the ADC, hence,
the designator name for SMA J10,CH5 (PGA_CH1).)
Figure 18. PGA5807A EVM Configuration
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3.1 External Connections
The connections shown in Figure 19 should be made for proper hardware setup (Note: Testing the LVDS
interface between the PGA5807A EVM and the TSW1400 EVM can be performed by testing the
ADS5296A which comes installed on the PGA5807A EVM. Using a RAMP test pattern function that is
generated within the ADS5296A along with the on-board 80-MHz crystal oscillator (XTAL) that provides
the ADC sampling clock, the LVDS interface can be tested with no signal generators required. This
configuration is only recommended for testing the RAMP function as low phase noise filtered signal
sources must be provided to the ADC clock input and the ADC analog inputs or PGA5807A analog inputs
for measuring device performance. Also, the on-board XTAL providing the sampling clock to the ADC
provides a 3.3-V signal at its output. This signal level exceeds the maximum voltage rating of the
ADS5296A clock input port. Therefore, if EVM jumpers are configured such that the ADC clock port
is single-ended, the clock input signal will exceed the maximum voltage rating of the device. This
is not a problem for evaluation purposes but could have long-term reliability consequences on the
device and is, therefore, not a recommended implementation).
Figure 19. TSW1400 and PGA5807A Setup
1. Mate the TSW1400 EVM at connector J4 to the PGA5807A EVM at connector J1 through the high-
speed ADC interface connector.
2. Connect the DC +5-V output of the provided AC-to-DC power supply to J12 (+5V_IN) of the TSW1400
EVM and the input of the power supply cable to a 110–230 VAC source.
3. Connect +5-V DC power supply leads to connectors J21 (+5V) and J26 (GND) of the PGA5807A EVM.
4. Connect –5-V (negative) DC power supply leads to connectors J26 (–5V) and J26 (GND) of the
PGA5807A EVM. (Note: a negative supply is only needed for testing the PGA5807A in stand-alone
mode where the output of the PGA5807A can be monitored at the output of on-board op-amps.)
5. Connect the USB cable from the PC to J32 (USB) of PGA5807A EVM
6. Connect the USB cable from the PC to J5 (USB_IF) of the TSW1400 EVM. (Note: it is recommended
that the PC USB port be able to support USB2.0. If unsure, always chose the USB ports at the back of
the PC chassis over ones located on the front or sides.)
7. Supply an ADC sampling clock signal to the SMA J5 (CLK_IN) of the PGA5807A EVM for the
ADS5296A but disable the output as the initial RAMP test does not require this clock (that is, +5dBm,
80MHz).
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8. Supply an analog signal to the analog input SMA J10,CH5(PGA_CH1), of the PGA5807A EVM (that
is, –15 dBm, 5 MHz)
9. Supply an analog signal to the analog input signal to SMA J36 labeled PGA_CH5,ADC_CH1 (+15
dbm, 5 MHz). (Note, items 8 and 9 are not required simultaneously and not required at all for the initial
testing of a RAMP test pattern. As such, a single signal generator can be shared to supply both input
signals)
3.2 PGA5807A EVM Header Configuration
The PGA5807A EVM is flexible in its configurability through the use of 3 pin headers. The default
configuration of the EVM is set to facilitate initial testing requiring minimal bench equipment by providing
an 80-MHz ADC sampling clock from an on-board crystal oscillator (XTAL). Table 1 describes the purpose
of the 3-pin headers on the EVM while Figure 20 shows the default position. With this configuration, the
on-board XTAL is powered and providing an 80-MHz signal to a transformer which, in turn, provides a
differential sampling clock to the DUT.
Table 1. PGA5807A EVM Header Configuration
Jumper Default PIN 1 PIN 3 Circuit Description
Configuration Silkscreen Silkscreen
JP5 short pins 1.8V_AVDD n/a Power supply 1.8-V analog power supply for ADS5296A
JP6 short pins 1.8V_LVDD n/a Power supply 1.8-V digital power supply for ADS5296A
JP7 short pins 3.3V_AVDD n/a Power supply 3.3-V power supply for PGA5807A
JP9 short pins 1-2 XTAL CLK_IN Sampling clock Selects ADC sampling clock source: (1) XTAL OSC.
or (3) external source input to SMA J5 CLK_IN
JP11 short pins 1-2 CDC_3.3V GND Sampling clock Selects Power supply for CDC chip and on-board
XTAL oscillator: (1) GND or (3) +3.3V
JP12 short pins 1-2 XTAL XTAL_CDC Sampling clock Selects path for XTAL osc. signal: (1) to transformer
or (3) to CDC input
JP13 short pins 1-2 XTAL CLK_CDC Sampling clock Selects input source to CDC input: (1) XTAL osc. or
(3) external source input to SMA J5 CLK_IN
JP8 short pins 2-3 SE DIFF Sampling clock Selects ADC sampling clock configuration: (1) Single-
ended (3) Differential (must match JP8)
JP10 short pins 2-3 SE DIFF Sampling Clock Selects ADC sampling clock configuration: (1) Single-
ended or (3) Differential (must match JP10)
JP1 short pins 2-3 EVEN ODD INTERLEAVE_MUX Selects analog input channels to be interleaved: (1)
EVEN channels or (3) ODD channels
JP2 short pins 2-3 FTDI EVM INTERLEAVE_MUX Selects source of EVEN/ODD select: (1) GUI control
or (3) INTERLEAVE_MUX pin control
JP4 short pins 1-2 1.8V_AVDD GND SYNC ADS5296A SYNC Pin
JP14 short pins 2-3 5V GND EXT_REF AMP Selects power supply for EXT_REF AMP: (1) +5V or
(3) GND
JP15 Open 3.3V_AVDD GND PGA5807A RESET Pin PGA5807A RESET Pin On-board Control:
(1)PGA5807A is controlled by device pin;
(3)PGA5807A is controlled by SPI;
OPEN->RESET Pin is controlled by GUI"
JP550 short pins 1-2 ADCRESETZ n/a SPI Selects ADS5296A SPI control: (1) GUI control
JP52 short pins 1-2 PD n/a SPI Selects ADS5296A SPI control: (1) GUI control
JP48 short pins 1-2 SDOUT n/a SPI Selects ADS5296A SPI control: (1) GUI control
JP46 short pins 1-2 CSZ n/a SPI Selects ADS5296A SPI control: (1) GUI control
JP42 short pins 1-2 SCLK n/a SPI Selects ADS5296A SPI control: (1) GUI control
JP44 short pins 1-2 SDATA n/a SPI Selects ADS5296A SPI control: (1) GUI control
JP54 short pins 1-2 INTERLEAVE_M n/a SPI Selects ADS5296A SPI control: (1) GUI control
UX
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Figure 20. PGA5807A EVM Default Header Configuration
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3.3 PGA5807A EVM 0-ΩJumper Configuration
As described in the beginning of Section 3, the PGA5807A EVM is delivered with three unique signal path
configurations: four channels for PGA5807A + ADS5296A, two channels for PGA5807A only, and two
channels for ADS5296A only. Any one of these three configurations can be applied to all eight channels
by changing the position of a few 0-Ωjumper resistors. As an example, Figure 21 shows one page of the
EVM schematics (see Section 6 for full schematics). The table on the bottom right side of this schematic
page shows which 0-Ωresistors must be installed for each configuration. The configuration pictured routes
the PGA output from channel 1 to channel 5 of the ADS5296A.
Figure 21. PGA5807A EVM Schematic 0-ΩJumper Options
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4 Testing the PGA5807A EVM
This section outlines the following three test cases with a sub-section dedicated to each case:
• Capturing a RAMP test pattern for ADS5296A only
• Capturing a sinusoidal input for ADS5296A only
• SNR/THD/Gain Test for PGA5807A + ADS5296A
Only the minimal software GUI settings required to achieve the above tests will be described in this
section. For a detailed explanation of the PGA5807 software GUI and all its features, please see
Section 5. For a detailed explanation of the High Speed Data Converter Pro software GUI, please consult
the TSW1400 User’s Guide (SLWU079B), available on the Texas Instruments website.
4.1 TSW1400 and PGA5807 GUI Setup
1. With the setup outlined in Figure 19 established, launch the High Speed Data Converter Pro GUI. The
GUI should automatically detect the serial number of the TSW1400 EVM, connected as shown in
Figure 22. Click on OK.
Figure 22. TSW1400 GUI Setup (a)
The message shown in Figure 23 will appear. Click OK.
Figure 23. TSW1400 GUI Setup (b)
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If instead, the message shown in Figure 24 appears, it indicates that the USB connection to the
TSW1400 EVM is not present. Click OK, then establish a USB connection and repeat step 1.
Figure 24. TSW1400 GUI Setup (c)
2. Select a device by clicking on the Blue arrow in the upper left corner of the HSDCpro GUI. Scroll down
and select PGA5807 as shown in Figure 25.
Figure 25. TSW1400 GUI Setup (d) 70
Click the Yes button to update the ADC firmware on the TSW1400 FPGA as depicted in Figure 26.
Figure 26. TSW1400 GUI Setup (e)
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