Texas Instruments TAS5101SE User manual

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October 2002 DAC Digital Audio/Speaker
User’s
Guide
SLEA006

IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
ordersandshouldverifythatsuchinformationiscurrentandcomplete.AllproductsaresoldsubjecttoTI’sterms
and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
their products and applications using TI components. To minimize the risks associated with customer products
and applications, customers should provide adequate design and operating safeguards.
TIdoesnotwarrantorrepresentthatanylicense, eitherexpress orimplied, isgrantedunderanyTIpatent right,
copyright,maskworkright,orotherTIintellectualpropertyrightrelatingtoanycombination,machine,orprocess
inwhichTIproductsorservicesareused.InformationpublishedbyTIregardingthird-partyproductsorservices
does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.
Use of such information may require a license from a third party under the patents or other intellectual property
of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without
alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction
of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for
such altered documentation.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that
product or service voids all express and any implied warranties for the associated TI product or service and
is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Mailing Address:
Texas Instruments
Post Office Box 655303
Dallas, Texas 75265
Copyright 2002, Texas Instruments Incorporated

EVM IMPORTANT NOTICE
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:
Thisevaluationkit being soldbyTI is intendedforuse for ENGINEERING DEVELOPMENT OR EVALUATION
PURPOSES ONLY and is not considered by TI to be fit for commercial use. As such, the goods being provided
may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective
considerations, including product safety measures typically found in the end product incorporating the goods.
As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic
compatibility and therefore may not meet the technical requirements of the directive.
Shouldthisevaluationkitnotmeetthespecificationsindicatedin theEVMUser’sGuide,thekitmaybereturned
within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE
WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED,
IMPLIED,ORSTATUTORY,INCLUDINGANYWARRANTY OF MERCHANTABILITY ORFITNESSFORANY
PARTICULAR PURPOSE.
The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user
indemnifies TI from all claims arising from the handling or use of the goods. Please be aware that the products
receivedmaynotberegulatorycompliantoragency certified (FCC,UL, CE,etc.). Dueto theopen construction
oftheproduct,itistheuser’sresponsibilitytotakeanyandallappropriateprecautionswithregardtoelectrostatic
discharge.
EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE
TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.
TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not
exclusive.
TI assumes no liability for applications assistance, customer product design, software performance, or
infringement of patents or services described herein.
Please read the EVM User’s Guide and, specifically, the EVM Warnings and Restrictions notice in the EVM
User’sGuidepriortohandlingtheproduct.Thisnoticecontainsimportantsafetyinformationabouttemperatures
and voltages. For further safety concerns, please contact the TI application engineer.
Persons handling the product must have electronics training and observe good laboratory practice standards.
No license is granted under any patent right or other intellectual property right of TI covering or relating to any
machine, process, or combination in which such TI products or services might be or are used.
Mailing Address:
Texas Instruments
Post Office Box 655303
Dallas, Texas 75265
Copyright 2002, Texas Instruments Incorporated

EVM WARNINGS AND RESTRICTIONS
It is important to operate this EVM within the input voltage range of 26.5V and the output
voltage range of 100 mV and 10 V rms.
Exceeding the specified input range may cause unexpected operation and/or irreversible
damage to the EVM. If there are questions concerning the input range, please contact a TI
field representative prior to connecting the input power.
Applyingloadsoutsideofthespecifiedoutputrangemayresultinunintendedoperationand/or
possible permanent damage to the EVM. Please consult the EVM User’s Guide prior to
connecting any load to the EVM output. If there is uncertainty as to the load specification,
please contact a TI field representative.
Duringnormaloperation,somecircuitcomponentsmayhavecasetemperaturesgreaterthan
60°C.TheEVM isdesignedto operateproperlywith certain componentsabove 60°C aslong
astheinputandoutput rangesare maintained.Thesecomponentsincludebut arenot limited
tolinearregulators,switchingtransistors,passtransistors,andcurrentsenseresistors.These
typesof devicescanbeidentifiedusingtheEVM schematiclocated intheEVMUser’sGuide.
When placing measurement probes near these devices during operation, please be aware
that these devices may be very warm to the touch.
Mailing Address:
Texas Instruments
Post Office Box 655303
Dallas, Texas 75265
Copyright 2002, Texas Instruments Incorporated

Related Documentation From Texas Instruments
v
Preface
Read This First
About This Manual
This application report describes the operation of the TAS5101SE EVM. For
proper operation, the TAS5101SE EVM requires an accessory card,
DAV-EQ102, to provide analog or S/PDIF inputs, volume control, and
equalizationfunctions.TheDAV-EQ102volumeand equalizationarehandled
by an onboard TAS3103. This document contains descriptions and
schematicsforastereoapplication.Theboarddescribedisanexampledesign
that can be customized for specific applications.
How to Use This Manual
This manual takes the reader through the considerations for designing a
single-ended amplifier using the TAS5101 output stage.
Notational Conventions
The name TAS5101SE EVM is used synonymously with DA-REF210.
Related Documentation From Texas Instruments
-True Digital Audio Amplifier TAS5010 Digital Audio PWM Processor data
sheet, Literature number SLAS328
-AS5101TrueDigitalStereoAudioAmplifierWithPWMStereoPowerOut-
put Stage data sheet, Literature number SLES039
-Digital Amplifier Design Guide, Literature number SLAS117
-Digital Audio Measurements application report, Literature number
SLAA114
FCC Warning
This equipment is intended for use in a laboratory test environment only. It
generates, uses, and can radiate radio frequency energy and has not been

Trademarks
vi
testedforcompliancewiththelimitsofcomputingdevicespursuanttosubpart
Jofpart15ofFCCrules,which aredesignedtoprovidereasonableprotection
against radio frequency interference. Operation of this equipment in other
environments may cause interference with radio communications, in which
case the user at his own expense will be required to take whatever measures
may be required to correct this interference.
Trademarks
System Two and Audio Precision are trademarks of Audio Precision, Inc.
All other trademarks are the property of their respective owners.
Quick-Start Guide (With DAVEQ-102)
Overview
The unit is composed of two boards, a controller board and a digital amplifier
board.Thecontrollerboardcontainsthecircuitryfor analog input (PCM1802),
S/PDIF coaxial input, or TOSLINK input (DIR1703), a TAS3013 digital audio
processor, and a PIC12C671 microcontroller. The unit is shipped with the
volume adjusted by varying the H-bridge drive (PVDD) power supply from 12
to 26.5 V. However, the TAS3103 digital audio processor can be enabled and
used to provide volume control and other audio processing functions such as
filtering, audio enhancement, and audio delay. The microcontroller performs
general-purpose housekeeping functions such as power-on reset and
amplifier closed-loop control.
ThereisaredLEDonthecontrollerboard.TheredLEDislitwhen12to26.5-V
dc has been applied to the board and the amplifier has been enabled. A
blinking red LED indicates that an undervoltage, overcurrent, or
overtemperature error has occurred.
Startup
1) Select the audio input source using the jumpers close to the connectors
thatconnectthecontrollerboardtothe amplifier board. Jumperidentifica-
tion is silkscreened on the surface of the board.
2) Connectasourceof8VdctoJ4onthecontrollerboard,usingthesupplied
cable.
3) Connect a source of 12 to 26.5 V dc to the amplifier board PVDD
connector, using the supplied cable.
4) Connect speakers to the speaker terminals on the amplifier board, using
the supplied cables.
5) Connect a source of audio. Turn on the 8-V dc power supply.
6) Turn on the 12 to 26.5-V dc PVDD power supply.

Contents
vii
7) Press the ON button on the controller (near the J4 connector) to enable
the output.
8) Play audio.
Power Off
1) Stop the audio.
2) Press the button on the controller board to mute the output.
3) Turn off the 26.5-V dc power supply.
4) Turn off the 8-V dc power supply.
S/PDIF Inputs to the DIR1703 Receiver
The S/PDIF input can be either TOSLINK or coaxial. The DIR1703
automatically selects the input that is connected. If both inputs are connected
simultaneously, the DIR1703 does not lock and there is no output.
The system must be configured for the S/PDIF (JP5 in, JP6 out, and JP7 out)
orfortheDAP(JP5out,JP6in,andJP7out)toenableS/PDIFinput.IftheDAP
is used, it must be controlled by the TAS3103 EVM software GUI.
Analog Input to the PCM1802 Analog-to-Digital Converter
The stacked RCA connectors on the controller board are the analog input
connectors. It has several different gain settings (see the schematic of the
DAVEQ-102). The input circuit is currently jumpered for 1.1 V rms, full-scale.
The system must be configured for the ADC (JP5 out, JP6 out, JP7 in) or for
the DAP (JP5 out, JP6 in, and JP7 out) to accept analog input. If the DAP is
used, it must be controlled by the TAS3103 EVM software GUI.
TAS3013 Digital Audio Processor
To use the TAS3103, disconnect JP5 and JP7, and connect JP6. In addition,
the GUI cable must be connected to a parallel port on a PC running Windows
98. The TAS3103 is controlled using the TAS3103 EVM GUI program with the
appropriate configuration files for this system.
TheEVM GUI program iscontainedintheprogram CD. The CD alsocontains
the instructions for installation and operation.
During operation, the SDIN1 mixer controls the S/PDIF and TOSLINK data
inputs. The SDIN2 mixer controls the analog input data and must be enabled
with a new configuration file.

viii

Contents
ix
Contents
1 TAS5101SE EVM Input Description 1-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1 Description of Data Inputs 1-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 Description of Power Inputs 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2 Description of Outputs 2-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3 Powering the TAS5101SE EVM 3-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1 Power Supplies 3-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2 Power Supply Connection 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4 Digital Audio Input/Interface 4-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.1 Changing the Audio Input Format 4-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.2 Interfacing the TAS5101SE EVM 4-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3 Description of Control Signals 4-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3.1 SHUTDOWN 4-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3.2 RESET_5K 4-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3.3 POWERDOWN (Active Low) 4-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3.4 DBSPD (Double Speed) 4-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3.5 MUTE 4-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.4 Power-On Sequence 4-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.5 Power-Off Sequence 4-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5 Technical Description 5-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.1 Audio Input Section 5-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.2 Audio Output 5-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.3 Power Supplies 5-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.4 Power-On/-Off Depop Circuit 5-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.5 Calculating Low-Frequency Response 5-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6 Printed-Circuit Board Layout 6-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.1 Component Side (Top Layer) 6-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.2 PCB Bottom Layer 6-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7 Schematics 7-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.1 Signal Block Diagram 7-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.2 Power Block Diagram 7-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.3 Audio Input Schematic 7-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.4 Audio Output Schematic 7-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.5 Output Splitter Schematic 7-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8 PCB Component Placement 8-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8.1 Top Layer 8-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Contents
x
8.2 Bottom Layer Component Placement 8-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9 TAS5101SE EVM Performance Synopsis 9-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A Amplifier Performance Tests A-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A.1 Frequency Response A-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A.2 THD+N vs Power A-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A.3 THD+N vs Frequency A-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A.4 Dynamic Range A-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A.5 FFT—10 Watts A-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A.6 FFT—Signal to Noise A-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A.7 Crosstalk A-9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A.8 Short-Circuit Tests A-11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
B Bill of Materials (BOM) B-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
B.1 Bill of Materials for TAS5101EVM 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Figures
1–1 Connector Diagram 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–1 TAS5101SE EVM Output Connectors 2-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–1 Power Supply Connections 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4–1 Digital Audio Input Connection (J1) 4-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4–2 Power-On Sequence 4-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6–1 PCB Top Layer 6-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6–2 PCB Bottom Layer 6-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8–1 Top Layer Component Placement 8-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8–2 Bottom Layer Component Placement 8-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Tables
1–1 Input Connector (J1) Pin Functions 1-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–1 Left Speaker Output (J2) 2-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–2 Right Speaker Output (J3) 2-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–1 Main Power Input Connector (J4) 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4–1 Audio Input Jumper Options 4-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9–1 Performance Synopsis 9-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1-1
TAS5101SE EVM Input Description
This chapter describes the digital inputs to the TAS5101SE EVM.
1.1 Description of Data Inputs
The input to the TAS5101SE evaluation module (EVM) is a 22-pin connector
(J1) with 0.1”pin spacing. It contains the digital audio input port (I2S), a reset
signalfortheTAS5010modulator,andtheSHUTDOWNoutputsignalfromthe
TAS5101. It contains the 3.3-V logic power supply input for the board. There
is also a digital input, DBSPD, that signals the TAS5010 modulator when the
sample rate exceeds 96 KHz.
Additionally, the other end of the board contains a 2-pin connector for the
PVDD 12-V to 27-V power supply.
Table 1–1.Input Connector (J1) Pin Functions
Pin Name Function
1 PVDD PVDD output to controller board, do not attempt to power this PCB from this pin.
2 DGND Digital ground for logic signals
3 DGND Digital ground for logic signals
4+3.3 V-In Digital power supply input
5 DGND Digital ground for logic signals
6+3.3 V-In Digital power supply input
7 DGND Digital ground for logic signals
8 SHUTDOWN Fault indication from TAS5101; set low by short circuit, overtemperature, etc.
9 DGND Digital ground for logic signals
10 RESET_5K Logic low resets the TAS5010 modulator
11 DGND Digital ground for logic signals
12 MCLK_IN Master clock for digital audio input
13 DGND Digital ground for logic signals
14 POWERDOWN Logic low puts the TAS5010 modulator in power-down (low current) mode
15 DGND Digital ground for logic signals
16 DBSPD Logic high signals TAS5010 modulator the presence of a sample rate > 48 kHz
17 DGND Digital ground for logic signals
18 MUTE Logic low stops the PWM data from the TAS5010 to the TAS5101
19 DGND Digital ground for logic signals
20 SCLK Bit clock for audio data
21 SDIN Digital audio data
22 LRCLK Digital audio frame sync, signals either right or left channel data
Chapter 1

Description of Power Inputs
1-2
1.2 Description of Power Inputs
A 2-pin connector, J4, is placed between the speaker output connectors. It is
the power input connector (PVDD connector).
Figure 1–1.Connector Diagram
12
2221
J1 J2
J3
J4
1
2
TAS5101SE EVM
1
2
1
2

2-1
Description of Outputs
Description of Outputs
Because this is a stereo audio amplifier, there are two outputs, the right and
left audio channels. This amplifier can drive a 4-Ωload to greater than 15 W
rms with less than 0.1% distortion.
Two 2-pin connectors, J2 and J3, are placed on either side of the power input
connector (PVDD connector). They are the speaker output connectors.
Connect the speakers/load resistors as shown in Figure 2–1.
Figure 2–1.TAS5101SE EVM Output Connectors
12
2221
J1 J2
J3
J4
1
2
TAS5101SE EVM
1
2
1
2
+
+
Table 2–1.Left Speaker Output (J2)
Pin Name Function
1 PVDD/2 Pseudo differential connection point for speaker
2 Output_L Left audio output to speaker
Table 2–2.Right Speaker Output (J3)
Pin Name Function
1 PVDD/2 Pseudo differential connection point for speaker
2 Output_R Right audio output to speaker
Chapter 2

2-2

3-1
Powering the TAS5101SE EVM
Powering the TAS5101SE EVM
3.1 Power Supplies
The system requires two power supplies, PVDD and DVDD. PVDD is the
powerfortheoutputstageandisgenerally12Vto27Vdc.Itshouldbecapable
of supplying at least 2 A to allow adequate margin for full power operation
under the various speaker impedances from 4 Ωto 8 Ω. The ripple and noise
should be as low as possible; however, little or no performance degradation
occurswhenpowersupplyrippleandnoise is limited tolessthan150mVrms.
DVDDsupplies3.3Vtothe digitallogicintheTAS5010andtheTAS5101.The
combination of both integrated circuits draws less than 50 mA. For optimum
performance, the ripple and noise should be less than 50 mV rms.
Chapter 3

Power Supply Connection
3-2
3.2 Power Supply Connection
Figure 3–1.Power Supply Connections
12
2221
J1 J2
J3
J4
1
2
TAS5101SE EVM
1
2
1
2
12 V to 27 V
+
3.3 V +
With the power supplies turned off:
1) Connect the source of PVDD to J4. Pin 2 is positive.
2) Connect the source of DVDD to J1. Pins 4 and 6 are positive.
Table 3–1.Main Power Input Connector (J4)
Pin Name Function
1 PVSS Output power ground
2 PVDD Output stage power supply (12 V to 27 V)

4-1
Digital Audio Input/Interface
Digital Audio Input/Interface
The TAS5101SE EVM supports many common digital audio input formats.
Connectasourceofdigitalaudio(I2S,unlesstheboardhasbeenreconfigured
for another format) to J1, as shown in Figure 4–1.
Figure 4–1.Digital Audio Input Connection (J1)
2
22
J1 J2
J3
J4
1
2
TAS5101SE EVM
1
2
1
2
Digital Audio
Input Connector
Chapter 4

Changing the Audio Input Format
4-2
4.1 Changing the Audio Input Format
The bottom of the board contains a grouping of R0603 resistor pads that
determinetheaudioinputformat.TheTAS5101SEEVMisshippedconfigured
for I2S format. To change the format, move/replace the resistors as described
in Table 4–1.
Table 4–1.Audio Input Jumper Options
Mode MOD2 MOD1 MOD0 Format
0R3A = open/R3B = 0 Ω R2A = open/R2B = 0 Ω R1A = open/R1B = 0 Ω 16-bit; MSB first; right
justified
1R3A = open/R3B = 0 Ω R2A = open/R2B = 0 Ω R1A = 10 kΩ/R1B = open 20-bit, MSB first; right
justified
2R3A = open/R3B = 0 Ω R2A = 10 kΩ/R2B = open R1A = open/R1B = 0 Ω 24-bit; MSB first; right
justified
3R3A = open/R3B = 0 Ω R2A = 10 kΩ/R2B = open R1A = 10 kΩ/R1B = open 16-bit; I2S
4R3A = 10 kΩ/R3B = open R2A = open/R2B = 0 ΩR1A = open/R1B = 0 Ω 20-bit; I2S
5R3A = 10 kΩ/R3B = open R2A = open/R2B = 0 ΩR1A = 10 kΩ/R1B = open 24-bit I2S
6R3A = 10 kΩ/R3B = open R2A = 10 kΩ/R2B = open R1A = open/R1B = 0 Ω 16-bit; MSB first; left justified
7R3A = 10 kΩ/R3B = open R2A = 10 kΩ/R2B = open R1A = 10 kΩ/R1B = open 16-bit; DSP frame
4.2 Interfacing the TAS5101SE EVM
As discussed in previous sections, a source of digital audio connected to J1
is required to get an audio output from the TAS5101SE EVM.
4.3 Description of Control Signals
4.3.1 SHUTDOWN
A logic low on J1 pin 8 signals that the TAS5101 has been shut down by an
error condition, such as a short circuit, overtemperature, or a low-voltage
condition. A reset signal must be sent to J1 pin 10 to clear this condition.
SHUTDOWNisgenerallyused,alongwithRESET_5K,inconjunctionwiththe
system controller (microcontroller) to implement a closed-loop control system
for error reset. The system controller provides a delay of approximately 4 mS
between error and resetting. Lastly, the system controller can be used to turn
off the amplifier if error conditions persist.
4.3.2 RESET_5K
A logic low on J1 pin 10 resets the TAS5010 modulator, which in turn resets
the TAS5101. This signal is used to initialize the TAS5010 for operation and
to reset error conditions, when they occur, on the TAS5101.
4.3.3 POWERDOWN (Active Low)
A logic low on J1 pin 14 places the TAS5010 modulator in the low-power
(power-down) mode.

Power-On Sequence
4-3
Digital Audio Input/Interface
4.3.4 DBSPD (Double Speed)
A logic high on J1 pin 16 signals the TAS5010 modulator that a sampling
frequency in excess of 96 kHz is being used.
4.3.5 MUTE
A logic low on J1 pin 18 signals the TAS5010 modulator to mute.
4.4 Power-On Sequence
1) Ensure that the RESET_5K input is low.
2) With the digital audio off, turn on the PVDD power supply and wait 1 s for
the output capacitors to charge.
3) Turn on the DVDD power supply and allow it to stabilize, approximately
0.5 s.
4) Set RESET_5K high.
5) Enable the digital audio input data.
6) Listen to the audio or measure it.
Figure 4–2.Power-On Sequence
t
100-ms Risetime
Power Off
tt
DVDD
PVDD
RESET_5K
Power On
t ≥1-ms Delay
4.5 Power-Off Sequence
1) Stop the digital audio.
2) Set the RESET_5K signal low.
3) Turn off the DVDD power supply and wait for approximately 0.5 s.
4) Turn off the PVDD power supply.

4-4