Texas Instruments THVD4431EVM User manual

EVM User's Guide: THVD4431EVM THVD4431
THVD4431EVM
Description
The THVD4431 is Texas Instruments’ first
RS-485 and RS-232 multi-protocol transceiver. This
configuration allows for 3T5R RS-232 communication,
half duplex RS-485 communication, full duplex
RS-485 communication, and loopback modes for both
RS-232 and RS-485 to allow for on chip diagnostic
testing.
Get Started
1. Order the EVM at TI.com here
2. See the latest product information and data sheet
for THVD4431 (SLLSFS1)
Features
• THVD4431RHA preinstalled onto evaluation
module.
• 8 additional power-supply decoupling capacitor
pads for VCC and VIO connections.
• 0603 Resistor Pads Available to create resistive
link between GND and EARTH Connections for
both VIO and VCC terminals.
• Terminal and Header pin access to RS-232 and
RS-485 bus signals.
• LED Indicators for control and data signals (VIO
>= 3.3V Only)
Applications
• Industrial PC
•Factory automation and control
•HVAC systems
•Building automation
•Point-of-sale terminals
•Grid infrastructure
•Industrial transport
THVD4431EVM (Top Side) THVD4431EVM (Bottom Side)
www.ti.com Description
SLLU370 – JUNE 2023
Submit Document Feedback
THVD4431EVM 1
Copyright © 2023 Texas Instruments Incorporated

1 Evaluation Module Overview
1.1 Introduction
This document is the EVM user’s guide for the THVD4431EVM, which provides a quick way to evaluate TI’s
THVD4431EVM. This user’s guide describes the THVD4431EVM and the intended use. The information in the
warning statement is provided for personal protection and the information in the caution statement is provided to
protect the equipment from damage. Read each caution and warning statement carefully.
Caution
ATTENTION
STATIC SENSITIVE DEVICES
HANDLE ONLY AT
STATIC SAFE WORK STATIONS
This EVM contains components that can potentially be damaged by electrostatic discharge. Always transport
and store the EVM in the supplied ESD bag when not in use. Handle using an antistatic wristband. Operate on
an antistatic work surface. For more information on proper handling, see Electrostatic Discharge (ESD).
1.2 Kit Contents
• THVD4431EVM with THVD4431 installed.
• 30 Shunts for interfacing with EVM headers.
Please see Section 2.3 for a detailed look at which components are installed by default on the EVM.
1.3 Device Information
THVD4431 is a highly integrated and robust multiprotocol transceiver supporting RS-232, RS-422 and RS-485
physical layers. The device has three transmitters and five receivers to enable 3T5R RS-232 port. Device also
integrates one transmitter and one receiver to enable half and full duplex RS-485 port. MODE selection pins
enable shared bus and logic pins for the protocols to share a common single connector. Integrated termination
for RS-485 bus pins and for RS-232 receiver inputs verify no external components are needed to realize a fully
functional communication port. These devices have a slew rate select feature that enables the devices to be
used at two maximum speeds based on the SLR pin setting.
These devices feature integrated Level 4 IEC ESD protection, eliminating the need for external system level
protection components. Diagnostic loopback mode for both RS-232 and RS-485 is provided to check for logic
to bus and bus to logic path functional integrity and check for cable and connector shorts. In addition, the
RS-485 receiver fail-safe feature drives logic high on received logic output when the bus inputs are open or
shorted together or when the bus is idle. Shutdown mode consumes ultra-low current (10 uA typical), which is
an excellent choice for power-sensitive applications. The device needs 3 to 5.5 V supply that powers the charge
pump for RS-232 and the drivers/receivers for both RS-232 and RS-485. A separate logic supply VIO (1.65 V to
5.5 V) enables interface with low level microcontrollers.
For more specific device information please see data sheet (SLLSFS1).
Evaluation Module Overview www.ti.com
2THVD4431EVM SLLU370 – JUNE 2023
Submit Document Feedback
Copyright © 2023 Texas Instruments Incorporated

2 Hardware
2.1 Power Requirements
THVD4431 IC Variant Considerations
The most modern variants of the IC THVD4431RHA Pin 9 is VIO. Pin 16 is a no connect; however, this EVM
includes the original pinout of the THVD4431RHA, which is slightly different. The original pinout has pin 9
connected to VCC and pin 16 being a VIO connection. To remedy this, jumpers J28 and J29 must be configured
before operation. With J12 and J13 oriented at the top left of the board, J28 and J29 are positioned vertically
below U1.
Component ID Comment
J28 – Original pinout THVD4431 Shunt bottom pin to 3rd pin to connect VCC
J28 – Current pinout THVD4431 Shunt top pin to 2nd pin to connect VIO
J29 – Original pinout THVD4431 Shunt top pin to 2nd pin to connect VIO
J29 – Current pinout THVD4431 Leave jumper open to keep Pin 16 no connect
Single Supply Operation (Logic Supply Equals Main Voltage Supply)
The THVD4431 Transceiver in the RHA (QFN) package from TI has an additional logic supply pin, VIO. This
is used to power the internal digital logic circuits inside of the device. In single supply operation mode for the
THVD4431RHA, the VIO pin must be shorted to VCC by shorting the header pins of J12, so that the digital
circuits are properly powered.
Component ID Comment
J10 VCC Power terminal – Attach voltage source of 3 V to 5.5V to terminal block.
J11 VIO Power terminal – Leave open for single supply operation.
J12 Shunted for single supply operation.
J13 Shunted for applications with no separation between EARTH and GND.
To apply power onto the board, VCC is applied through the J10 terminal. With the board oriented with J12 on
the top left side of the board, as shown in Figure 2-1, the signals are, from right to left, VCC, GND, EARTH. The
EARTH and GND distinction are used to help the end user determine operational qualities with respect to ground
potential differences. If testing methods on reducing ground loop current install a resistor on pad R16.
Dual Supply Operation (Separate Digital Logic and Driver Supplies)
The THVD4431 transceiver in the RHA (QFN) package from TI has an additional logic supply pin, VIO.
This is used to power the internal digital logic circuits inside of the device. In dual supply operation,
the digital circuit supply VIO supplies the Logic Signal Pins (L1 – L8) and the control signal pins
(SLR,DIR,M2,M0,M1,TERM_TX,TERM_RX, and /SHDN). This supply can operate from 1.65V to 5.5V to allow
controllers to communicate with the transceiver at 2.5V and 1.8V logic levels. J12 must be left open for dual
supply operation.
Component ID Comment
J10 VCC Power terminal – Attach voltage source of 3 V to 5.5V to terminal block.
J11 VIO Power terminal – Attach voltage source of 1.65V to 5.5V to terminal block.
J12 Left open for dual supply operation.
J13 Shunted for applications with no separation between EARTH and GND.
www.ti.com Hardware
SLLU370 – JUNE 2023
Submit Document Feedback
THVD4431EVM 3
Copyright © 2023 Texas Instruments Incorporated

Powering the board up is similar to the single supply operation. J10 is powered as described in Single Supply
Operation (Logic Supply Equals Main Voltage Supply). Using the same orientation as before, (J12 and J13 are
top left of the board) and the inputs for the VIO power terminal (J11) are reversed from VCC (J10) – from left
to right, is EARTH, GND, VIO. Additional supply decoupling pads are available for VIO terminal block if more
decoupling capacitance is needed.
2.2 Setup
Operational Modes and Control Signals
After the power supply of THVD4431EVM has been configured, set up the board for operation. Before any
operation of the board can occur, the operational mode and control pins must be configured. In Figure 2-1, the
map to the J9 header pins is shown. Assume that the board is oriented with J12 and J13 in the top left of the
EVM. The numbered boxes correspond to the pin number for J9 as indicated in the schematic.
Figure 2-1. THVD4431EVM: IC Control Header (J9) Map
To select a configuration option, find the signal of interest on J9 according to Figure 2-1. If a low value is wanted,
then shunt the top row header pin connected to the signal of interest to the pin on the left. If a high is wanted
shunt, then connect the bottom row header pin to the signal of interest to the pin on the left. If VIO is >= 3.3V,
then the indicator board indicates what state each control line is in with the aid of an LED. Next, the mode of
operation needs to be determined. The operational mode is controlled by the M0, M1, and M2 connected to U1
via J9-15/16, J9-19/20, and J9-11/12, respectively.
Table 2-1. Mode Selection
M2 (J9-11;J9-12) M1 (J9-19;J9-20) M0 (J9-15;J9-16) Mode Comment
0 0 0 RS-232 Loopback
Internal shorts for U1:
U1:R3 – R1
U1:R4 – R2
U1:R6 – R5
U1:R6 – R7
U1:R6 – R8
0 0 1 RS-232 3T5R RS-232 Mode
0 1 0 Half duplex RS-485 2-Wire RS-485
0 1 1 RS-485 Full duplex 4-Wire RS-485
1 0 0 Not used N/A
1 0 1 Not used N/A
1 1 0 Not used N/A
1 1 1 RS-485 Loopback
Internal shorts for U1:
U1:R1 – R4
U1:R2 – R3
After the mode has been selected, the other features and control signals can be configured or connected to a
signal source for the DIR and /SHDN signals.
Hardware www.ti.com
4THVD4431EVM SLLU370 – JUNE 2023
Submit Document Feedback
Copyright © 2023 Texas Instruments Incorporated

Table 2-2. Control Signals
Signal Signal Jumper+ Pin ID Associated GND
Pin Logic ‘0’ Operation Associated VIO Pin Logic ‘1’ Operation
SLR J9-3; J9-4 J9-2 RS485: 20Mbps
RS232: 1Mbps J9-1 RS485: 500kbps RS232: 250kbps
DIR J9-7; J9-8 J9-6 RS485: RX mode J9-5 RS485: TX mode
TERM_TX J9-23; J9-24 J9-22 RS485 TX:
unterminated J9-21 RS485 TX: terminated with 120 Ω
TERM_RX J9-27; J9-28 J9-26 RS485 RX:
unterminated J9-25 RS485 RX: terminated with 120 Ω
/SHDN J9-31; J9-32 J9-30 device in shutdown
mode J9-29 Device Operational
The mode pins, along with the TERM_TX and TERM_RX pins, must be configured before communication starts
for proper operation.
Logic and Bus Pins of the THVD4431
All the various modes of the THVD4431 share the use of the logic pins (denoted with the prefix “L”) and the bus
pins (denoted with the prefix “R”).
Logic pins are for use when interfacing the THVD4431 with a controller. The Logic pins are supplied and
bounded by the VIO voltage – meaning that these pins can accept GND to VIO input voltages and can output
GND to VIO voltages. All logic pins L1 – L8 are accessible through 4x2 headers J1-J8 that populate the left side
of the board when the pins are oriented with J12 and J13 in the top left corner. Figure 2-2 shows the headers
pinouts.
Figure 2-2. THVD4431EVM "L" Pin Header Map
The function of each individual “L” pin depends on the mode in which the THVD4431 is being operated in.
Bus pins on the other hand are the higher voltage tolerant pins for use with RS-485 or RS-232 depending on
chosen operation mode. The bus pins are accessible in a few different ways depending on mode of use. Both
RS-232 and RS-485 modes have all “R” pin signals routed to an 8x2 header J14. If headers J19 and J23 are
shunted, then R1 and R2 signals are available on terminal block J26. If headers J20 and J24 are shunted, then
www.ti.com Hardware
SLLU370 – JUNE 2023
Submit Document Feedback
THVD4431EVM 5
Copyright © 2023 Texas Instruments Incorporated

R3 and R4 signals are available on terminal block J27. If every row of header J14 is shunted, then all signals
R1-R8 are available on the D-SUB connector J25. A brief summary is given in Table 2-3.
Table 2-3. Output Configuration
U1 Pin Output Option 1 Output Option 2 Output Option 3 Output Option 4
R1 J14; Row 1; column 1 J19; column 1 J26 (if J19 is shunted) J25 (if J14 row 1 is shunted)
R2 J14; Row 2; column 1 J23; column 1 J26 (if J23 is shunted) J25 (if J14 row 2 is shunted)
R3 J14; Row 3; column 1 J20; column 1 J27 (if J20 is shunted) J25 (if J14 row 3 is shunted)
R4 J14; Row 4; column 1 J24; column 1 J27 (if J24 is shunted) J25 (if J14 row 4 is shunted)
R5 J14; Row 5; column 1 J25 (if J14 row 5 is shunted) N/A N/A
R6 J14; Row 6; column 1 J25 (if J14 row 6 is shunted) N/A N/A
R7 J14; Row 7; column 1 J25 (if J14 row 7 is shunted) N/A N/A
R8 J14; Row 8; column 1 J25 (if J14 row 8 is shunted) N/A N/A
How these pins are connected depends on the chosen operation mode and personal preference of the end user.
RS-232 Operation
With an understanding of the general architecture of the device and EVM a more thorough look at the RS-232
modes of operation is important. When entering the mode 001 for M2, M1, and M0 respectively the device enters
RS-232 mode which has the transceiver setup as shown in Figure 2-3.
Figure 2-3. THVD4431EVM: MODE 001 (RS232 Mode)
This is commonly referred to as a 3T5R setup as there are three transmitters and 5 receivers. At an individual
transceiver level, the type of RS-232 signal being transmitter or received is not important to the transceiver as
the PHY layer characteristics are the same regardless of RS-232 signal type. However, the specific configuration
Hardware www.ti.com
6THVD4431EVM SLLU370 – JUNE 2023
Submit Document Feedback
Copyright © 2023 Texas Instruments Incorporated

is generally used with the following RS-232 signals: TX, RX, TRS, CTS, DSR, DTR, RI, and DCD. While this
configuration of signals isn’t strictly required – most 3T5R RS-232 applications use these signals and require
this configuration and if J25 (the DSUB connector) is used the pinout of the connector mimics the standard
placement of the aforementioned RS-232 cables – this is summarized in Table 2-4.
Table 2-4. RS-232 Circuit Mnemonics
U1 Pin Standard RS-232 Circuit Mnemonic J25 Pin
R1 DCD 1
R2 RX 2
R3 TX 3
R4 DTR 4
R5 DSR 6
R6 RTS 7
R7 CTS 8
R8 RI 9
Many RS-232 test plans typically require a loop back test as well. The THVD4431 integrates a RS-232 loopback
mode to make this testing quick and simple. When putting the device into mode 000 for M2, M1, and M0
respectively and a logical diagram is shown in Figure 2-4.
Figure 2-4. THVD4431EVM MODE 000 (RS232 Loopback Mode)
www.ti.com Hardware
SLLU370 – JUNE 2023
Submit Document Feedback
THVD4431EVM 7
Copyright © 2023 Texas Instruments Incorporated

RS-485 Operation
This section is a brief overview of the RS-485 operation modes. There are three different operational modes of
the RS-485 portion of the transceiver: Half Duplex, Full Duplex, and RS-485 loopback mode.
Half duplex operation is a very common implementation of RS-485 and entered when the mode is 010 for
M2, M1, M0 respectively. In half duplex operation, the receive and transmit pins are shared by the transceiver
allowing for asynchronous bi-directional communication on two wires with the trade-off being that the bus can
only have one driver at a time and a device cannot receive and transmit data simultaneously. Figure 2-5 shows
the internal configuration of the THVD4431 in half duplex RS-485 mode.
Figure 2-5. THVD4431EVM: MODE 010 (RS485 Half Duplex Mode)
The termination resistor shown is disabled by default. In Half-Duplex mode, TERM_RX is a don’t care value
and the integrated termination is only controlled by TERM_TX. Driver input is connected to L3 and the RS-485
console side output is L2.
Hardware www.ti.com
8THVD4431EVM SLLU370 – JUNE 2023
Submit Document Feedback
Copyright © 2023 Texas Instruments Incorporated

The next mode of operation is full duplex operation, which is mode 011 for M2, M1, M0, respectively. This mode
of operation separates the driver and receiver of the RS-485 transceiver, which leads to a 4-signal wire interface.
This is shown in Figure 2-6.
Figure 2-6. THVD4431EVM: MODE 011 (RS485 Full Duplex Mode)
www.ti.com Hardware
SLLU370 – JUNE 2023
Submit Document Feedback
THVD4431EVM 9
Copyright © 2023 Texas Instruments Incorporated

Finally, the last RS-485 operation mode that is supported is RS-485 loopback, which is entered by mode 111 for
M2, M1, M0, respectively. This mode shorts the driver output to the receiver inputs to allow for diagnostic testing
of the THVD4431 as shown in Figure 2-7.
Figure 2-7. THVD4431EVM: MODE 111(RS485 Loopback Mode)
Hardware www.ti.com
10 THVD4431EVM SLLU370 – JUNE 2023
Submit Document Feedback
Copyright © 2023 Texas Instruments Incorporated