Texas Instruments TPS53317AEVM-726 User manual

Using the TPS53317AEVM-726
User's Guide
Literature Number: SLUUBD2
November 2015

Contents
1 Introduction......................................................................................................................... 5
2 Description.......................................................................................................................... 5
2.1 Typical Applications...................................................................................................... 5
2.2 Features................................................................................................................... 5
3 Electrical Performance Specifications ................................................................................... 6
4 Schematic........................................................................................................................... 7
5 Test Setup .......................................................................................................................... 8
5.1 Test Equipment........................................................................................................... 8
5.2 Recommended Test Setup ............................................................................................. 9
6 Configurations ................................................................................................................... 10
6.1 Mode Selection ......................................................................................................... 10
6.2 Droop/Non-Droop Configuration ..................................................................................... 10
6.3 External Tracking Selection .......................................................................................... 11
6.4 Enable Selection ....................................................................................................... 11
7 Test Procedure................................................................................................................... 11
7.1 Line/Load Regulation and Efficiency Measurement Procedure .................................................. 11
7.2 Control Loop Gain and Phase Measurement Procedure.......................................................... 12
7.3 List of Test Points....................................................................................................... 12
7.4 Equipment Shutdown .................................................................................................. 12
8 Performance Data and Typical Characteristic Curves ............................................................. 13
8.1 Efficiency................................................................................................................. 13
8.2 Load Regulation ........................................................................................................ 13
8.3 Output Transient........................................................................................................ 14
8.4 Output Ripple ........................................................................................................... 15
8.5 Switching Node ......................................................................................................... 16
8.6 Enable Turn On / Turn Off ............................................................................................ 17
8.7 Pre-Bias Turn-On....................................................................................................... 18
8.8 Bode Plot ................................................................................................................ 18
8.9 Thermal Image.......................................................................................................... 19
9 EVM Assembly Drawing and PCB Layout.............................................................................. 20
10 List of Materials ................................................................................................................. 23
2Table of Contents SLUUBD2–November 2015
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List of Figures
1 TPS53317AEVM-726 Schematic.......................................................................................... 7
2 Tip and Barrel Measurement for VOUT Ripple .......................................................................... 8
3 TPS53317AEVM-726 Recommended Test Set Up ..................................................................... 9
4 Efficiency .................................................................................................................... 13
5 Load Regulation............................................................................................................ 13
6 Output Load 0-A to 3-A Transient (1.2-V VIN, 0.6-V VOUT, PWM Mode, fSW = 600 kHz) ........................... 14
7 Output Load 0-A to 3-A Transient with Droop (1.2-V VIN, 0.6-V VOUT, PWM Mode, fSW = 600 kHz) ............. 14
8 Output Ripple (1.2-V VIN, 0.6-V VOUT, 3-A IOUT, fSW = 600 kHz)........................................................ 15
9 Output Ripple (1.2-V VIN, 0.6-V VOUT, 3-A IOUT, fSW = 1 MHz) ......................................................... 15
10 Switching Node (1.2-V VIN, 0.6-V VOUT, 3-A IOUT, fSW = 600 kHz)...................................................... 16
11 Switching Node (1.2-V VIN, 0.6-V VOUT, 3-A IOUT, fSW = 1 MHz)........................................................ 16
12 Turn-On Waveform (1.2-V VIN, 0.6-V VOUT, 3-A IOUT)................................................................... 17
13 Turn-Off Waveform (1.2-V VIN, 0.6-V VOUT, 3-A IOUT).................................................................. 17
14 Pre-Bias Turn-On Waveform (1.2-V VIN, 0.6-V VOUT, 0-A IOUT, 0.3-V Pre-Bias)..................................... 18
15 Loop Gain (1.2-V VIN, 0.6-V VOUT, 3-A IOUT, PWM Mode, fSW = 600 kHz, Non-Droop).............................. 18
16 Thermal Image (1.2-V VIN, 0.6-V VOUT, 6-A IOUT, PWM Mode, fSW = 600 kHz)....................................... 19
17 TPS53317AEVM-726 Top Layer Assembly Drawing (Top View).................................................... 20
18 TPS53317AEVM-726 Bottom Assembly Drawing (Bottom View).................................................... 20
19 TPS53317AEVM-726 Top Copper (Top View)......................................................................... 21
20 TPS53317AEVM-726 Layer 2 (Top View) .............................................................................. 21
21 TPS53317AEVM-726 Layer 3 (Top View) .............................................................................. 22
22 TPS53317AEVM-726 Bottom Layer (Top View) ....................................................................... 22
3
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List of Tables
1 TPS53317AEVM-726 Electrical Performance Specifications.......................................................... 6
2 MODE Selection............................................................................................................ 10
3 Droop Configuration........................................................................................................ 10
4 External Tracking Configuration.......................................................................................... 11
5 Enable Selection ........................................................................................................... 11
6 The Functions of Each Test Points ...................................................................................... 12
7 TPS53317AEVM-726 List of Materials .................................................................................. 23
4List of Tables SLUUBD2–November 2015
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User's Guide
SLUUBD2–November 2015
TPS53317AEVM-726 D-CAP+™ Mode Synchronous Step-
Down Integrated FETs Converter
1 Introduction
The TPS53317AEVM-726 evaluation module (EVM) is a synchronous buck regulator featuring
TPS53317A. The TPS53317A is a fully integrated synchronous buck regulator employing D-CAP+™
technology.
2 Description
The TPS53317AEVM-726 is designed to use a 1.2-V voltage rail to produce a regulated 0.6-V output at up
to 6-A load current. The TPS53317AEVM-726 is designed to demonstrate the TPS53317A in a typical low
voltage application while providing a number of test points to evaluate the performance of the
TPS53317A.
2.1 Typical Applications
• VTT terminators
• Low-voltage applications for 0.9-V to 6-V step-down rails
2.2 Features
The TPS53317AEVM-726 features:
• Integrated droop support
• External tracking support
• Selectable switching frequency settings (600 kHz and 1 MHz)
• Selectable light-load operation modes (auto-skip and forced CCM)
• Selectable valley overcurrent limit
• PGOOD function
• Convenient test points for probing critical waveforms
D-CAP+ is a trademark of Texas Instruments.
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Electrical Performance Specifications www.ti.com
3 Electrical Performance Specifications
Table 1 contains the TPS53317AEVM-726 electrical performance specifications.
Table 1. TPS53317AEVM-726 Electrical Performance Specifications(1)
Parameter Test Conditions MIN TYP MAX Units
Input Characteristics
Voltage range VIN 1.1 1.2 1.3 V
Maximum input current VIN = 1.2 V, IOUT = 6 A 3.8 A
No load input current VIN = 1.2 V, IOUT = 0 A under PWM mode, fSW = 600 25 mA
kHz
Output Characteristics
Output voltage 0.6 V
Setpoint accuracy (VIN = 1.2 V, IOUT = 0 A, non- -2% 2%
droop)
Line regulation (VIN = 1.1 V – 1.3 V, IOUT = 6 A, 0.1%
Output voltage regulation non-droop, fSW = 600 kHz)
Load regulation, (VIN = 1.2 V, IOUT = 0 A – 6 A, non- 0.5%
droop, fSW = 600 kHz)
Output voltage ripple VIN = 1.2 V, IOUT = 6 A 10 mVpp
Output load current 0 6 A
Over current limit valley 7.6/5.4
Systems Characteristics
Switching frequency 600/1000 kHz
Peak efficiency VIN = 1.2 V, IOUT = 1.6 A under PWM mode, fSW = 86.9%
600 kHz
Full load efficiency VIN = 1.2 V, IOUT = 6 A under PWM mode, fSW = 600 78.9%
kHz
Operating temperature 25 ºC
(1) Jumpers set to default locations, See Section 6 of this user’s guide
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12.0k
R7
10µF
C1
1µF
C7
22µF
C8
10µF
C13
10µF
C14
J1
TP5
330µF
C16
TP6
NET0000 6
TP15
250nH
L1
22µF
C9
22µF
C10
22µF
C11
22µF
C12
J2
PGND 1
PGND 2
PGND 3
VIN
4
VIN
5
GND 6
VREF
7
COMP
8
REFIN
9
VOUT 10
SW 11
SW 12
SW 13
SW 14
SW 15
BST 16
EN
17
MODE 18
PGOOD 19
V5IN
20
PAD 21
U1
TPS53317ARGBR
MODE
100k
R4 V5IN
0
R14
GND
AGND
J3
6
4
5
S1
V5IN
TP12 TP13
CHA CHB
TP14
AGND
VIN
GND
J5
J7
AGND
REFIN
1µF
C3
7.87k
R3
AGND
VREF
1
2
3
J6
COMP
0
R16
DNP
1000pF
C25
DNP
AGND GND
GND
GND
VOUTSW VOUT
0.6V / 6A
V5IN
VIN
1.1V - 1.3V
TP1
TP8
TP2
TP10
TP9
GND
EN
TP7
22.0k
R9
33.0k
R10
47.0k
R11
68.0k
R12
100k
R13
DIS
EN
TP3
TP4
GND
5V
AGND
10µF
C15
10µF
C2
0
R8
2.2µF
C23
0
R6
0.1µF
C5
10.0
R17
2200pF
C4
3.92k
R5
TP11
68pF
C6
23.2k
R1
10.0k
R2
0.01µF
C24
10.0k
R15
22µF
C17
22µF
C18
22µF
C19
22µF
C20
22µF
C21
22µF
C22
12 34 56 78 910
11 12 13 14 15 16
J4
MODE
GND
www.ti.com Schematic
4 Schematic
Figure 1 illustrates the EVM schematic.
Figure 1. TPS53317AEVM-726 Schematic
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TP5 TP6
Test Setup www.ti.com
5 Test Setup
5.1 Test Equipment
Voltage Source:
•VIN: The input voltage source VIN should be a 0-V to 6-V variable DC source capable of supplying 8
ADC. Connect VIN to J1 as shown in Figure 3.
•V5IN: The V5IN voltage source should be a 5-V DC source capable of supplying 1 ADC. Connect V5IN
to J3 as shown in Figure 3.
Multimeters:
•V1: VIN at TP1 (VIN) and TP2 (PGND), 0-V to 6-V voltmeter
•V2: V5IN at TP3 (V5IN) and TP4 (PGND)
•V3: VOUT at TP5 (VOUT) and TP6 (PGND)
•A1: VIN input current, 0 ADC to 8 ADC Ammeter
Output Load: The output load should be an electronic constant resistance mode load capable of 0 ADC to
10 ADC
Figure 2. Tip and Barrel Measurement for VOUT Ripple
Fan: Some of the components in this EVM may approach temperatures of 55ºC during operation. A small
fan capable of 200 LFM to 400 LFM is recommended to reduce component temperatures while the EVM is
operating. The EVM should not be probed while the fan is not running.
Recommended Wire Gauge:
•VIN to J1 (1.2-V input): The recommended wire size is 1x AWG #14 per input connection, with the
total length of wire less than 4 feet (2 feet input, 2 feet return).
•J2 to LOAD: The minimum recommended wire size is 1x AWG #14, with the total length of wire less
than 4 feet (2-feet output, 2-feet return)
•V5IN to J3 (5-V input): The recommended wire size is 1x AWG #16 per input connection, with the
total length of wire less than 4 feet (2-feet input, 2-feet return).
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+
-
V5IN
+
-
VIN
A1
Load
V2
V1
V3
www.ti.com Test Setup
5.2 Recommended Test Setup
Figure 3 is the recommended test set up to evaluate the TPS53317AEVM-726. Working at an ESD
workstation, make sure that any wrist straps, bootstraps or mats are connected referencing the user to
earth ground before power is applied to the EVM.
Figure 3. TPS53317AEVM-726 Recommended Test Set Up
Input Connections:
1. Prior to connecting the DC input source VIN, it is advisable to limit the source current from VIN to 8 A
maximum. Make sure VIN is initially set to 0 V and connected to J1 as shown in Figure 3.
2. Connect a current meter A1 between VIN and J1 to measure the input current.
3. Connect a voltmeter V1 at TP1 (VIN) and TP2 (PGND) to measure the input voltage.
4. Prior to connecting the 5-V DC source V5IN, it is advisable to limit the source current from V5IN to 1 A
maximum. Make sure V5IN is initially set to 0 V and connected to J3 as shown in Figure 3.
5. Connect a voltmeter V2 at TP3 (V5IN) and TP4 (PGND) to measure the V5IN voltage.
Output Connections:
1. Connect Load to J2 and set Load to constant resistance mode to sink 0 ADC before VIN is applied.
2. Connect a voltmeter V3 at TP5 (VOUT) and TP6 (PGND) to measure the output voltage.
Other Connections: Place a Fan as shown in Figure 3 and turn on, making sure air is flowing across the
EVM.
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Configurations www.ti.com
6 Configurations
All Jumper selections should be made prior to applying power to the EVM. User can configure this EVM
per following configurations.
6.1 Mode Selection
The MODE can be set by J4.
6.1.1 Default setting: MODE5
Table 2. MODE Selection
Switching Overcurrent Limit
Mode Resistances Light-Load Power-
Jumper Setting Mode Frequency (OCL) Valley
(kΩ) Saving Mode (kHz) (A)
1st 1 0 600 7.6
(1-2 pin shorted)
2nd 2 12 600 5.4
(3-4 pin shorted) Skip
3rd 3 22 1000 5.4
(5-6 pin shorted)
4th 4 33 1000 7.6
(7-8 pin shorted)
5th 5 47 600 7.6
(9-10 pin shorted)
6th 6 68 600 5.4
(11-12 pin shorted) PWM
7th (13-14 pin 7 100 1000 5.4
shorted)
8th 8 Open 1000 7.6
(15-16 pin shorted)
6.2 Droop/Non-Droop Configuration
The droop function can be configured by J6.
6.2.1 Default Setting: Non-Droop
Table 3. Droop Configuration
Jumper Setting Droop Configuration
Top(1-2 pin shorted) Droop
Bottom(2-3 pin shorted) Non-droop
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www.ti.com Configurations
6.3 External Tracking Selection
The external tracking can be configured by J5. If jumper J5 is shorted, the internal 2-V VREF voltage is
used to set the target output voltage to be 0.6 V. If jumper J5 is open, the external reference between 0.9
V to 4.0 V can be applied to J7. The output voltage will be regulated to ½ of the external reference
voltage. For example, applying 1.5 V to J7, the output voltage is 0.75 V.
6.3.1 Default setting: No External Tracking
Table 4. External Tracking Configuration
Jumper Setting External Tracking Configuration
Short No external tracking
Open External tracking
6.4 Enable Selection
The controller can be enabled and disabled by S1.
6.4.1 Default setting: Switch to disable the controller
Table 5. Enable Selection
Switch Setting Enable Selection
DIS Disable the controller
EN Enable the controller
7 Test Procedure
7.1 Line/Load Regulation and Efficiency Measurement Procedure
1. Set up EVM as described in Figure 3.
2. Ensure Load is set to constant resistance mode and to sink 0 ADC.
3. Ensure all jumpers and switch configuration settings per Section 6.
4. Increase V5IN from 0 V to 5 V. Using V2 to measure V5IN voltage.
5. Increase VIN from 0 V to 1.2 V. Using V1 to measure VIN voltage.
6. Set switch S1 to EN to enable the controller.
7. Use V3 to measure VOUT voltage, A1 to measure VIN current.
8. Vary Load from 0 ADC to 6 ADC, VOUT should remain in load regulation.
9. Vary VIN from 1.1 V to 1.3 V, VOUT should remain in line regulation.
10. Set switch S1 to DIS to disable the controller.
11. Decrease Load to 0 A.
12. Decrease VIN to 0 V.
13. Decrease V5IN to 0 V.
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7.2 Control Loop Gain and Phase Measurement Procedure
TPS53317AEVM-726 contains a 10-Ωseries resistor in the feedback loop for loop response analysis.
1. Set up EVM as described in Figure 3.
2. Connect isolation transformer to test points marked TP12 and TP13.
3. Connect input signal amplitude measurement probe (channel A) to TP12. Connect output signal
amplitude measurement probe (channel B) to TP13.
4. Connect ground lead of channel A and channel B to TP14.
5. Inject around 40 mV or less signal through the isolation transformer.
6. Sweep the frequency from 100 Hz to 1 MHz with 10 Hz or lower post filter. The control loop gain and
phase margin can be measured.
7. Disconnect isolation transformer from bode plot test points before making other measurements (signal
injection into feedback may interfere with accuracy of other measurements).
7.3 List of Test Points
Table 6. The Functions of Each Test Points
Test Points Name Description
TP1 VIN Input voltage
TP2 PGND PGND for VIN
5-V power supply for analog circuits and
TP3 V5IN gate drive
TP4 PGND PGND for V5IN
TP5 VOUT Output voltage
TP6 PGND PGND for VOUT
TP7 PGOOD Power good
TP8 EN Enable pin
TP9 SW Switching node
TP10 AGND Signal ground
TP11 VREF Internal 2-V reference voltage output
TP12 CHA Input A for loop injection
TP13 CHB Input B for loop injection
TP14 AGND Signal ground
TP15 REFIN Target output voltage input
7.4 Equipment Shutdown
1. Shut down VIN
2. Shut down V5IN
3. Shut down Load
4. Shut down FAN
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IOUT (A)
VOUT (V)
0 1 2 3 4 5 6 7
0.56
0.565
0.57
0.575
0.58
0.585
0.59
0.595
0.6
0.605
0.61
D001
600 kHz, Non-Droop
600 kHz, Non-Droop
1 MHz, Droop
1 MHz, Droop
IOUT (A)
Efficiency (%)
0 1 2 3 4 5 6
70
72
74
76
78
80
82
84
86
88
D002
PWM Mode, 600 kHz
PWM Mode, 1 MHz
www.ti.com Performance Data and Typical Characteristic Curves
8 Performance Data and Typical Characteristic Curves
Figure 4 through Figure 15 present typical performance curves for TPS53317AEVM-726.
8.1 Efficiency
Figure 4. Efficiency
8.2 Load Regulation
Figure 5. Load Regulation
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Performance Data and Typical Characteristic Curves www.ti.com
8.3 Output Transient
Figure 6. Output Load 0-A to 3-A Transient
(1.2-V VIN, 0.6-V VOUT, PWM Mode, fSW = 600 kHz)
Figure 7. Output Load 0-A to 3-A Transient with Droop
(1.2-V VIN, 0.6-V VOUT, PWM Mode, fSW = 600 kHz)
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www.ti.com Performance Data and Typical Characteristic Curves
8.4 Output Ripple
Figure 8. Output Ripple
(1.2-V VIN, 0.6-V VOUT, 3-A IOUT, fSW = 600 kHz)
Figure 9. Output Ripple
(1.2-V VIN, 0.6-V VOUT, 3-A IOUT, fSW = 1 MHz)
15
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8.5 Switching Node
Figure 10. Switching Node
(1.2-V VIN, 0.6-V VOUT, 3-A IOUT, fSW = 600 kHz)
Figure 11. Switching Node
(1.2-V VIN, 0.6-V VOUT, 3-A IOUT, fSW = 1 MHz)
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8.6 Enable Turn On / Turn Off
Figure 12. Turn-On Waveform
(1.2-V VIN, 0.6-V VOUT, 3-A IOUT)
Figure 13. Turn-Off Waveform
(1.2-V VIN, 0.6-V VOUT, 3-A IOUT)
17
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8.7 Pre-Bias Turn-On
Figure 14. Pre-Bias Turn-On Waveform
(1.2-V VIN, 0.6-V VOUT, 0-A IOUT, 0.3-V Pre-Bias)
8.8 Bode Plot
Figure 15. Loop Gain
(1.2-V VIN, 0.6-V VOUT, 3-A IOUT, PWM Mode, fSW = 600 kHz, Non-Droop)
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www.ti.com Performance Data and Typical Characteristic Curves
8.9 Thermal Image
Figure 16. Thermal Image
(1.2-V VIN, 0.6-V VOUT, 6-A IOUT, PWM Mode, fSW = 600 kHz)
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EVM Assembly Drawing and PCB Layout www.ti.com
9 EVM Assembly Drawing and PCB Layout
The following figures (Figure 17 through Figure 22) show the design of the TPS53317AEVM-726 printed
circuit board. The EVM has been designed using 4-Layers, 2-oz copper circuit board.
Figure 17. TPS53317AEVM-726 Top Layer Assembly Drawing (Top View)
Figure 18. TPS53317AEVM-726 Bottom Assembly Drawing (Bottom View)
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