Texas Instruments LMG341-EVM-018 User manual
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User's Guide
SNOU165A–September 2018–Revised March 2019
Using the LMG341xEVM-018 half-bridge and LMG34XX-
BB-EVM breakout board EVM
The LMG341xEVM-018 features two LMG341xR050 600V GaN power transistors with integrated drivers
that are configured in a half bridge with all the required bias circuit and logic/power level shifting. Essential
power stage and gate driving high frequency current loops are fully enclosed on the board to minimize
parasitic inductances, reducing voltage overshoots and improving performance. The LMG341xEVM-018 is
configured to have a socket style external connection for easy interface with external power stages to run
the LMG341xR050 in various applications.
Contents
1 LMG341xEVM-018 User's Guide General TI High Voltage Evaluation User Safety Guidelines .................. 2
2 Description.................................................................................................................... 4
3 Schematic..................................................................................................................... 8
4 Test Setup................................................................................................................... 11
5 Test Procedure ............................................................................................................. 14
6 Typical Characteristics..................................................................................................... 15
7 EVM Assembly Drawing and PCB Layout .............................................................................. 16
8 Bill of Materials ............................................................................................................. 18
List of Figures
1 Simplified LMG341xEVM-018 Schematic ................................................................................ 5
2 Top Side View of LMG341xEVM-018..................................................................................... 6
3 Back Side View of LMG341xEVM-018.................................................................................... 6
4 LMG3410EVM-018 Schematic............................................................................................. 8
5 Recommended Footprint for LMG341xEVM-018........................................................................ 9
6 LMG34XX-BB-EVM Schematic .......................................................................................... 10
7 LMG3410EVM-018 Connected with LMG34XX-BB-EVM ............................................................ 11
8 Recommended Connection Points....................................................................................... 12
9 Recommended Probe Connection for Logic Signals.................................................................. 15
10 Recommended Probe Connection for High Voltage Switch Node................................................... 15
11 Recommended Configuration for Heatsink and Fan................................................................... 15
12 Switching Waveforms with 480V input, 100kHz, 30% duty cycle, 6A output....................................... 15
13 Low to High Transition Waveform with 480V input, 100kHz, 30% duty cycle, 6A output ........................ 15
14 High to Low Transition Waveform with 480V input, 100kHz, 30% duty cycle, 6A output ........................ 15
15 LMG341xEVM-018 Top Layer and Components ...................................................................... 16
16 LMG341xEVM-018 Inner Copper Layer 1 .............................................................................. 16
17 LMG341xEVM-018 Inner Copper Layer 2 .............................................................................. 16
18 LMG341xEVM-018 Bottom Layer and Components .................................................................. 16
19 LMG34XX-BB-EVM Top Layer and Components...................................................................... 16
20 LMG34XX-BB-EVM Bottom Layer and Components.................................................................. 16
List of Tables
1 Logic Pin Function Description............................................................................................. 4
2 Power Pin Function Description ........................................................................................... 4
WARNING
LMG341xEVM-018 User's Guide General TI High Voltage Evaluation User Safety Guidelines
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3 Test Point Functional Description........................................................................................ 13
4 List of Terminals............................................................................................................ 13
5 LMG341xEVM-018 List of Materials..................................................................................... 18
6 LMG34XX-BB-EVM List of Materials .................................................................................... 20
Trademarks
All trademarks are the property of their respective owners.
1 LMG341xEVM-018 User's Guide
General TI High Voltage Evaluation User Safety Guidelines
Always follow TI’s set-up and application instructions, including use of all interface components within their
recommended electrical rated voltage and power limits. Always use electrical safety precautions to help
ensure your personal safety and the safety of those working around you. Contact TI’s Product Information
Center http://support/ti./com for further information.
Save all warnings and instructions for future reference.
Failure to follow warnings and instructions may result in personal injury, property damage, or
death due to electrical shock and/or burn hazards.
The term TI HV EVM refers to an electronic device typically provided as an open framed, unenclosed
printed circuit board assembly. It is intended strictly for use in development laboratory environments,
solely for qualified professional users having training, expertise, and knowledge of electrical safety risks in
development and application of high-voltage electrical circuits. Any other use and/or application are strictly
prohibited by Texas Instruments. If you are not suitably qualified, you should immediately stop from further
use of the HV EVM.
•Work Area Safety:
– Maintain a clean and orderly work area .
– Qualified observer(s) must be present anytime circuits are energized.
– Effective barriers and signage must be present in the area where the TI HV EVM and its interface
electronics are energized, indicating operation of accessible high voltages may be present, for the
purpose of protecting inadvertent access.
– All interface circuits, power supplies, evaluation modules, instruments, meters, scopes and other
related apparatus used in a development environment exceeding 50 VRMS/75 VDC must be
electrically located within a protected Emergency Power Off (EPO) protected power strip.
– Use a stable and non-conductive work surface.
– Use adequately insulated clamps and wires to attach measurement probes and instruments. No
freehand testing whenever possible.
•Electrical Safety:
As a precautionary measure, it is always a good engineering practice to assume that the entire
EVM may have fully accessible and active high voltages.
– De-energize the TI HV EVM and all its inputs, outputs, and electrical loads before performing any
electrical or other diagnostic measurements. Confirm that TI HV EVM power has been safely de-
energized.
– With the EVM confirmed de-energized, proceed with required electrical circuit configurations, wiring,
measurement equipment hook-ups and other application needs, while still assuming the EVM circuit
and measuring instruments are electrically live.
– When EVM readiness is complete, energize the EVM as intended.
WARNING: While the EVM is energized, never touch the EVM or its electrical circuits as they
could be at high voltages capable of causing electrical shock hazard.
!
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•Personal Safety:
– Wear personal protective equipment, for example, latex gloves and/or safety glasses with side
shields or protect EVM in an adequate lucent plastic box with interlocks from accidental touch.
•Limitation for Safe Use:
– EVMs are not to be used as all or part of a production unit.
Safety and Precautions
The EVM is designed for professionals who have received the appropriate technical training, and is
designed to operate from an AC power supply or a high-voltage DC supply. Please read this user guide
and the safety-related documents that come with the EVM package before operating this EVM.
CAUTION
Do not leave the EVM powered when unattended.
WARNING
Hot surface! Contact may cause burns. Do not touch!
WARNING
High Voltage! Electric shock is possible when connecting board to
live wire. Board should be handled with care by a professional.
For safety, use of isolated test equipment with overvoltage and
overcurrent protection is highly recommended.
Description
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2 Description
The LMG341xEVM-018 operates as a daughter card as part of a larger custom designed system or with
the LMG34XX-BB-EVM breakout motherboard.
2.1 LMG341xEVM-018
The LMG341xEVM-018 configures two LMG341xR050 GaN FETs in a half bridge. All the bias and level
shifting components are included, allowing low side referenced signals to control both FETs. High
frequency bypass capacitors are included on the power stage in an optimized layout to minimize parasitic
inductance and reduce voltage overshoot.
There are 6 logic pins on the FET card.
Table 1. Logic Pin Function Description
Pin Description
AGND Logic and bias power ground return pin. Functionally isolated from PGND.
12V Auxiliary power input for when the LMG341xEVM-018 is configured in bootstrap mode. Pin is not used
when configured in isolated power mode.
5V Auxiliary power input for the LMG341xEVM-018. Used to power logic isolators. Used as input bias power
of LMG341xR050 devices when configured in isolated power mode.
FAULT Logic AND output from FAULT signal from LMG341xR050. Pin is either pulled to AGND or 5V.
Q2 Gate AGND referenced logic gate signal input for bottom LMG341xR050. Compatible with both 3.3V and 5V
logic.
Q1 Gate AGND referenced logic gate signal input for top LMG341xR050. Compatible with both 3.3V and 5V logic.
There are 3 power pins on the FET card.
Table 2. Power Pin Function Description
Pin Description
VSW Switch node of the half bridge
VDC Input DC voltage of the half bridge
PGND Power ground of the half bridge. Functionally isolated from
AGND.
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Description
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Figure 1. Simplified LMG341xEVM-018 Schematic
CAUTION
High-voltage levels are present on the evaluation module whenever it is
energized. Proper precautions must be taken when working with the EVM.
2.1.1 FAULT
The FAULT pin of LMG341xEVM-018 is active low when an under voltage lockout on an auxiliary voltage
rail, over temperature or overcurrent even occurs on the LMG341xR050. The FAULT signal for both
LMG341xR050 devices are level shifted to AGND, where they are logic AND connected to the FAULT pin.
CAUTION
Please do NOT ignore FAULT signal when using LMG341xEVM-018. Turn off
both top and bottom devices, if any device is generating FAULT signal. The
device under fault condition may operate in undesired 3rd-quadrant mode and
may be over heated and damaged due to the high source-drain voltage drop if
the other device is still switching.
2.1.2 Power Pins
While there are some power stage bypass capacitors on the LMG341xEVM-018 from VDC to PGND to
minimize voltage overshoot during switching, more bulk capacitance is required to hold up the DC voltage
during operation. It is highly recommended to minimize, and ideally prevent, any overlap and parasitic
capacitance from VSW to VDC, PGND and any logic pins. The two grounds PGND and AGND are
functionally isolated from each other on the LMG341xEVM-018.
Description
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2.1.3 Bootstrap Mode
The LMG341xEVM-018 card can be modified to operate in bootstrap mode, where the 12V bias voltage is
used to power both LMG341xR050 devices. This can be achieved by removing U3, U4 and R2, and
placing a 20 Ωresistor on R1, a 0 Ωresistor on R18 and a 600V SOD-123 diode on D1, such as Micro
Commercial Components UFM15PL-TP. Do NOT power up the LMG341xEVM-018 when R1, R2, R7, D1,
U4 and U5 are all populated.
2.1.4 Heatsink
Heatsink is installed to help with heat dissipation of the LMG341xR050. Exposed copper pads that are
attached to the die attach pad (DAP) of both the high and low side devices are provided for a low thermal
impedance point to a heatsink. The two copper pads have high voltage potential difference between them
so an electrically isolative thermal interface material (TIM) is required. Please refer to Section 8 for the
recommended TIM and mechanical fixture.
Figure 2. Top Side View of LMG341xEVM-018 Figure 3. Back Side View of LMG341xEVM-018
2.2 LMG34XX-BB-EVM
To allow for quick operation the LMG34XX-BB-EVM is available to interface with the LMG341xEVM-018.
This mother board is designed to operate the LMG341xR050 as a synchronous open loop buck converter.
Easy probe locations are provided for measurement of logic and power stage voltages.
2.2.1 Bias Supply
The motherboard requires one 12V bias supply. A linear drop off regulator steps the voltage down to a
tightly regulated 5V for logic and auxiliary power of the LMG341xR050 when the LMG341xEVM-018 is
configured in isolated power mode. When the LMG341xEVM-018 is configured in bootstrap mode the 12V
input is used to power the two LMG341xR050 devices.
2.2.2 Logic PWM Input
The LMG34XX-BB-EVM supports a single PWM, with complimentary signal and corresponding dead time
generated on board. A 0 V to 5 V magnitude input square wave is required. The complementary PWM
generation circuit creates 50 ns of dead time between both transitions of the PWM signals.
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Description
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2.2.3 Fault Protection
There is an option to disable PWM input to the FET card in the event of a fault signal from the
LMG341xEVM-018. When the FAULT Protect jumper is placed in the EN mode PWM is disabled when
either LMG341xR050 has an active fault. This disable is not latching, so when the fault clears PWM
immediately resumes. If FAULT Protect mode is not desired it can be disabled by placing the jumper in
the DIS position. The FAULT LED will still illuminate when either LMG341xR050 has an active fault,
regardless of the position of FAULT Protect jumper.
2.3 Typical Applications
The LMG341xEVM-018 is designed for use in AC/DC, DC/DC and DC/AC applications
• Totem-Pole PFC converters
• Phase-Shifted Full Bridge or LLC Converter
• Buck converter such as the LMG34XX-BB-EVM
2.4 Features
The LMG341xEVM-018 has the following features and specifications:
• Two options to bias the LMG341x, isolated power or from bootstrap diode
• Over temperature, overcurrent, and under voltage lockout protection with FAULT indication that is level
shifted to an AGND referenced signal
• Gate logic input support of either 3.3V or 5V logic
• Maximum recommended operating voltage of 480V and absolute maximum voltage of 600V
The LMG34XX-BB-EVM has the following features and specifications:
• Requires only a single 12V bias supply
• Requires only a single 0V to 5V PWM input to generate gate drive signal
• PWM disable in the event of a fault from the LMG341xEVM-018
• Maximum recommended operating voltage of 480V and absolute maximum voltage of 600V
• Maximum recommended operating inductor current of 8A
AGND
1
2
3
4
5
J3
112404
AGND
1 6
5
2
U1A
SN74LVC2G14DCKR
1µF
C9
AGND
5V
39pF
C13
D2
BAT54WS-7-F
AGND
AGND
HDEAD1
PWM
1µF
C11 5V
3 4
5
2
U3B
SN74LVC2G14DCKR
39pF
C5
D1
BAT54WS-7-F
AGND
AGND
5V
LDEAD1
1µF
C4 5V
AGND
1.20k
R1
1.20k
R5
HVIN
PGND1
Vin
HVOUT
PGND2
Vout
LOW
HIGH
FAULT
1000pF
C14
AGND
PGND
1µF
C6
1
2
7
48
U2A
SN74LVC2G08IDCTRQ1
5
6
3
48
U2B
SN74LVC2G08IDCTRQ1
5V
AGND
5V
5V
5V
12V aux
FAULT Indicator
SW1 PGND3
AGND
0
R9
1
2
J6
282834-2
5µF
C1
5µF
C15
HIGH
LOW
PGND
PGND
PGND PGND
39pF
C7
0
R2
AGND
0
R4
39pF
C12
AGND
39pF
C10
AGND
0
R3 VDC
PGND
SW
AGND
5V
1 6
5
2
U3A
SN74LVC2G14DCKR
0.1µF
630V
C3
0.1µF
630V
C2
0.1µF
630V
C17
0.1µF
630V
C16
1µF
C18
AGND
1µF
C20
LOW_2
HIGH_2
HIGH_2
LOW_2
5
4
1
2
3
6
J4
TSW-106-07-G-S
1µF
C8
VAUX
ACMGND
1
2
3
4
5
6
J2
0448120024
AGND1
AGND4
5V
AGND
3 4
5
2
U1B
SN74LVC2G14DCKR
AGND3
0
R23
0
R21
IN
1OUT 3
GND 2
TAB
4
U4
LM2940IMP-5.0/NOPB 33µF
C19
10µF
C21
12V
12V
12V
Green
1
2
D4
Red
1
2
D3
1.6k
R6
1.6k
R8
30k
R10
30k
R16
30k
R11
30k
R17
30k
R18
30k
R12
30k
R13
30k
R19
30k
R20
30k
R14
1
2
3
J7
TSW-103-07-G-S
5V
Red
1
2
D5
PGND
SH-J1
1
2
J5
282841-2
1
2
J1
282841-2
1
2
3
4
47µH
L3
DRQ73-470-R
TI HV Synchronous Buck Motherboard
150µH
L1
150µH
L2
10.0k
R7
5V
AGND
AGND
AGND
AGND2
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Schematic
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Figure 6. LMG34XX-BB-EVM Schematic
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Test Setup
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4 Test Setup
4.1 Test Equipment
DC Voltage Source: Capable of supplying the input of the EVM up to 480 V
DC Bias Source: Capable of 12 V output at up to 0.7 A
Function Generator: Capable of 0 V to 5 V square wave output with adjustable duty cycle and frequency in
desired operating range. It is recommended to operate the LMG341xEVM-018 and LMG34XX-BB-EVM
with a switching frequency between 50 kHz to 200 kHz.
Oscilloscope: Capable of at least 200 MHz operation. A 1 GHz or greater oscilloscope and probes with
short ground springs are recommended for accurate measurements.
DC Multimeter(s): Capable of 600 V measurement, suitable for determining operation and efficiency (if
desired).
DC Load: Capable of 600 V operation at up to 8 A in current-mode operation.
Fan: 200 LFM minimum airflow is recommended
4.2 Recommended Test Setup
The LMG341xEVM-018 connects to the LMG34XX-BB-EVM as Figure 7 shows.
Figure 7. LMG3410EVM-018 Connected with LMG34XX-BB-EVM
Test Setup
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The LMG34XX-BB-EVM power and probe connection points are shown in Figure 8.
Figure 8. Recommended Connection Points
PCB Notes:
• Probe points for gate drive logic
• 100 mil header for PWM input, PWM signals to LMG341xEVM-018 and FAULT output
• BNC connector for PWM input
• 12V bias supply input
• FAULT Protection option header
• Power stage high voltage input
• Probe point for power stage switch node
• Power stage high voltage output
WARNING
There are very high voltages present on the EVM. Some
components reach temperatures above 50°C. Precautions must be
taken when handling the board.
4.3 List of Test Points
Key test points on this EVM have been designed for use with oscilloscope probes with short ground
springs. Using the short ground spring instead of the alligator ground lead will minimize measurement
error and produce a cleaner signal with the fast switching GaN devices used on this EVM. The data
shown in this user guide has been obtained using such a measurement method.
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Test Setup
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Table 3. Test Point Functional Description
NAME DESCRIPTION
VAUX 12 V bias input connection before filter
ACMGND Ground for 12 V bias input before filter
5V 5 V bias
AGND1 Analog ground for logic
PWM Single input PWM signal
LDEAD1 Low side PWM signal before dead time generation
AGND3 Analog ground for logic
HDEAD1 High side PWM signal before dead time generation
AGND4 Analog ground for logic
LOW Low side PWM signal with dead time
HIGH High side PWM signal with dead time
AGND2 Analog ground for logic
12V 12 V bias after filter
PGND1 Power ground
HVIN DC input voltage
PGND2 Power ground
HVOUT DC output voltage
PGND3 Power ground
SW1 Switch node voltage
4.4 List of Terminals
Table 4. List of Terminals
TERMINAL NAME DESCRIPTION
J1 VIN Input DC voltage input
J5 VOUT Output DC voltage output
J6 12V AUX 12 V bias voltage input
J3 PWM INPUT Single 0 V to 5 V PWM input for gate
J4 LOGIC Header to connect PWM, FAULT logic
J2 HB Card PIN Connector to interface LMG341xEVM-018
board
Test Procedure
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5 Test Procedure
5.1 Setup
The following procedure is recommended to set up the LMG34XX-BB-EVM with the LMG341xEVM-018:
• Connect LMG341xEVM-018 to LMG34XX-BB-EVM
• Connect oscilloscope or multimeter probes to desired test points as shown in A or G
• Connect the 12 V bias supply, load to the output, and input supply to the input
• Connect the function generator to either the BNC connector PWM input at C or 100 mil header
connector input at pin 6 (PWM) and pin 5 (GND) at B.
• Enable an external fan to direct airflow across the heatsink attached to the LMG341xEVM-018
5.2 Startup and Operating Procedure
The following procedure is recommended to enable the LMG34XX-BB-EVM with the LMG341xEVM-018:
1. Power up the 12 V bias supply. Ensure the top right green “Aux Enable” LED is illuminated.
2. Enable PWM on the function generator
3. Power up high voltage input supply. Ensure the red “HV Enable” LED is illuminated when the input
supply is above 20 V.
WARNING
Do NOT turn on device at absolute maximum voltage. It is
recommended to start at voltages at or below 480 V, and then
increase the input voltage slowly while monitoring VSW to insure the
peak voltage does not exceed the absolute maximum rating of 600
V.
5.3 Shutdown Procedure
1. Turn off input supply then PWM. Wait until red “HV Enable” LED turns off.
2. Disable 12 V bias supply
5.4 Additional Operation Notes
• Fault protection on the LMG34XX-BB-EVM is not latching, so if a fault clears and the LMG34XX-BB-
EVM is still operational PWM will resume.
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Typical Characteristics
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6 Typical Characteristics
Figure 9. Recommended Probe Connection for Logic
Signals Figure 10. Recommended Probe Connection for High
Voltage Switch Node
Figure 11. Recommended Configuration for Heatsink and
Fan
Figure 12. Switching Waveforms with 480V input, 100kHz,
30% duty cycle, 6A output
EVM Assembly Drawing and PCB Layout
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Figure 13. Low to High Transition Waveform with 480V
input, 100kHz, 30% duty cycle, 6A output Figure 14. High to Low Transition Waveform with 480V
input, 100kHz, 30% duty cycle, 6A output
7 EVM Assembly Drawing and PCB Layout
Figure 15. LMG341xEVM-018 Top Layer and Components
Figure 16. LMG341xEVM-018 Inner Copper Layer 1
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EVM Assembly Drawing and PCB Layout
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Figure 17. LMG341xEVM-018 Inner Copper Layer 2 Figure 18. LMG341xEVM-018 Bottom Layer and
Components
Figure 19. LMG34XX-BB-EVM Top Layer and Components Figure 20. LMG34XX-BB-EVM Bottom Layer and
Components
Bill of Materials
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8 Bill of Materials
Table 5. LMG341xEVM-018 List of Materials
Qty Designator Description Part Number Manufacturer
2 C1, C16 CAP, CERM, 1 uF, 25 V, +/- 10%, X5R,
0402 C1005X5R1E105K050BC TDK
4 C2, C17, C29, C31 CAP, CERM, 0.1 uF, 50 V, +/- 10%, X7R,
0402 C1005X7R1H104K050BB TDK
2 C3, C19 CAP, CERM, 22 pF, 50 V, +/- 5%,
C0G/NP0, 0402 C1005C0G1H220J050BA TDK
2 C4, C18 CAP, CERM, 10 uF, 25 V, +/- 10%, X7R,
1206_190 C1206C106K3RACTU Kemet
2 C5, C20 CAP, CERM, 0.22 uF, 50 V, +/- 10%,
X7R, 0603 C1608X7R1H224K080AB TDK
6 C6, C7, C8, C21, C22,
C23 CAP, CERM, 68 pF, 50 V, +/- 5%,
C0G/NP0, 0402 C1005C0G1H680J050BA TDK
4 C9, C10, C11, C12 CAP, CERM, 0.022 µF, 1000 V,+/- 10%,
X7R, AEC-Q200 Grade 1, 1206 C1206C223KDRACTU Kemet
2 C13, C14 CAP, CERM, 0.1 uF, 1000 V, +/- 10%,
X7R, 1812 C1812W104KDRACTU Kemet
2 C15, C24 CAP, CERM, 2.2 uF, 25 V, +/- 10%, X7R,
0805 GRM21BR71E225KA73L MuRata
6 C25, C26, C27, C28, C33,
C34 CAP, CERM, 4.7 uF, 35 V, +/- 10%, X5R,
0603 C1608X5R1V475K080AC TDK
2 C30, C32 CAP, CERM, 4.7 uF, 16 V, +/- 10%, X7R,
AEC-Q200 Grade 1, 0805 GCM21BR71C475KA73L MuRata
4 D2, D3, D6, D7 Diode, Schottky, 30 V, 0.5 A, SOD-123 B0530W-7-F Diodes Inc.
2 D4, D5 Diode, Zener, 16 V, 500 mW, AEC-Q101,
SOD-123 BZT52C16-7-F Diodes Inc.
1 H1 Heat Sink, Black Anodized, 30 x 30 mm,
20 mm high, with Push Pin and Spring UBM30-20BP-0N04 Alpha Novatech
2 H2 Mechanical spring 0.8x6.1x11.2SP Alpha Novatech,Inc.
2 H3 Mechanical push pin PIP3.175x13.2 Alpha Novatech,Inc.
1 H4 Thermal Interface Material 07-62200 Fuji Polymer Industries
1 J1 Header, 2.54mm, 6x1, Gold, R/A, TH 90121-0766 Molex
2 L1, L2 Inductor, 10 uH, 0.5 A, 0.85 ohm, SMD 74404020100 Wurth Elektronik
2 L3, L4 Coupled inductor, 0.2 A, 0.45 ohm, SMD ACM2520-601-2P-T002 TDK
2 Q1, Q2 600-V 12-A Single Channel GaN Power
Stage, RWH0032A (VQFN-32) LMG3410R050RWHT(LM
G3411R050RWHT) Texas Instruments
1 Q3 MOSFET, N-CH, 20 V, 0.75 A, SOT-23 MGSF1N02LT1G ON Semiconductor
1 R1 RES, 0, 5%, 0.1 W, 0603 MCT06030Z0000ZP500 Vishay/Beyschlag
4 R3, R4, R8, R9 RES, 49.9, 1%, 0.063 W, 0402 RC0402FR-0749R9L Yageo America
2 R5, R10 RES, 10.0 k, 1%, 0.1 W, 0402 ERJ-2RKF1002X Panasonic
1 R6 RES, 15 k, 5%, 0.063 W, AEC-Q200
Grade 0, 0402 CRCW040215K0JNED Vishay-Dale
1 R11 RES, 17.8 k, 1%, 0.063 W, AEC-Q200
Grade 0, 0402 CRCW040217K8FKED Vishay-Dale
1 R12 RES, 100 k, 1%, 0.063 W, 0402 RC1005F104CS Samsung Electro-
Mechanics
2 T1, T2 Transformer, 475uH, SMT 760390014 Wurth Elektronik
3 TP1, TP2, TP3 PCB Pin, 0.04" DIA, Edge-Mount 3620-2-32-15-00-00-08-0 Mill-Max
1 TP4 Test Point, Compact, SMT 5016 Keystone
2 U1, U3 High Speed, Robust EMC Reinforced
Triple-Channel Digital Isolator,
DBQ0016A (SSOP-16)
ISO7731DBQR Texas Instruments
www.ti.com
Bill of Materials
19
SNOU165A–September 2018–Revised March 2019
Submit Documentation Feedback Copyright © 2018–2019, Texas Instruments Incorporated
Using the LMG341xEVM-018 half-bridge and LMG34XX-BB-EVM breakout
board EVM
Table 5. LMG341xEVM-018 List of Materials (continued)
Qty Designator Description Part Number Manufacturer
1 U2 Single 2-Input Positive-AND Gate,
DBV0005A (SOT-23-5) SN74AHC1G08DBVR Texas Instruments
2 U4, U5 Low-Noise 1 A, 420 kHz Transformer
Driver, DBV0006A (SOT-23-6) SN6505BDBVR Texas Instruments
0 D1 Diode, Ultrafast, 600 V, 1 A, SOD-123FL UFM15PL-TP Micro Commercial
Components
0 FID1, FID2, FID3 Fiducial mark. There is nothing to buy or
mount. N/A N/A
0 R2 RES, 20, 5%, 0.1 W, AEC-Q200 Grade 0,
0603 CRCW060320R0JNEA Vishay-Dale
0 R7 RES, 0, 5%, 1 W, AEC-Q200 Grade 0,
2512 CRCW25120000Z0EG Vishay-Dale
1 LBL1 Thermal Transfer Printable Labels,
0.650" W x 0.200" H - 10,000 per roll THT-14-423-10 Brady
Bill of Materials
www.ti.com
20 SNOU165A–September 2018–Revised March 2019
Submit Documentation Feedback
Copyright © 2018–2019, Texas Instruments Incorporated
Using the LMG341xEVM-018 half-bridge and LMG34XX-BB-EVM breakout
board EVM
Table 6. LMG34XX-BB-EVM List of Materials
Qty Designator Description Part Number Manufacturer
5 5V, 12V, HVIN, HVOUT,
VAUX Test Point, Compact, Red, TH 5005 Keystone
5 ACMGND, AGND1, AGND2,
PGND1, PGND2 Test Point, Compact, Black, TH 5006 Keystone
2 C1, C15 CAP, Film, 5 µF, 1000 V, +/- 5%, 0.016 ohm,
TH MKP1848S55010JP2C Vishay-Components
4 C2, C3, C16, C17 CAP, CERM, 0.1uF, 630V, +/-10%, X7R,
1812 GRM43DR72J104KW01L MuRata
5 C4, C6, C8, C9, C11 CAP, CERM, 1 µF, 25 V, +/- 10%, X7R,
0603 C1608X7R1E105K080AB TDK
2 C5, C13 CAP, CERM, 39 pF, 50 V, +/- 5%,
C0G/NP0, 0603 C1608C0G1H390J TDK
1 C14 CAP, CERM, 1000 pF, 25 V, +/- 5%,
C0G/NP0, 0603 GRM1885C1E102JA01D MuRata
2 C18, C20 CAP, CERM, 1 µF, 25 V, +/- 10%, X7R,
0603 GRM188R71E105KA12D MuRata
1 C19 CAP, TA, 33 µF, 16 V, +/- 10%, 0.35 ohm,
SMD TPSB336K016R0350 AVX
1 C21 CAP, CERM, 10 µF, 25 V, +/- 10%, X5R,
0805 GRM219R61E106KA12D MuRata
2 D1, D2 Diode, Schottky, 30 V, 0.2 A, SOD-323 BAT54WS-7-F Diodes Inc.
2 D3, D5 LED, Red, SMD LS L29K-G1J2-1-Z OSRAM
1 D4 LED, Green, SMD LG L29K-G2J1-24-Z OSRAM
6 H1, H2, H3, H4, H9, H10 Machine Screw, Round, #4-40 x 1/4, Nylon,
Philips panhead NY PMS 440 0025 PH B and F Fastener Supply
6 H5, H6, H7, H8, H11, H12 Standoff, Hex, 0.5"L #4-40 Nylon 1902C Keystone
2 J1, J5 Terminal Block, 2x1, 5.08mm, TH 282841-2 TE Connectivity
1 J2 Receptacle, 2.54mm, 6x1, Gold, TH 448120024 Molex
1 J3 Connector, TH, BNC 112404 Amphenol Connex
1 J4 Header, 100mil, 6x1, Gold, TH TSW-106-07-G-S Samtec
1 J6 Terminal Block, 2x1, 2.54mm, TH 282834-2 TE Connectivity
1 J7 Header, 100mil, 3x1, Gold, TH TSW-103-07-G-S Samtec
2 L1, L2 Inductor, Toroid, 150 µH, 7.5 A, 0.05 ohm,
TH 2300HT-151-H-RC Bourns
1 L3 Coupled inductor, 47 µH, 1.14 A, 0.241 ohm,
+/- 20%, SMD DRQ73-470-R Cooper Bussman
3 PGND, SW, VDC Pin Receptacle, .032-.046" .075" Dia, Gold,
TH 0312-0-15-15-34-27-10-0 Mill-Max
2 R1, R5 RES, 1.20 k, 1%, 0.1 W, 0603 RC0603FR-071K2L Yageo America
6 R2, R3, R4, R9, R21, R23 RES, 0, 5%, 0.1 W, 0603 CRCW06030000Z0EA Vishay-Dale
2 R6, R8 RES, 1.6 k, 5%, 0.1 W, 0603 CRCW06031K60JNEA Vishay-Dale
1 R7 RES, 10.0 k, 1%, 0.1 W, 0603 ERJ-3EKF1002V Panasonic
10 R10, R11, R12, R13, R14,
R16, R17, R18, R19, R20 RES, 30 k, 5%, 0.25 W, 1206 CRCW120630K0JNEA Vishay-Dale
1 SH-J1 Shunt, 100mil, Gold plated, Black 969102-0000-DA 3M
2 U1, U3 Dual Schmitt-Trigger Inverter, DCK0006A SN74LVC2G14DCKR Texas Instruments
1 U2 DUAL 2-INPUT POSITIVE-AND GATE,
DCT0008A SN74LVC2G08IDCTRQ1 Texas Instruments
1 U4 1A Low Dropout Regulator, 4-pin SOT-223,
Pb-Free LM2940IMP-5.0/NOPB Texas Instruments
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