Texas Microsystems, Inc. P5000HX Series User manual

User’s Manual
Model P5000HX Series CPU
22875A
June 5, 1996
© Texas Microsystems
All Rights Reserved
Printed in USA

2 Model P5000HX Series CPU User’s Manual
Limited Warranty
(a)Texas Microsystems warrants that the goods sold by it hereunder will be free from
defects in materials or workmanship, under normal use and service, for a period of
two years from date of shipment. Said goods will meet the specifications in effect
at the time of manufacture. Texas Microsystems’ sole obligation under this warranty
shall be, at its option, to repair or replace, without charge, any defective component
part of such product, within a reasonable time period.
(b)Texas Microsystems shall not be liable under this warranty for (i) the goods that
Buyer alleges are defective and have been repaired or altered by someone other than
Texas Microsystems’ designated personnel or authorized representative, unless such
repair or alteration was effected pursuant to prior written approval of Texas
Microsystems, or (ii) where the Buyer fails to notify Texas Microsystems of any
alleged defect within the period of warranty, or (iii) where the Buyer fails to return
defective item to Texas Microsystems, in Houston, Texas, freight prepaid or (iv) where
equipment has been altered or damaged in any way which Texas Microsystems
reasonably determines to personally affect the performance and reliability, or where
the equipment has been subject to misuse, neglect or accident. The rights and
remedies granted to Buyer under this paragraph constitute Buyer’s sole and exclusive
remedy against Texas Microsystems, its officers, agents and employees for negligence,
inexcusable delay, breach of warranty, express or implied, or for any default
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eliminate any errors.
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Every effort has been made to ensure that the information provided in this manual is
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errors that may be contained in this document. Texas Microsystems makes no promise
to update or keep current the information contained in this document. Information in
this document, including product specifications, is subject to change without notice.

Model P5000HX Series CPU User’s Manual 3
Notice
This equipment has been tested and found to comply with the limits for a Class A
digital device pursuant to Part 15 of the FCC Rules. These limits are designed to
provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment. This equipment generates, uses, and can
radiate radio frequency energy and, if not installed and used in accordance with the
instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful
interference, in which case the user will be required to correct the interference at the
user’s own expense.
This device complies with Part 15 of the FCC Rules. Operation is subject to the
following two conditions: (1) This device may not cause harmful interference, and (2)
this device must accept any interference received, including interference that may
cause undesired operation.
Changes or modifications not expressly approved by Texas
Microsystems could void the product warranty and the user’s
authority to operate the equipment.
This product also meets requirements for compliance with EN55022, Class B ITE.
All tradenames referenced are the service mark, trademark or registered trademark of the respective manufacturer.

4Model P5000HX Series CPU User’s Manual
CHAPTER 1 Introduction to the P5000HX Series
CPU 5
1.1 P5000HX Features 6
1.2 A PCI Discussion 8
CHAPTER 2 7 Steps to P5000HX Operation 11
2.1 Handling the P5000HX 12
2.2 Step 1 - Check Jumper Block Settings 14
2.3 Step 2 - Check Switch Settings 16
2.4 Step 3 - Connect Peripherals to Headers 18
2.5 Step 4 - Install the Board 26
2.6 Step 5 - Attach Peripherals to Connectors 28
2.7 Step 6 - Power-up the System 30
2.8 Step 7 - Run the Setup Utility 32
CHAPTER 3 P5000HX Service and Support 47
3.1 Installing Memory 48
3.2 General Maintenance 50
3.3 Customer Support 52
CHAPTER 4 Technical Data 55
4.1 Specifications 56
4.2 Connector Pinouts 58
4.3 Component Descriptions 66
Table of Contents

Model P5000HX Series CPU User’s Manual 5
CHAPTER 1 Introduction to the
P5000HX Series
CPU
Thank you for purchasing Texas Micro’s P5000HX Series
CPU. This chapter:
•introduces the primary features of the
P5000HX, and
•discusses the PCI backplane and PICMG.
If you wish to configure and install your P5000HX quickly
and you are familiar with P5000HX features and PCI con-
cepts, go directly to Chapter 2, then read this chapter at
your convenience.
1

Introduction to the P5000HX Series CPU
6 Model P5000HX Series CPU User’s Manual
1.1 P5000HX Features
The P5000HX The Texas Micro P5000HX:
•provides a 100/133/166/200 MHz, 64-bit
Pentium P54C processor,
•contains on-board PCI peripheral devices such
as SCSI and EIDE, and
•features 512 KByte flash memory and a CELP
socket for optional high-speed pipelined burst
SRAM modules (up to 512 KBytes).
Additional features
include... •Support for up to 256 MByte scaleable FPM DRAM (chip set allows ECC using standard
SIMMs),
•One RS-232 serial port, one programmable
RS-232/422/485 serial port,
•a multi-function enhanced IEEE 1284 parallel
port,
•a floppy disk controller,
•an EIDE hard disk controller , and
•a PCI Bus-to-Fast and Wide SCSI Controller.

P5000HX Features
Model P5000HX Series CPU User’s Manual 7
FIGURE 1 P5000HX components

Introduction to the P5000HX Series CPU
8 Model P5000HX Series CPU User’s Manual
1.2 A PCI Discussion
Overview The P5000HX is designed to be used with either an ISA or
a PCI backplane. This section discusses the PCI Local Bus.
The PCI Local Bus The PCI Local Bus is a high-performance, 133 MB/sec,
32-bit bus with multiplexed address and data lines. It is
intended for use as an interconnect mechanism between
highly-integrated peripheral controller components, add-
in boards, and processor/memory systems.
Why the PCI Local
Bus? Graphics-oriented operating systems such as Windows and OS/2 have created a data bottleneck between the pro-
cessor and its display peripherals in standard PC I/O
architectures. Moving peripheral functions with high-
bandwidth requirements closer to the system’s processor
bus can eliminate this bottleneck.
Substantial performance gains are seen with graphical
user interfaces (GUI’s) and other high-bandwidth func-
tions (i.e., full-motion video, SCSI, LANs, etc.) when a
“local bus” design is used.
The PCI Bridge The processor/cache/memory subsystem in a PCI system is
connected to PCI through a “PCI Bridge.” This bridge pro-
vides a low-latency path through which the processor may
directly access PCI devices mapped anywhere in the mem-
ory or I/O address spaces. It also provides a high-band-
width path, allowing PCI masters direct access to main
memory.
PICMG Texas Microsystems is a founding member of the PICMG
(PCI Industrial Computer Manufacturers Group), founded
to develop standards for PCI-based passive backplane sys-
tems. The P5000HX is fully PICMG-compliant.

A PCI Discussion
Model P5000HX Series CPU User’s Manual 9
FIGURE 2 A sample PCI backplane (Texas Micro’s 18-slot version)

Introduction to the P5000HX Series CPU
10 Model P5000HX Series CPU User’s Manual
This chapter covered...
•P5000HX features
•basic P5000HX components
•the PCI Local Bus and Bridge
•PICMG
Next...
The next chapter outlines the seven basic steps for
P5000HX configuration and installation.

Model P5000HX Series CPU User’s Manual 11
CHAPTER 2 7 Steps to
P5000HX
Operation
This chapter provides some basic precautions for handling
the P5000HX, then outlines the seven basic steps for con-
figuring and installing the P5000HX Series CPU:
1. Check jumper settings,
2. Check switch settings,
3. Connect peripherals to headers,
4. Install the board,
5. Attach peripherals to connectors,
6. Power-up the system, and
7. Run the Setup Utility.
2

7 Steps to P5000HX Operation
12 Model P5000HX Series CPU User’s Manual
2.1 Handling the P5000HX
Overview This section provides basic precautions for handling the
P5000HX CPU.
Static electricity The P5000HX features ESD (electro-static discharge) and
over-voltage protection circuitry built into the board’s
design to protect the I/O ports. However, excessive static
electricity can damage P5000HX components.
Use the provided grounding wrist strap to discharge static
electricity before you handle the board. Instructions for
using the wrist strap are printed on the strap envelope.
Always handle the board by the edges to help eliminate
accidental static damage.
Safety considerations It is important to protect yourself and your equipment
before you perform any of the following procedures.Never
touch the P5000HX while it is installed in the chas-
sis and power is ON.
You should check the P5000HX configuration before you
install the board. However, if the P5000HX is already
installed in your system, remove power by turning all
power switches OFF and disconnecting all power cords
from their power sources. Follow all safety precautions
outlined by the chassis manufacturer.
Only qualified, experienced electronics personnel should
access the unit’s interior.
Next... Before you install the P5000HX, check the jumper and
DIP switch settings outlined in Section 2.2 and
Section 2.3, respectively. Pay particular attention to the
switch settings; the jumpers are preconfigured at the fac-
tory and are appropriate for most applications.

Handling the P5000HX
Model P5000HX Series CPU User’s Manual 13
FIGURE 3 Handling the P5000HX

7 Steps to P5000HX Operation
14 Model P5000HX Series CPU User’s Manual
2.2 Step 1 - Check Jumper Block Settings
Overview The first step in configuring the P5000HX is checking the
jumper settings on the board.
What are jumpers? Jumpers are small metal “bridges” that connect pins in a
jumper block on a CPU board. The position of a jumper
affects the board’s operational parameters.
Jumper blocks The P5000HX contains:
•five (5) three-pin jumper blocks (JP2, JP3, JP4,
JP5 and JP7), and
•two 2) two-pin jumper blocks (JP6 and JP8).
Settings Settings for these jumper block are provided in the
following tables.
JP2, JP3, JP5
Pin 2 jumpered to Pin 3 RS232 configuration (default)
Pin 1 jumpered to Pin 2 RS422/485 configuration
JP4
Pin 1 jumpered to Pin 2 Watchdog timer reset active
enabled
Pin 2 jumpered to Pin 3 Watchdog timer reset inactive
(default)
JP7
Pin 1 jumpered to Pin 2 When running Next Step OS and
experiencing operational prob-
lems with the PS/2 mouse, use
this setting.
Pin 2 jumpered to Pin 3 Normal operation (default).
3-pin Jumper Block Configuration
UART 2 Configuration
Next Step OS Configuration
Watchdog Timer

Step 1 - Check Jumper Block Settings
Model P5000HX Series CPU User’s Manual 15
FIGURE 4 Jumper Block locations
Note: Only experienced personnel should change these
jumper settings. The P5000HX is very sensitive to static
discharge and can be damaged if precautions are not
taken. See Section 2.1 on page 12 for more information.
JP6 jumper
installed? JP8 jumper installed? Bus Core Frequency Ratio Bus/Processor Speed
Yes Yes 2/5 66/166
Yes No 1/3 66/200
No Yes 1/2 66/133 (default)
No No 2/3 66/100
Bus/Processor Speed Table

7 Steps to P5000HX Operation
16 Model P5000HX Series CPU User’s Manual
2.3 Step 2 - Check Switch Settings
Overview After you check the jumper settings, check the switch block for
proper configuration.
Switch block The switch block (see Figure 5) contains four (4) DIP switches
that can be configured to affect the following:
•default monitor type (SW1-1),
•on-board ROM access (SW1-2),
•CMOS RAM (SW1-3), and
•configuration ports (SW1-4).
Settings Settings for the switches are provided below.
Switch Setting Result
SW1-1 Open Monochrome monitor position
Closed (default) Color monitor position
SW1-2 Open (default) Flash memory is enabled; auxiliary
ROM is disabled
Closed Auxiliary ROM is enabled; Flash memory
is disabled.
SW1-3 Open (default) Normal operation of the CMOS RAM
Closed Used is special cases when the CMOS
RAM becomes corrupted. When this
switch is CLOSED, the factory default val-
ues for the Setup Utility are reloaded into
CMOS RAM.
SW1-4 Open (default) Configuration ports are mapped to I/O
addresses 270/271. Under normal con-
ditions, this switch should remain
open.
Closed Configuration ports are mapped to I/O
addresses 370/371.

Step 2 - Check Switch Settings
Model P5000HX Series CPU User’s Manual 17
FIGURE 5 Switch block location
Note: The P5000HX is very sensitive to static discharge
and can be damaged if precautions are not taken. See
Section 2.1 on page 12 for more information.

7 Steps to P5000HX Operation
18 Model P5000HX Series CPU User’s Manual
2.4 Step 3 - Connect Peripherals to Headers
Overview The next step in installing your P5000HX is connecting
peripherals to the on-board headers.
Headers Headers are peripheral connectors located on the board’s
surface (as opposed to connectors, which are located on the
I/O bracket, and are discussed in Section 2.6 on page 28).
The P5000HX features the following headers for peripheral
connection:
•a PCI-Bus-to-Fast and Wide SCSI controller,
•an EIDE drive header,
•an IDE/SCSI drive LED header,
•a floppy drive header,
•a serial port header (Serial Port 2),
•an AT-style keyboard header, and
•a PS/2 mouse header.
Descriptions Descriptions of each of these headers are provided on page 20
through page 24.

Step 3 - Connect Peripherals to Headers
Model P5000HX Series CPU User’s Manual 19
FIGURE 6 P5000HX header locations
Note: The P5000HX is very sensitive to static discharge
and can be damaged if precautions are not taken. See
Section 2.1 on page 12 for more information.

7 Steps to P5000HX Operation
20 Model P5000HX Series CPU User’s Manual
Step 3 (cont.) - Connect Peripherals to Headers
Wide SCSI Drive
Header Up to seven (7) Small Computer System Interface (SCSI) hard disk drives can be attached to the P5000HX via this header
and a 68-conductor cable. SCSI devices are daisy-chained via
this cable, and both ends of the cable are terminated. Termina-
tors can be connected to either SCSI devices or SCSI cables.
Devices connected to these chains must contain the correct
number of terminators for proper operation. No more than two
(2) terminators can exist in a chain of SCSI devices - one at
each end of the physical chain.
If more than two SCSI devices are connected in a SCSI daisy-
chain, the termination must be removed from the middle
device(s) in the control cable.
EIDE Drive Header Two (2) Integrated Device Electronics (EIDE - backwards-com-
patible with IDE) hard disk drives can be attached to the
P5000HX board via this header and a 40-conductor cable.
Note: The “red stripe” on the 40-pin cable should be near Pins 1
and 2 on the 40-pin connector. The IDE hard drive(s) will not
work correctly if the cable is plugged in backwards.
IDE/SCSI Drive
LED Header This header provides an interface for the IDE/SCSI drive’s activity LED cable. Pin 1 is the anode; Pin 2 is the cathode.