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Vector Graphic Prom Ram III User manual

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IilAnUAL
PRO'1/RAM
III
BOARD
Revision
1
and
PRCM
PROORAMMING
PR(X;RAM
Revision
1
USERS
MANUAL
Revision
B
June
13,
1980
Copyright
1980
vector
Graphic
Inc.
Copyright
1980
by
vector
Graphic
Inc.
All
rights
reserved.
Disclaimer
Vector
Graphic
makes
no
representations
or
warranties
with
respect
to
the
contents
of
this
manual
itself,
even
if
the
product
it
describes
is
covered
by
a
warranty
or
repair
agreement.
Further,
Vector
Graphic
reserves
the
right
to
revise
this
publication
and
to
make
changes
from
time
to
time
in
the
content
hereof
without
obligation
of
Vector
Graphic
to
notify
any
person
of
such
revision
or
changes,
except
when
an
agreement
to
the
contrary
exists.
Revision
Numbers
The
date
and
reVlSlon
of
each
page
herein
appears
at
the
bottom
of
each
page.
The
revision
letter
such
as
A
or
B
changes
if
the
manual
has
been
improved
but
the
product
itself
has
not
been
significantly
modified.
The
date
and
revision
on
the
Title
Page
corresponds
to
that
of
the
page
most
recently
revised.
When
the
product
itself
is
moclified
significantly,
the
product
will
get
anew
revision
number,
as
shown
on
the
manual's
title
page,
and
the
manual
will
revert
to
revision
A,
as
if
it
were
treating
a
brand
new
product.
THIS
MANUAL
SHOULD
ONLY
BE
USED
WITH
THE
PROOUcr(S) IDENTIFIED
ON
THE TITLE PAGE.
Rev.
l-l-B
6/13/80
PRCM/RAM
III
Board Users Manual
REPAIR
AGREEMENT
The
PROM
RAM
III
Board
sold
hereunder
is
sold
"as
is",
with
all
faults
and
without
any
warranty,
either
expressed
or
implied,
including
any
implied
warranty
of
fitness
for
intended
use
or
merchantability.
However,
the
above
notwithstanding,
VECTOR
GRAPHIC,
INC.,
will,
for
a
period
of
ninety
(90)
days
following
delivery
to
customer,
repair
or
replace
any
PROM
RAM
III
Board
that
is
found
to
contain
defects
in
materials
or
workmanship,
provided:
1.
Such
defect
in
material
or
\\Qrkrnanship
existed
at
the
time
the
PROM
RAM
III
Board
left
the
VECTOR
GRAPHIC,
INC.,
factory;
2.
VECTOR
GRAPHIC,
INC.,
is
given
notice
of
the
precise
defect
claimed
within
ten
(10) days
after
its
discovery;
3.
The
PROM
RAM
III
Board
is
pranptly
returned
to
VECTOR
GRAPHIC,
INC.,
at
customer
Is
expense,
for
examination
by
VECTOR
GRAPHIC,
INC.,
to
confirm
the
alleged
defect,
and
for
subsequent
repair
or
replacement
if
found
to
be
in
order.
Repair,
replacement
or
correction
of
any
defects
in
material
or
\\Qrkmanship
which
are
discovered
after
expiration
of
the
period
set
forth
above
will
be
performed by
VECTOR
GRAPHIC,
INC.,
at
Buyer's
expense,
provided
the
PROM
RAM
III
Board
is
returned,
also
at
Buyer's
expense,
to
VECTOR
GRAPHIC,
INC.,
for
such
repair,
replacement
or
correction.
In
performing
any
repair,
replacement
or
correction
after
expiration
of
the
period
set
forth
above,
Buyer
will
be charged
in
addition
to
the
cost
of
parts
the
then-current
VECTOR
GRAPHIC,
INC.,
repair
rate.
At
the
present
time
the
applicable
rate
is
$35.00
for
the
first
hour,
and
$18.00
per
hour
for
every
hour
of
work
required
thereafter.
Prior
to
commencing
any
repair,
replacement
or
correction
of
defects
in
material
or
\\Qrkrnanship
discovered
after
expiration
of
the
period
for
no-cost-to-Buyer
repairs,
VECTOR
GRAPHIC,
INC.,
will
submit
to
Buyer
a
written
estimate
of
the
expected
charges,
and
VECTOR
GRAPHIC,
INC.,
will
not
commence
repair
until
such
time
as
the
written
estimate
of
charges
has
been
returned
by
Buyer
to
VECTOR
GRAPHIC,
INC.,
signed
by
duly
authorized
representative
authorizing
VECTOR
GRAPHIC,
INC.,
to
camnence
with
the
repair
v,ork
involved.
VECTOR
GRAPHIC,
INC.,
shall
have
no
obligation
to
repair,
replace
or
correct
any
PROM
RAM
III
Board
until
the
written
estimate
has
been
returned
with
approval
to
proceed,
and
VECTOR
GRAPHIC,
INC.,
may
at
its
option
also
require
prepayment
of
the
estimated
repair
charges
prior
to
camnencing work.
Repair
Agreement
void
if
the
enclosed
card
is
not
returned
to
VECTOR
GRAPHIC,
INC.
within
ten
(10) days
of
end consumer
purchase.
Rev.
I-l-B
6/13/80
PRCM/RAM
III
Board Users Manual
Rev.
1-1-B
6/13/80
PROM/RAM
III
Board
Users
Manual
TABLE
OF
CONl'ENl'S
Section
Repair
Agreement
Table
of
Contents
I.
Introduction
1.1
1.2
Specifications.
l1li
II.
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1-1
Description
of
the
PROM/RAM
III
Board
•••••••••••••••••••••••••
1-3
II.
Users
Guide
and Use.,. III 0 "
It
•
CI
flI
""
Q
'"
.e
'" •
~
III
••
"
~
D
.2-1
Block
Swap
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oft
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0
ft
ofl
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fI)
~
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IJ!I
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•••••
III
11/1
2-10
Disable
Power-on/Reset
Response
•••••••••••••••••••••••••••••••
2-l0
RAM
Ill
..
Ill e
·0
,.
III
••
0 • e
..
l!I I!I
..,.
til
'"
,.
It
2-1
PROM
Selection
Block Aand Block B -
General
••••••
~A.o
•••••••••••••••••••••••
2-2
Block.
Ae
•
It It
eIII III III
lJIo
1.1)
el!'l l!I I!Il
••
!II a
III
•••
Il!l
2-3
Block B.
III
..
ill
0III 0
II
,.
oe
0
<III
lit
..
'"
III
2-
3
Figures
2&3 - Examples
of
Block B
Configurations
••••••••••••
2-5
Block
Select
Addressing
•••••••••••••••••••••••••••••••••••••••
2-6
PROM/Scratchpad
Memory
Invert
•••••••••••••••••••••••••••••••••
2-6
RAM
Memory
Address
Select
in
Block B
••••••••••••••••••••••••••
2-7
Disable
3K
of
Address Space
in
Block B
••••••••••••••••••••••••
2-7
2.10
Power-on/Reset
Jump
-
Description
•••••••••••••••••••••••••••••
2-8
2.11
Use
PRESET
or
POC
for
Power-on/Reset
Jump
•••••••••••••••••••••
2-8
2.12
Phantom
Generated
if
Power-on/Reset
•••••••••••••••••••••••••••
2-9
2.13
Jump
to
PROM/RAM
III
Board
if
Power-on/Reset
••••••••••••••••••
2-9
2.14
2.15
2.16
.MWR.ITE
eo
l1li
l!'l
..
" " II
'"
tll
III
e"
1111
•••
"'
'"
2-10
2.17
Wait
State
Generation
•••••••
o
••••••
ee.o.~~.o
••••
o
•••••••••••••
2-11
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
Tables
1,
2,
and 3
•••••••
*
••••••
tI:\I
••
ee
".II'I
••••••••••••••••
2-12
2.18
Programming a
PROM
-Normal
Procedure
•••••••••••••••••••••••••
2-l3
2.19
Writing
a
PROM
Programming Program
••••••••••••••••••••••••••••
2-l6
2.20
Re-assembling
the
PROM
Programming Program
••••••••••••••••••••
2-l7
2.21
PROM
Programming Program
Listing
•••••••••••••••••••••••
2-l8
-2-24
III.
Theory
of
Operation
3.1
Addressing
ell
II
•III • " • III III III
'Il
II
eo
'"
•••
fl)
"
•••
11/1
••
II1II
•••••••
e
•••.•
3-1
3.2
ra.ta
Input/OUtput
••
'
II
I(l
•
'"
III
I!lI
e
II
oS
'"
lit
•••••••
It
•••
.:
3-2
3.3
Control
Signals
... "
••••••••••••••••••
"'lIllill
•••
ft
••••••••••••••••••••
3-2
3
..
4
PRCl'1.
Pr<:lSJramming
II
•••••
III
CIt
III
III
8
fl
..,.
1/11
l'I'
..
III
..
III
3-3
3.4
J?c)~r
Supplies
it
III @
It."
«I III
'"
"".
'"
•
~
-@
lit
3-4
Rev.
l-l-B
6/13/80
J.V.
PROM/RAM
III
Board
Users
Manual
Schematics
J3c)ard
r.a.you
t"
•
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•
..
s
,.
"
~
"oil
..
0
l'
'"
e
'"
..
/II
.,
l!I I!l e _
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""
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•
II
..
" " • " " •
4-1
Schematic
Errata.
'"
""0"
III
4'lI
'"
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"e.. e..
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l1li
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•
4-2
Schern.atic" «Il " "
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•••
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••
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••
!III
'"
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0&
""
..
'"
4-3
Rev. 1-1-B 6/13/80
PRCM/RAM
III
Board
Users
Manual
Rev.
I-l-B
6/13/80
PRCM/RAM
III
Board Users Manual
I.
INrROOOcrION
1.1
SPECIFICATIONS
Bus
Compatibility
Memory
Capacity
PRCMProgramming
PRCM
Programming Program
PRCMs
Included
with
Board
Memory
Speed
Memory
Types
Board Addressing
Addressing Options (jumper)
Standard
Addressing
Standard
Location
of
Systems Monitor
PRCM
(continued
on back)
Rev.
l-l-B
6/13/80
S-lOO
RAM:
lK,
included
with
the
board
PRCM:
Sockets
for
12
PRCMs.
Can
program 2708
or
2704
EPROMs
Listing
included
in
manual
Executable
version
on
MCOS
System
Diskettes
8.4
and
later.
NONE
RAM:
300
ns.
PRCM:
User
selected
(450
ns.
typ)
RAM:
2114
static
PROM:
2708
(lK each)
or
2704 (1/2K each)
Two
blocks
(A
and
B)
are
separately
addressed
Block A
has
8
PRCM
sockets
Block B
has
4
PRCM
sockets
and
lK
RAM
Base
address
of
the
two
8K
blocks
Block B
PRCM
at
top
or
bottom
of
block
Address
of
lK
RAM
within
remaining
4K
Disable
unused
3K,
for
use by
other
boards
Block
A:
disabled
Block B
base
address:
EOOOH
Block B
PRCMs:
EOOOH
-
EFFFH
Block B
RAM:
FCOOH
-
FFFFH
Block B
disabled
3K:
FOOOH
-
FBFFH
EOOOH
1-1
Power-on/Reset
Jump
Power-on/Reset
JlllTlP
Options.
(jrnnper)
Standard
Power-onjReset
Jrnnpers
MWRITE
Wait
state
generation
Bus
load
Card
extractors
Power
1-2
PRCM/RAM
III
Board
Users
Manual
PRESET
or
POC
causes
jump
to
board
Use
PRESET
or
POC
Jump
to
first
instruction
of
Block A
or
B.
Disable
phantom
generation
Disable
jump
to
on-board
memory
POC
is
used
Jump
to
beginning
of
Block B
Phantom and j
lllTlP
to
on-board
both
enabled
Jumper
option
to
generate
MWRITE
on
board
Standard:
option
not
enabled
Jumper
option
to
generate
one
wait
state
each
time
board
is
addressed
Standard:
option
not
enabled
1
Tl'L
load
on
all
inputs
Standard
+8Vdc
@450
rnA
(Typ)
+18Vdc
@(depends on
quantity
of
PI01)
-18Vdc @(depends
on
quantity
of
PRCM)
Rev.
1-1-B
6/13/80
PRCM/RAM
III
Board
Users
Manual
....
2
DESCRIPI'ION
OF THE
PRCM
RAM
III
BOARD
Vector
Graphic's
PROM
RAM
III
Board
is
a
versatile,
S-lOO
bus
compatible,
high
density
meI1Dry
board
combining
the
memory
technologies
of
erasable
programmable
read
only
memories (EPRCMs)
and
high
speed
random
access
memory
(RAM)
•Of
unique
value,
one
of
the
PRrn
sockets
on
the
board
can
be
used
to
program
a
2708
or
2704
EPROM,
enabling
any
owner
to
create
PROM-based
software
for
use
on
this
board
or
in
any
other
microprocessor
device.
lK
of
RAM
is
provided
on
the
board,
but
no
PRCMs
are
included
with
purchase.
The
software
which
is
used
to
program
PROMs
is
provided
as
a
listing
in
this
manual,
and
is
included
on
disk
with
all
Vector
Graphic
systems
shipPed
with
this
board.
By
combining
the
use
of
MSI
decoding
logic
and
unique
addressing
features,
a
wide
range
of
applications
requirements
may
be
met
by
this
memory
board.
The
addressing
flexibility
is
as
follows.
The
board
offers
two
independently
addressable
8K
blocks
of
memory
(A
and
B).
You
use
jumpers
to
specify
the
two
separate
8K
addressing
spaces
assigned
to
these
blocks.
Block
A
can
be
used
for
up
to
8K
of
PRrn.
Block
B
contains
lK
of
on-board
RAM
plus
up
to
4K
of
PRrn.
For
block
B,
you
use
jumpers
to
specify
whether
the
PROM
is
at
the
top
or
the
bottom
of
the
8K
allocation,
and
then,
within
the
remaining
4K,
where
the
lK
of
RAM
is
addressed.
Once
this
is
done,
there
are
also
jumper
options
for
DISABLING some
or
all
of
the
remaining
3K
of
addressing
space
allocated
to
block
B,
so
that
other
boards
in
the
system
can
use
those
addresses.
The
addressing
spaces
are
fully
utilized
if
2708
1K
PRCMs
are
used.
If
2704
1/2K
PROMs
are
used,
then
every
other
1/2K
of
PRCM
allocation
will
be
used,
with
1/2K
gaps
between.
Other
features
offered
by
the
board
are:
jump
on
power-on
or
reset
to
on-board
memory,
with
phantom
generated
to
temporarily
disable
other
memory
boards,
and a
jumper
option
to
use
PRESET
instead
of
POC
to
cause
this
jump;
jumper
option
for
on-board
generation
of
the
S-lOO
MWRITE
signal;
and a
jumper
option
to
generate
a
one-cycle
wait-state
each
time
the
board
is
addressed.
Full
buffering
of
all
inputs
and
outputs
is
provided
to
minimize
loading
of
the
system
S-lOO
bus
to
at
most
one
'ITL
load.
on-board
p:Jwer
regulation
and
filtering
is
provided
using
Ie
regulators
and
heat
sinks
for
power
dissipation.
careful
attention
to
gocx:1
design
practice
and
an
awareness
of
the
need
for
flexibility
has
resulted
in
a
reliable
board
useful
in
a
wide
variety
of
systems
and
applications.
Rev.
l-l-B
6/13/80
1-3
1-4
PRCM/RAM
III
Board
Users
Manual
Rev.
I-l-B
6/13/80
PRCM/RAM
III
Board Users Manual
II.
USERS
GUIDE
This
Users
Guide
begins
with
a
description
of
the
amount and
kind
of
PRCM
which
can
be
used
on
this
board,
followed
by a
description
of
the
RAM
included
with
the
board,
then
a'
detailed
description
of
the
various
options
you have
for
addressing
the
PROMs
and
the
RAM.
Read
it
before
attempting
to
re-jumper
the
board
addressing.
Following
this
section
are
a
description
of
each
of
the
jumper
options
possible
on
the
board,
including
addressing
options,
po~r-on/reset
jump,
MWRITE
input,
and
wait
state
generation.
The
diagrams
of
jumper pads
show
each
of
the
pads
as
it
is
pre-jumpered
at
the
factory.
The
guide
ends
with
instructions
for
operating
the
PROM
prograrraning
software
provided
with
the
board,
as
well
as
instructions
for
writing
your
own
if
desired.
The
listing
of
the
program
is
provided.
2.1
PRCM
SELECI'ION
AND
USE
A
maximum
of
12K
bytes
(where K=1024)
of
2708
tyPe
PROMs
may
be
installed
in
available
sockets
on
the
board.
NO
PRCMS
ARE
INCLUDED
WITH
PURCHASE
OF
THE
BOARD
ALONE.
Jumpers
are
used
to
determine
where
the
PROMs
are
addressed.
The
following
discussion
assumes
that
2708
type
PROMs
(having
lK
·of
8-bit
bytes
each)
are
used.
If
2704
PROMs
(having 1/2K
bytes
each)
are
used,
the
issues
are
the
same~
the
only
difference
is
that
wherever a
2704
PROM
is
used,
there
will
be 1/2K
bytes
of
PRCM
accessible
by
the
system,
followed
immediately by a1/2K gap which
will
not
contain
any
memory
at
all.
The numbers 2708
and
2704
are
Intel
generic
part
numbers.
Many
other
manufacturers
make
equivalents,
with
2708
or
2704
as
part
of
their
proprietary
part
number.
All
2708
or
2704
pin
for
pin
equivalents
can
be
used on
this
board.
2.2
RAM
In
addition
to
the
PROM
sockets,
there
is
lK
of
static
RAM
on
the
board,
which IS
included
with
purchase
of
the
board
alone.
Jumpers
are
used
to
detennine
where
this
lK
of
RAM
is
addressed.
Rev.
I-l-B
6/13/80
2-1
PRCM/RAM
III
Board
Users
Manual
2.3
BLOCK
A
AND
BICCK B -
GENERAL
TO
begin
specifying
the
addresses
for
the
meIOC>ry,
there
are
tv.o
separately
addressable
blocks
of
memory
space
available
on
the
board,
called
blocks
A
and
B.
Jumpers
are
used
to
specify
what
the
base
address
is
for
each
of
these
bNo
blocks,
within
a64K
total
memory
space.
Alternately,
one
(or
both)
blocks
can
be
disabled
canpletely.
Jumper
area
F
is
normally
used
to
specify
the
base
address
of
(or
disable)
block
A
and
jumper
area
E
is
normally
used
to
specify
the
base
address
of
(or
disable)
block
B.
If
a
block
is
not
disabled,
then
that
block
will
occupy
exactly
8K
bytes
of
memory,
beginning
at
its
base
address.
This
is
true
for
both
blocks,
as
shown
in
Figure
1.
B'lock
B
FIGURE
1
......
--
...
At2000H
Bloc'k
A
Start
i
ng
A
ddre:ss
B
~:=::~--1
Starting
Address
A
Note
that
both
blocks
together
occupy
16K
of
men:ory.
However,
there
are
only
12
sockets
for
PRCMs,
and
only
lK
of
RAM
on
the
board,
totalling
13K.
What
happens
if
the
processor
addresses
rnerrory
in
the
remaining
3K
portion?
This
memory
space
is
NO!'
necessarily
empty. A
set
of
jumpers
is
provided
which
in
effect
spec'ify
that
the
unused
3K,
within
the
16K,
is
not
on
the
PRCM
RAM
III
board
at
all,
and
therefore
may
be
used
on
other
boards.
It
must
be
e:nphasized
that
except
for
the
3K
specified
as
unused
by
jumper,
t..'1e
addresses
assigned
to
the
board
for
blocks
A
and
B
cannot
be
used
by
any
other
board,
even
if
some
of
the
PROM
sockets
are
left
empty.
However,
remember
that
you
may
choose
not
to
use
one
(or
both)
of
the
blocks
at
all,
by
disabling
it
completely
in
jumper
areas
Eand
F.
If
you
do
this,
then
the
corres};X)nding memory
space
CAN
be
ass
igned
to
another
board,
and
no
space
is
was
ted.
2-2
Rev.
l-l-B
6/13/80
PRCM/RAM
III
Board
Users
Manual
If
the
jumpers
in
area
G
are
switched
from
the
way
the
board
is
normally
shipped,
then
the
base
address
of
block
A
will
be
controlled
by
jumper
area
E
and
the
base
address
of
block
B
will
controlled
by
jumper
area
F,
ins
tead
of
the
other
way
around.
If
this
is
done,
then
the
address
which
is
accessed
for
power-on
jump
will
also
be
switched,
becaning
the
first
address
in
block
A
instead
of
the
first
address
in
block
B.
This
is
the
pUrPOse
for
using
this
option.
(See
Section
2.14)
For
simplicity
of
language,
the
Users
Guide
is
written
assuming
that
jumper
area
G
is
left
as
manufactured.
2.4
Br..cx:::K
A
Block
A
refers
to
the
8
PROM
sockets
at
the
top
of
the
board
(labeled
a
through
7).
Insert
PROMs
which
you
want
in
block
A
into
these
sockets.
Socket
a
corresponds
to
the
IK
block
beginning
at
the
base
address
of
block
A.
Socket
1
corresponds
to
the
next
lK
and
so
on,
as
shown
in
the
following
table:
Hexadecimal
Address
Relative
to
Base
Address
("A" )
of
Block
A
A+
lCOOH
A+1800H
A+1400H
A+
lOOOH
A+
COOH
A+
800H
A+
400H
A
Socket
7
6
5
4
3
2
1
o
Jumper
area
F
is
normally
used
to
determine
the
base
address
of
block
A,
or
to
disable
block
A.
When
the
board
is
sold,
jumper
area
F
is
pre-wired
to
disable
block
A.
No
particular
base
address
is
thus
specified
until
you
install
the
jumpers.
2.5
Br..cx:::K
B
Block
B
includes
the
lower
four
PRCM
sockets
on
the
board,
labeled
8
through
11.
The
other
4K
in
block
B
is
filled
with
the
lK
of
RAM
on
the
board,
plus
the
3K
of
address
space
which
can
be,
at
you
discretion,
returned
for
use
by
Rev.
I-l-B
6/13/80
2-3
I
PRCM/RAM
III
Board
Users
Manual
other
boards.
The way you
specify
the
address
spaces
wi
thin
block
B
is
as
follows:
First,
you
specify
the
base
address
of
Block
B
using
jumper
area
E
(or
you
specify
in
area
E
that
the
block
is
disabled).
If
it
is
not
disabled,
then
you
use
jumper
area
J
to
specify
whether
the
4K
of
PROM
occupies
the
top
or
the
bottom
4K
of
the
block.
These
are
the
only
two
choices.
The
board
is
pre-jumpered
so
that
the
PROM
occupies
the
lower
4K.
Then,
you
specify
using
jumper
area
I
which
lK
within
the
other
4K
is
used
for
the
on-board
RAM.
Lastly,
you
specify
using
jumper
area
H
whether
one
of
more
of
the
last
three
lK
blocks
is
to
be
returned
for
use
by
other
boards.
(Normally
you
specify
that
all
three
of
them
are
returned.)
Two
typical
configurations
of
Block
B
are
shown
in
figures
2
and
3.
Figure
2
is
the
standard
-
the
one
for
which
the
board
is
pre-wired.
Since
in
the
pre-wired
version,
block
B
begins
at
EOOOH,
Figure
2
shows
that
the
standard
address
for
scratch-pad
RAM
is
FCOOH,
and
the
standard
address
for
the
System1s
Monitor
PROM(s)
is
EOOOH.
Figure
3shows
the
result
of
putting
the
PROM
in
the
upper
4K
and
specifying
that
the
RAM
occupy
the
second
lK
portion.
2-4
Rev.
l-l-B
6/13/80
;B
~
H
H
H
i
OJ
~
(1)
t"l
Ul
::::0
~
C)
-0
~
;;0
l--'
CJ
:;;-
[pnOM
FIGURE
3
EPROM
FIGURE
2
IStarling -
L
-Alhlress
n
I
"
••
r
.......
1
1-Bt2000"-1
.
I------:R::A~~~
---1'1
_B
t)CUUlt
..
........-
•
DISK
_
8'1800H
VIDEO
-
8·1408H
""i
VIDEO
\-8'1000H-1=
.
VIOEO
•'.
~
r
B'OCOOH-t-
VIDEO
~
_.
"
B'0800H-
/lAM
;;
8.0400H-1
DISK_
••
·r
,-
Cl
n::
<C
c:;)
co
I
c:;)
0::
CL
.-.-
-
CJ
l--'
I
l--'
J:,
~
l--'
~
o
f8
.<:
•
~
U1
2.6
BLOCK
SELECl'
ADDRESSING
DISABLE
Jumper
areas:
E & F
PRCM/RAM
III
Board
Users
Manual
8A3'O
A15
oA
14
0 0
DISA8LE
BA2
0
A14
°A130
SAl
0
A13
Jumper names:
Al3,
AD,
Al4,
Al4, Al5,
Al5
:=
address
lines
BAl,
BA2,
BA3
:=
block
B
address
pads
BB1,
BB2, BB3
:=
block
A
address
pads
NOTE:
The
second
letter
in
the
block
B
address
pads
is
"A",
while
the
second
letter
in
the
block
A
address
pads
is
"B".
This
occurs
because
historically,
the
pads
were
natred
before
it
was
decided
to
manufacture
the
board
with
the
"block
swap"
jumpers
in
area
G
reversed.
Function:
Address
lines
AI3,
Al4,
Al5
form
the
most
significant
bits
of
the
address
fran
the
cpu.
These
three
bits
can
select
any
of
8
possible
8K
blocks
of
mem::::>ry
in
a64K
mem:n::y
space..
See
table
1.,
Options:
Table
2
te.lls
you
what
jumpers
to
connect
to
specify
any
particular
8K
block
starting
address.
Jumper
area:
J
J~
Function:
'!be
pre-wired'connection
specifies
that
the
low
order
4k
bytes
of
block
B
consists
of
PRCM.
This
jumper
area
is
used
to
reverse
this,
putting
the
PRCM
at
the
high
end
of
block. B.
Options:
If
the
PROM
is
to
occupy
the
high
order
addresses
of
this
block
cut
the.
jumper
fran
6
to
7and
tie
6
to
8.
2-6
Rev.
I-l-B
6/13/80

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