Winradio WR-G65DDCe User guide

WiNRADiO®
WR-G65DDCe
Multichannel Coherent
Application Guide
Version 1.03

WR-G65DDCe Multichannel Coherent Application Guide
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Table of contents
1Introduction .................................................................................................................... 4
2Parts description of the coherent system........................................................................ 6
2.1 WR-G65DDCe connectors...................................................................................... 6
2.2 The WiNRADiO Coherence Clock & 1PPS Kit (WR-CC1PPS-210e)...................... 7
2.2.1.1 Coherent clock generator unit with 1PPS input............................................. 8
2.2.1.2 CLK OUT connectors for sampling clock output............................................ 9
2.2.1.3 Sampling clock oscillator input CLK IN.......................................................... 9
2.2.1.4 Sampling clock oscillator outputs LO OUT.................................................... 9
2.2.1.5 Frequency reference output REF OUT ........................................................10
2.2.1.6 Frequency reference input REF IN ..............................................................10
2.2.1.7 1PPS IN input..............................................................................................10
2.2.1.8 Digital synchronization output SYNC OUT...................................................11
2.2.1.9 LO OFF connector for disabling the sampling clock oscillator......................11
2.2.1.10 Power / Locked indicator..............................................................................12
2.2.1.11 Power input socket ......................................................................................13
2.2.2 SMA patch cables for coherent clock distribution and digital synchronization..14
2.2.3 Frequency reference SMA interconnect cable.................................................15
2.2.4 SMA terminators .............................................................................................15
2.2.5 SMA jumper cable and the factory pre-installed LO OUT to CLK IN
interconnection..............................................................................................................16
3Standard installation of up to eight receivers.................................................................18
3.1Connecting the sampling clock interconnection......................................................19
3.2 Connecting the SYNC interconnection ...................................................................21
3.3 Choosing the frequency reference..........................................................................23
3.4 Using the 1PPS signal............................................................................................24
3.5 Power up of the Coherent clock generator unit.......................................................25
3.6 Finishing the installation of the receivers................................................................25
4 Extended installation of up to sixteen receivers.................................................................26

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4.1 Connecting two Coherent clock generator units..........................................................26
4.2 Installation of receivers ...............................................................................................28
5 Extended topology configuration (ETC).............................................................................30
6 Technical specification ......................................................................................................32
7 Contacts............................................................................................................................33

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1 Introduction
The WiNRADiO WR-G65DDCe receiver optionally provides multichannel coherent operation.
A minimum of two and up to sixteen receivers can be coupled together for multichannel
operation. By cascading the devices, it is possible to couple more (tens or even hundreds of
receivers).
The receivers have to be connected to the PC through their USB3 interface. The LAN
interface is not supported in the coherent mode.
There are two topologically distinct ways in which the coherent receivers can be connected
to the PC over their USB3 interface. The first way is the standard installation, where all
coherent receivers are connected to the same PC, which allows for centralized processing of
coherent signals. The second way is the Extended Topology Configuration (ETC), where
each receiver is connected to a separate dedicated PC. This allows for implementation of
advanced parallel computing algorithms for phase-coherent systems. For more information
on the Extended Topology Configuration (ETC) please refer to Chapter 5 of this document.
To couple up to eight receivers, the WR-CC1PPS-210e ‘WiNRADiO WR-G65DDCe
Coherence Clock & 1PPS Kit’ has to be used, which is described in the Section 2.2. To
couple from nine to sixteen receivers, two Kits have to be used. For more than sixteen
channels please contact WiNRADiO.
For coherent operation, all WR-G65DDCe receivers must be clocked at exactly the same
frequency and phase. To achieve this requirement, it is necessary to distribute a sampling
clock from a single low phase noise clock source. Therefore, the receivers have to be
equipped with a coherent receiver option (/CR) for external sampling clock provision.
Similar to the sampling clock, all commands and operations of the receivers must be
synchronized accordingly to the coherent sampling clock. For this reason the receivers have
an external interconnection for digital synchronization, which is also provided on receivers
with a coherent receiver option (/CR).
An example of a coherent three channel system is shown in Picture 1-2.

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Picture 1-2: An example of three WR-G65DDCe receivers in coherent configuration

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2 Parts description of the coherent system
2.1 WR-G65DDCe connectors
The connectors required for coherent operation of the WR-G65DDCe receivers are shown in
Picture 2-1 (present when the /CR option has been fitted):
1. CLK IN –ADC clock input
2. SYNC IN –digital synchronization input
3. SYNC OUT –digital synchronization output
Picture 2-1: The connectors required for coherent operation of the WR-G65DDCe
1
2
3

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2.2 The WiNRADiO Coherence Clock & 1PPS Kit
(WR-CC1PPS-210e)
The ‘WiNRADiO Coherence Clock & 1PPS Kit’(hereafter referred to as the 'Kit') provides
production and distribution of a coherent 210 MHz clock for up to eight WR-G65DDCe
receivers as well as digital synchronization of the receivers. It also features an internal
frequency reference of 0.1 ppm stability, input for external frequency reference and digital
input for a 1PPS pulse. The Kit consists of the following components (shown in Picture 2-3):
1. Coherent clock generator unit with 1PPS input
2. SMA patch cables for coherent clock distribution and synchronization (17 pcs)
3. Frequency reference SMA interconnect cable
4. SMA terminators (7 pcs + 1 piece pre-installed on the unit, see 6 below)
5. Sampling clock SMA coaxial jumper (factory pre-installed on the unit)
6. Sampling clock SMA terminator (factory pre-installed on the unit)
7. Power adapter
Picture 2-2: The WiNRADiO WR-G65DDCe Coherence Clock & 1PPS Kit
1
2
17x
3
4
7x
5
6
7

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2.2.1.1 Coherent clock generator unit with 1PPS input
The coherent clock generator unit (hereafter referred to as the 'Unit') is shown in Picture 2-3.
It is a standalone device, which has to be installed next to and connected to the
WR-G65DDCe receivers thus creating the coherent group of receivers. The unit generates a
210 MHz sampling clock for up to eight WR-G65DDCe receivers. The sampling clock is
locked to a frequency reference, which can be internal or external. It also distributes a 1PPS
trigger signal from the 1PPS input to all connected WR-G65DDCe receivers via the digital
synchronization interface port SYNC OUT.
No software driver is required for operation of the Coherent clock generator unit.
For the technical specification of the unit, please refer to Chapter 6 of this document.
1 Sampling clock outputs LO OUT
2 Local oscillator input LO IN
3 Local oscillator output LO OUT
4 Frequency reference output REF OUT
5 Frequency reference input REF IN
6 1PPS input 1PPS IN
7 Synchronization signal output SYNC
OUT
8 LO OFF connector for disabling of the
internal oscillators
9 Power / Locked indicator (front panel)
10 Power supply connector (back panel)
11 Factory pre-installed SMA terminator
12 Factory pre-installed SMA jumper
Picture 2-3: Front view of Coherent clock generator unit
1
4
5
6
7
3
2
8
11
12
9
10

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2.2.1.2 CLK OUT connectors for sampling clock output
There are eight SMA connectors for the sampling clock output provided on the Coherent
clock generator unit. These are located on the top of the unit and are facing upwards. The
CLK IN input of each WR-G65DDCe receiver within a coherent group must be connected to
one of these ports using the SMA patch cables (for coherent clock distribution) supplied with
the Kit and described in Section 2.2.2. All ports are equivalent; therefore, any receiver within
a coherent group can be connected to any of these ports. However, unused ports have to be
terminated using the 50 ohm SMA terminators for proper operation.
For the technical specification of the sampling clock output signal, please refer to Chapter 6.
2.2.1.3 Sampling clock oscillator input CLK IN
The CLK IN port drives all eight CLK OUT outputs. In other words, the sampling clock
provided at this port is coherently distributed to all eight CLK OUT outputs, therefore it must
always be connected to one of the two LO OUT output ports described in the next section.
This mandatory connection is factory installed as shown in Picture 2-10 and described in
Section 2.2.5.
The factory connection between the LO OUT port and the CLK IN port should not be altered
for normal operation when using the coherent clock generator unit to drive up to eight
coherent receivers.
The purpose of this connection is to enable the use of two coherent clock generator units
to coherently drive up to sixteen receivers. For details on how to use two coherent clock
generator units to drive up to sixteen receivers please refer to chapter 4 of this document.
2.2.1.4 Sampling clock oscillator outputs LO OUT
There are two LO OUT ports provided on the Unit. Both LO OUT ports provide the same
phase coherent 210 MHz sampling clock signal generated by the internal sampling clock
oscillator.
The purpose of the two LO OUT ports is to enable the use of two coherent clock generator
units to coherently drive up to sixteen receivers. For details on how to use two coherent
clock generator units to drive up to sixteen receivers please refer to chapter 4 of this
document.
For the standard operation of a single Coherent clock generator unit driving up to eight
receivers, one of these ports has to be connected to the CLK IN port on the unit. The other
one has to be terminated using a 50 ohm SMA terminator.
This mandatory connection between the LO OUT port and the CLK IN port is factory installed
as shown in Picture 2-10 and described in Section 2.2.5. It consists of a SMA jumper cable
connecting the LO OUT port and the CLK IN port. This interconnects the sampling clock from
the sampling clock oscillator output LO OUT to the CLK IN input of the Coherent clock
generator unit. The other unused LO OUT port is terminated using a 50 ohm terminator.

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The factory connection between the LO OUT port and the CLK IN port should not to be
altered for normal operation when using the coherent clock generator unit to drive up to eight
coherent receivers.
For details on how to use two coherent clock generator units to drive up to sixteen receivers
please refer to Chapter 4 of this document.
2.2.1.5 Frequency reference output REF OUT
The frequency reference output is an SMA connector providing the 10 MHz (internal)
frequency reference output signal. This output can be connected to the REF IN input port
(Section 2.2.5) if the internal frequency reference operation of the Unit is required. Use the
Frequency Reference SMA Interconnect cable (described in Section 2.2.3 and provided with
the Kit) to connect the REF OUT port to the REF IN port.
If unused, this port must be properly terminated using the 50 ohm terminator.
For the technical specification of the REF OUT, please refer to Chapter 6.
2.2.1.6 Frequency reference input REF IN
A signal provided to the frequency reference input REF IN serves as a frequency reference
for the internal 210 MHz sampling clock generator, thus providing the frequency reference for
whole coherent system. The connection is via a 50 ohm terminated SMA connector.
A 10 MHz reference signal must be provided on this input.
This input can be connected to the REF OUT output port (Section 2.2.4) if the internal
frequency reference operation of the unit is required. Use the Frequency Reference SMA
Interconnect cable (described in Section 2.2.3 and provided with the Kit) to connect the REF
OUT port to REF IN port.
For the technical specification of the REF IN input, please refer to Chapter 6.
2.2.1.7 1PPS IN input
The 1PPS IN input is provided for applications which require external synchronization (using
a 1PPS signal from a GPS or similar source). The connection is via a 50 ohm terminated
SMA connector, which accepts 5V TTL logic levels.
The signal provided to this input is processed by a fast logic comparator and then distributed
to all of the receivers within a coherent group of receivers - over the Digital synchronization
output SYNC OUT described in next Section. If the 1PPS IN input is used, the SYNC OUT
has to be connected as well as described in Section 3.4.
Please note that, the 1PPS signal is not needed for coherent operation of the WR-G65DDCe
receivers. The only purpose of the 1PPS signal is to provide a time base for the function of