Wolfson WM8778-EV1B Instruction Manual

WM8778-EV1B
Evaluation Board User Handbook
Rev 1.1

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TABLE OF CONTENTS
INTRODUCTION ............................................................................................. 3
GETTING STARTED ....................................................................................... 3
EVALUATION KIT CHECKLIST ............................................................................. 3
CUSTOMER RE UIREMENTS..............................................................................3
EVALUATION BOARD OPERATION.............................................................. 4
POWER SUPPLIES ...............................................................................................4
BOARD FUNCTIONALITY ..................................................................................... 4
DIGITAL INPUT...................................................................................................... 5
ANALOGUE INPUT................................................................................................ 5
DIGITAL OUTPUT.................................................................................................. 5
ANALOGUE OUTPUT ............................................................................................ 5
INTERFACES......................................................................................................... 6
HEADERS .............................................................................................................. 6
JUMPERS .............................................................................................................. 7
SWITCHES ............................................................................................................ 8
LINKS..................................................................................................................... 8
HARDWARE CONTROL ................................................................................. 9
SOFTWARE CONTROL................................................................................ 11
SPI INTERFACE MODE....................................................................................... 11
TWO-WIRE MODE............................................................................................... 11
REGISTER MAP .................................................................................................. 12
SERIAL INTERFACE SOFTWARE DESCRIPTION...................................... 13
SOFTWARE DOWNLOAD................................................................................... 13
SOFTWARE INSTALLATION............................................................................... 13
SOFTWARE OPERATION ................................................................................... 14
DAC SETUP......................................................................................................... 19
ADC SETUP......................................................................................................... 21
LINE SETUP ........................................................................................................ 23
SCHEMATIC LAYOUT .................................................................................. 2
WM8778-EV1B PCB LAYOUT...................................................................... 33
WM8778-EV1B BILL OF MATERIAL............................................................ 37
APPENDIX .................................................................................................... 39
DAC AND ADC ALTERNATIVE AUDIO INTERFACE CONFIGURATION............ 39
EXTERNAL DSP CONNECTION TO THE WM8778-EV1B.................................. 41
ADDITIONAL WM8778-EV1B SETUP RECOMMENDATIONS ............................ 45
EVALUATION SUPPORT ............................................................................. 47
IMPORTANT NOTICE ................................................................................... 48

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INTRODUCTION
The WM8778 is a high performance stereo audio CODEC, ideal for surround sound
processing applications for home hi-fi, DVD-RW and other audio visual equipment.
This evaluation platform and documentation should be used in conjunction with the latest
version of the WM8778 datasheet. The datasheet gives device functionality information as
well as timing and data format requirements.
This evaluation platform has been designed to allow the user ease of use and give optimum
performance in device measurement as well as providing the user with the ability to listen to
the excellent audio quality offered by the WM8778.
GETTING STARTED
EVALUATION KIT CHECKLIST
The following items are available from Wolfson:
• WM8778-EV1B Evaluation Board (order from Wolfson)
• WM8778-EV1S .exe file for control software (download from
http://www.wolfsonmicro.com/)
• WM8778-EV1M User Handbook (download from http://www.wolfsonmicro.com/)
CUSTOMER REQUIREMENTS
Minimum customer requirements are:
• D.C. Power supply of +5V
• D.C. Power supply of +2.7V to +5.5V
• D.C. Power supply of +/-12.0V
• PC and printer cable (for software control)
Minimum PC spec requirements are:
• Win95/98/NT/2000/XP
• 486 Processor
DAC Signal Path Requires:
• Digital coaxial or optical data source
• 1 set of active stereo speakers and/or 1 set of headphones
ADC Signal Path Requires:
• Analogue coaxial signal source
• Digital coaxial or optical data receiving unit
Analogue Signal Path Requires:
• Analogue coaxial signal source
• 1 set of active stereo speakers and/or 1 set of headphones

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EVALUATION BOARD OPERATION
POWER SUPPLIES
Using appropriate power leads with 4mm connectors, power supplies should be connected
as described in Table 1.
REF-DES SOCKET NAME SUPPLY
J1 +5V +5V
J2 DGND 0V
J3 DVDD +2.7V to +3.6V
J4 AVDD +2.7V to +5.5V
J5 AGND 0V
J22 +12V +12V
J23 -12V -12V
Table 1 Power Supply Connections
The DGND and AGND connections may be connected to a common GND on the supply with
no reduction in performance.
Note: Refer to WM8778 datasheet for limitations on individual supply voltages.
Important: Exceeding the recommended maximum voltage can damage EVB
components. Under voltage may cause improper operation of some or all of the EVB
components.
BOARD FUNCTIONALITY
There are three options for inputting digital data into the WM8778 evaluation board. There is
a coaxial input (J7) via a standard phono connector or an optical input (U3) via a standard
optical receiver module. A direct digital input is also available via one side of a 2x8 pin
header (H1).
The analogue input signals are applied to the evaluation board via standard phono
connectors J13 (AINL) and J10 (AINR). The evaluation board provides the option to select an
active or passive anti-alias filter for the analogue input; this can be selected using SW3 and
SW4.
There are two options for outputting digital data from the WM8778 evaluation board. There is
a coaxial output (J6) via a standard phono connector. The digital signals may also be
accessed via one side of a 2x8 pin header (H2).
The line analogue outputs of the board are via phono connectors and can be output as active
external filtered or unfiltered outputs. J19 (UNFILT_VOUTL) and J15 (UNFILT_VOUTR)
provide the unfiltered outputs and J21 (FILT_VOUTL) and J20 (FILT_VOUTR) provide the
active filtered outputs.
All WM8778 device pins are accessible for easy measurement via the 1x14 pin headers (H3
and H4) running up each side of the device.
Level-shift IC’s (U5 and U8) are used to shift the fixed +5V digital input from the CS8427 (U4)
down to the same level as DVDD and vice-versa.

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DIGITAL INPUT
REF-DES SOCKET NAME SIGNAL
J7 SPDIF_IN Digital (AES/EBU, UEC958, S/PDIF,
EIAJ CP340/1201) signal.
U3 DIGITAL_OPTICAL INPUT Digital (AES/EBU, UEC958, S/PDIF,
EIAJ CP340/1201) optical signal.
Table 2 Digital Inputs
ANALOGUE INPUT
REF-DES SOCKET NAME SIGNAL
J10 AINR Analogue Input signal
J13 AINL Analogue Input signal
Analogue signals applied to these connectors can be selected for active or passive
anti-aliasing filtering and are also AC coupled before being input to the WM8778.
Table 3 Analogue Inputs
Note: When used in Slave Mode, an SPDIF signal must still be applied to phono connector
J7. This input signal is used to allow correct operation of the CS8427 as well as being used
to generate the MCLK for the WM8778.
DIGITAL OUTPUT
REF-DES SOCKET NAME SIGNAL
J6 SPDIF_OUT Digital (AES/EBU, UEC958,
S/PDIF, EIAJ CP340/1201)
signal.
Table 4 Digital Output
ANALOGUE OUTPUT
REF-DES SOCKET NAME SIGNAL
J19 UNFILT_VOUTL Analogue Line Output
J15 UNFILT_VOUTR Analogue Line Output
J21 FILT_VOUTL Analogue Line Output
J20 FILT_VOUTR Analogue Line Output
Table Analogue Outputs

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INTERFACES
Figure 1 Interfaces
HEADERS
H1 SIGNAL H2 SIGNAL
1/2 DACDAT 16/15 GND
3/4 GND 14/13 ADCMCLK
5/6 DACLRC 12/11 GND
7/8 GND 10/9 ADCDOUT
9/10 DACBCLK 8/7 GND
11/12 GND 6/5 ADCBCLK
13/14 DACMCLK 4/3 GND
15/16 GND 2/1 ADCLRC
LNK1 SIGNAL LNK2 SIGNAL
1 ZFLAGR 1 ZFLAGL
2 AGND 2 AGND

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H3 WM8778 PIN NAME H4 WM8778 PIN NAME
1 1 AINL 1 15 CE/I2S
2 2 ZFLAGR 2 16 DI/DEEMPH
3 3 ZFLAGL 3 17 CL/IWL
4 4 DACBCLK 4 18 VOUTL
5 5 DACMCLK 5 19 VOUTR
6 6 DIN 6 20 VMIDDAC
7 7 DACLRC 7 21 DACREFN
8 8 ADCBCLK 8 22 DACREFP
9 9 ADCMCLK 9 23 VMIDADC
10 10 DOUT 10 24 ADCREFGND
11 11 ADCLRC 11 25 ADCREFP
12 12 DGND 12 26 AVDD
13 13 DVDD 13 27 AGND
14 14 MODE 14 2 AINR
Table 6 Headers
JUMPERS
JUMPERS JUMPER STATUS DESCRIPTION
J8 OPEN
SHORT
DAC Slave Mode (Level shift direction) [default setting]
DAC Master Mode
J9 (BCLK) OPEN
SHORT
Separate ADC and DAC BCLK
Common ADC and DAC BCLK [default setting]
J11 (LRC) OPEN
SHORT
Separate ADC and DAC LRC
Common ADC and DAC LRC [default setting]
J12 OPEN
SHORT
ADC Slave Mode (Level shift direction) [default setting]
ADC Master Mode
J14 (MCLK) OPEN
SHORT
Separate ADC and DAC MCLK
Common ADC and DAC MCLK [default setting]
J16, J17 OPEN
SHORT
OUT Signals are AC coupled [default setting]
OUT Signals are not AC coupled
Table 7 Jumpers

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SWITCHES
SWITCHES SWITCH STATUS DESCRIPTION
SW1
(DATA FORMAT)
1 2 3 4 5 6 DATA FORMAT
1 0 0 1 0 0 I2S Compatible [default setting]
1 0 0 0 0 1 24-bit Right Justified
1 0 0 0 0 0 Left Justified
SW2 After an input data format change has been made using
SW1, the CS8427 will only latch the new settings after SW2
has been pressed and released.
SW3
(AINR Filter)
POS 1
POS 2
Active anti-alias filter selected
Passive anti-alias filter selected [default setting]
SW4
(AINL Filter)
POS 1
POS 2
Active anti-alias filter selected
Passive anti-alias filter selected [default setting]
SW5
(VOUTR Filter)
Pins 1 and 2 SHORT
Pins 2 and 3 SHORT
Centre Position
Unfiltered Output
Filtered Output [default setting]
Output Disconnected
SW6
(VOUL Filter)
Pins 1 and 2 SHORT
Pins 2 and 3 SHORT
Centre Position
Unfiltered Output
Filtered Output [default setting]
Output Disconnected
SW7
(Software Control)
POS 1
POS 2
POS 3
3-wire (SPI) Control Mode [default setting]
Hardware Mode
2-wire Control Mode
Table 8 Switches
LINKS
LINKS LINK STATUS DESCRIPTION
LNK3
(5V tolerant supply control)
Pins 1 and 2 SHORT
Pins 2 and 3 SHORT
Centre Position
DVDD Supply for S/W and mode control [default setting]
+5v Supply for S/W and mode control
No Supply for S/W and mode control
LNK4
(Hardware Mode – I2S Control)
Pins 1 and 2 SHORT
Pins 2 and 3 SHORT
24 Bit [default setting]
20/16 Bit
LNK5
(Hardware Mode – IWL Control)
Pins 1 and 2 SHORT
Pins 2 and 3 SHORT
I2S Format [default setting]
Right Justified (RJ) Format
LNK6
(Hardware Mode – DEEMPH
Control)
Pins 1 and 2 SHORT
Pins 2 and 3 SHORT
DEEMPH ON
DEEMPH OFF [default setting]
LNK7
(DI Direction Control)
Pins 1 and 2 SHORT
Pins 2 and 3 SHORT
Select if using 2 wire control operation
Select if using 3 wire or hardware operation [default setting]
Table 9 Links

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HARDWARE CONTROL
To operate the WM8778 in hardware mode, the switch SW7 (MODE) must be set to position
2 and link LNK7 must be set to short pins 2 and 3. The 3-pin links on the board (LNK4, LNK5
and LNK6) then become the active source for changing the device functions. The diagram
shown in Figure 2 used with the settings specified in Table 10 will assist in setting the
WM8778-EV1B into a hardware configuration for DAC (slave mode) playback. This is to ease
the initial use of the WM8778 until the user becomes familiar with the device operation. For
ADC or bypass configuration please refer to the ADC and line setup sections.
PARALLEL PORT
12 3456
OPEN
AGND
AVDD
+2.7V
to
+5.5VDGND
DVDD
+2.7V
to
+3.6V
VOUTL
VOUTR
OPT
_IN
SPDIF_
IN
SPDIF_
OUT
H1
J2
SW1
SW2
J1 J5
H3
J11
1
J9
1
1
J4J3
H2
J8
1
J12
1
J14
1
J16
1
H4
SW3
+5v
0
1
J22J23
+12v-12v
AINL
AINR
UNFILT_
VOUTL
UNFILT_
VOUTR
1
1
SW5
1
SW6
J17
1
1
1 1 1
SW7
1
LNK3 LNK5
LNK6 LNK7 LNK4
SW4
1
Figure 2 Recommended DAC Setup – Hardware Mode

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LINKS AND
JUMPERS
LINK / JUMPER /
SWITCH POSITION
DESCRIPTION
H1 Fit jumpers (1,2)
(5,6) (9,10) (13,14)
DAC clocks
H2 No jumpers ADC Clocks
J8 OPEN DAC Slave Mode
J9 (BCLK) OPEN DAC uses BCLK, no common BCLK for ADC
J11 (LRC) OPEN DAC uses LRCLK, no common LRCLK for ADC
J12 OPEN ADC Slave Mode
J14 (MCLK) OPEN DAC uses MCLK, no common MCLK for ADC
J16 and J17 OPEN Output Signals are AC Coupled
SW1 1 2 3 4 5 6 DATA FORMAT
1 0 0 1 0 0 I2S Compatible
SW3 POS 1 Active anti-alias input filter selected
SW4 POS 1 Active anti-alias input filter selected
SW5 Pins 2 and 3
SHORT
Filtered Output
SW6 Pins 2 and 3
SHORT
Filtered Output
SW7 POS 2 Hardware Mode Selected
LNK3 Pins 1 and 2
SHORT
DVDD Supply for S/W and mode control
LNK4 Pins 1 and 2
SHORT
24 Bit
LNK5 Pins 1 and 2
SHORT
I2S Format
LNK6 Pins 2 and 3
SHORT
DEEMPH OFF
LNK7 Pins 2 and 3
SHORT
Hardware Mode Selected
Table 10 DAC Hardware Mode Jumper Setup (Slave Mode)
Please refer to Table 7 and Table 8 of this document and the WM8778 datasheet for further
details on device configuration in hardware mode.

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SOFTWARE CONTROL
There are two possible serial software control modes that may be selected to operate the
WM8778. The standard SPI user interface is a 3-wire solution with the second option being
a two-wire solution.
SPI INTERFACE MODE
To operate the WM8778 in SPI (3-wire) mode, switch SW7 must be set to position 1,
selection of software mode will be indicated by D1 being OFF. The 3-wire serial interface
then becomes active on pins 15(CE), 16(DI) and 17(CL). The serial interface on the board
can be connected to a PC via the printer port or any other standard parallel port. The port
used can be selected through the software provided. The software supplied with this kit gives
the user access to all the possible features provided by the WM8778. The 3-wire latch, data
and clock lines may also be connected to the board via the test points TP12 (CE), TP9 (DI)
and TP10 (CL).
Please refer to the WM8778 datasheet for full details of the serial interface timing and all
register features.
B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 DI
CL
CE
control register address control register data bits
latch
Figure 3 SPI Serial Interface
TWO-WIRE MODE
To operate the WM8778 in 2-wire mode, switch SW7 must be set to position 3, selection of
software mode will be indicated by D1 being OFF. Also LNK7 should be set to short positions
1-2, this is for the bi-directional direction of the control signal. The 2-wire serial interface
becomes active on pins 16(DI) and 17(CL). The serial interface on the board can be
connected to a PC via the printer port or any other standard parallel port. Note: a bi-
directional parallel port is required for 2-wire operation1. The 2-wire data and clock lines
may also be connected to the board via the test points TP18 (DI) and TP4 (CL).
When used in 2-wire mode, the WM8778 has two possible addresses (0011010 [0x34h] or
0011011 [0x36h]) that are selectable by pulling CE low or high. If connecting a probe to the
Test Points it must be noted that the CE line is pulled high on the WM8778 evaluation board
selecting address 0011011. CE must be pulled low or driven low through the software writes
if address 0011010 is used (as is performed in the WM8778-EV1S software provided).
Figure 4 Two-Wire Serial Interface
Note: 1If the 2-wire mode is not reporting as expected then the most likely cause is that the parallel port being used is not
bi-directional. In most PC’s, the parallel port can be configured in the BIOS settings during initial power up.

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REGISTER MAP
REGISTER
ADDRESS
(Bit
1 – 9) Bit[8] Bit[7] Bit[6] Bit[ ] Bit[4] Bit[3] Bit[2] Bit[1] Bit[0]
R3 (03h) 0000011 UPDATED
R4 (04h) 0000100 UPDATED
R5 (05h) 0000101 UPDATED
R6 (06h) 0000110 0 0 0 0 0 0 0
R7 (07h) 0000111 0 TOD IZD ATC DZCEN
R8 (08h)000100000000000DMUTE
R9 (09h) 0001001 0 0 0 0 0 0 DEEMPH
R10 (0Ah) 0001010 0 0 0 DACBCP DACLRP
R11 (0Bh) 0001011 ADCHPD 0 0 ADCBCP ADCLRP
R12 (0Ch) 0001100 ADCMS DACMS ADCOSR
R13 (0Dh) 0001101 0 0 AINPD 0 0 0 DACPD ADCPD PDWN
R14 (0Eh) 0001110 ZCLA
R15 (0Fh) 0001111 ZCRA
R16 (10h) 0010000
R17 (11h) 0010001 LCEN ALCZC 0 0 0
R18 (12h) 0010010 FDECAY
R19 (13h) 0010011 0 0 0 0 0NGAT
R20 (14h) 0010100
R21 (15h) 0010101 LRBOTH MUTELA MUTERA 0 0
R22 (16h) 0010110 0 0 MXBYP 0 MXDAC
R23 (17h) 0010111
MAXATTEN[3:0]
0
0
LCSEL[1:0] MAXGAIN[2:0] LCT[3:0]
writing 000000000 to this register resets all registers to their default state
HLD[3:0]
ATK[3:0]DCY[3:0]
NGTH[2:0]
CHGPERZC[1:0] TRANWIN[2:0]
DACRATE[2:0] ADCRATE[2:0]
LAG[7:0]
RAG[7:0]
DZFM[1:0]
DACWL[1:0] DACFMT[1:0]
ADCWL[1:0] ADCFMT[1:0]
LDA[7:0]
RDA[7:0]
MASTDA[7:0]
PL[3:0]
PHASE[1:0]
Table 11 Mapping of Program Registers
Please refer to the WM8778 datasheet for full details of the serial interface timing and all
register features.

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SERIAL INTERFACE SOFTWARE DESCRIPTION
The following section will detail the downloading and installation of evaluation software and
also the operation of the software and the functionality of each control button. Details the
main panel, hidden panels and details on the hardware setup required to use the main
functional buttons “DAC Setup”, “ADC Setup” and “Line Setup” will be provided.
SOFTWARE DOWNLOAD
The current evaluation board software should be downloaded from the Wolfson website
[www.wolfsonmicro.com].
From the homepage it is recommended that you do a search for ‘WM8778’ and select the
‘more’ button located under the ‘EVALUATION BOARDS’ heading. Select ‘DOWNLOAD’
from the right hand side of the screen under the ‘SOFTWARE’ heading. Once you have
accepted the licence agreement you can select the WM8778_EV1S_REVx.x.ZIP link and
download to your hard drive.
SOFTWARE INSTALLATION
Once the .zip file has been downloaded, to install the software:
• Open the .zip file
• Double click on the setup.exe file.
• Follow the on-screen installation instructions and save to the desired location.
The software can then be opened by either running the extracted WM8778_EV1_REVx.x.exe
file from the saved location. Alternatively select: Start > Programs > WM8778-EV1S Revx.x >
WM8778-EV1S.

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SOFTWARE OPERATION
Due to the many features offered by the WM8778 the software has been split into 4 different
panels. This eases the complexity of the software making each panel less busy, the panels
have also been grouped so that it makes it simple to control each logical section of the
device.
The main menu panel shown in Figure 5 Software Menu Main Panel is used to call up the
other panels as well as offering a number of pull-down menus.
Figure Software Menu Main Panel
SUBMIT ALL
The ‘Submit All’ button will submit the current panel settings, within each of the four main
panels to every register of the WM8778. This means changes within a number of different
panels can be made and then submitted at the same time using this button.
WM8778 RESET
The ‘Reset’ button writes to the reset register (R23) but does not reset the control panel
values. If the previous values are to be resubmitted then the ‘Submit All’ button should be
pressed.
RESET SOFTWARE PANEL SETTINGS
If the user would like to start afresh then the ‘Reset Software Panel Settings’ button should
also be pressed. Pressing this button does not write to the device, it only resets the panel
settings to their default state.

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WOLFSON LOGO
Left clicking on the Wolfson logo will open the PCs default web browser and go top the
Wolfson Microelectronics website (‘www.wolfsonmicro.com’).
On the main panel there are three buttons, “DAC Setup”, “ADC Setup” and “Line Setup”
which have been provided as a quick start approach. Pressing either of these buttons will
power up the DAC, ADC or Line signal paths in a known state as described in the following
pages.
Important: It must be noted that the CS8427 SPDIF decoder IC will only work at a rate of
256fs. This will limit the sample rates that may be set using the WM8778 unless an external
source is used supplying signals directly to the relevant pins of header H1 or taking the
signals from the relevant pins of header H2.
POWER MANAGEMENT CONTROL PANEL
Figure 6 Power and Interface Control
The Power Down and Interface Control panel is used to enable/disable the various sections
of the WM8778. It is also used to individually set the audio interface to the required data
format for both the ADC and DAC. Pressing the ‘Power Submit’ button will cause the settings
shown on this panel to be written to the WM8778. A full device register write is not sent using
the ‘Power Submit’ button.

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ADC, DAC AND OUTPUT CONTROL PANEL
Figure 7 ADC, DAC and Output Control
The ADC, DAC and Output Control panel is used to control the ADC, DAC and Output Mixer
related features of the WM8778. Pressing the ‘ADC, DAC and Output Submit’ button will
cause the settings shown on this panel to be written to the WM8778. A full device register
write is not sent using the ‘ADC, DAC and Output Submit’ button.

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VOLUME CONTROL PANEL
Figure 8 Volume Control
The Volume Control panel is used to control both analogue and digital volume settings of the
WM8778. The volume sliders update in ‘real’ time (i.e. the ‘Volume Submit’ button does not
have to be pressed to update the output volume level) but will only have an effect on the
output if the Volume Update bits are set. Once changes are made to the Volume Update bits
or any other settings excluding the volume sliders, the ‘Volume Submit’ button must be left
clicked for the change to take effect. Pressing the ‘Volume Submit’ button will cause the
settings shown on this panel to be written to the WM8778. A full device register write is not
sent using the ‘Volume Submit’ button.

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LIMITER/ALC CONTROL PANEL
Figure 9 Limiter/ALC Control
The Limiter/ALC Control panel is used to control the many options offered by the WM8778
for either ALC (Automatic Level Control) or Limiter operation. The default of the WM8778 is
for the operation to be disabled, this must firstly be enabled and then the correct limiter or
ALC function selected. Controls specific to ALC or limiter are dimmed and not controllable
depending on the operation selected. The following control sliders update in ‘real’ time’:
Maximum Gain of PGA, Noise Gate Threshold and Limiter Threshold/ALC Target Level (i.e.
the ‘Limiter/ALC Submit’ button does not have to be pressed to update these settings).
Pressing the ‘Limiter/ALC Submit’ button will cause the settings shown on this panel to be
written to the WM8778. A full device register write is not sent using the ‘Limiter/ALC Submit’
button.

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DAC SETUP
By pressing the ‘DAC Setup’ button, the software writes to the device setting the SPDIF_IN
through DAC to the VOUTL/R outputs; active in 24-bit, I2S input data format. Table 12 lists
the required board settings to allow this signal path to become active. This is to ease the
initial use of the WM8778 hardware and software until the user becomes familiar with both
device and software operation.
PARALLEL PORT
12 3456
OPEN
AGND
AVDD
+2.7V
to
+5.5VDGND
DVDD
+2.7V
to
+3.6V
VOUTL
VOUTR
OPT
_IN
SPDIF_
IN
SPDIF_
OUT
H1
J2
SW1
SW2
J1 J5
H3
J11
1
J9
1
1
J4J3
H2
J8
1
J12
1
J14
1
J16
1
H4
SW3
+5v
0
1
J22J23
+12v-12v
AINL
AINR
UNFILT_
VOUTL
UNFILT_
VOUTR
1
1
SW5
1
SW6
J17
1
1
1 1
SW7
1
LNK3 LNK5
LNK6 LNK7 LNK4
SW4
1
1
Figure 10 Recommended DAC setup

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LINKS AND
JUMPERS
LINK / JUMPER /
SWITCH POSITION
DESCRIPTION
H1 Fit jumpers (1,2)
(5,6) (9,10) (13,14)
DAC clocks
H2 No jumpers ADC Clocks
J8 OPEN DAC Slave Mode
J9 (BCLK) OPEN DAC uses BCLK, no common BCLK for ADC
J11 (LRC) OPEN DAC uses LRCLK, no common LRCLK for ADC
J12 OPEN ADC Slave Mode
J14 (MCLK) OPEN DAC uses MCLK, no common MCLK for ADC
J16 and J17 OPEN Output Signals are AC Coupled
SW1 1 2 3 4 5 6 DATA FORMAT
1 0 0 1 0 0 I2S Compatible
SW3 POS 1 Active anti-alias input filter selected
SW4 POS 1 Active anti-alias input filter selected
SW5 Pins 2 and 3
SHORT
Filtered Output
SW6 Pins 2 and 3
SHORT
Filtered Output
SW7 POS 1 Software 3 Wire Mode Selected
LNK3 Pins 1 and 2
SHORT
DVDD Supply for S/W and mode control
LNK4 Pins 1 and 2
SHORT
24 Bit
LNK5 Pins 1 and 2
SHORT
I2S Format
LNK6 Pins 2 and 3
SHORT
DEEMPH OFF
LNK7 Pins 2 and 3
SHORT
Hardware Mode DI Direction
Table 12 DAC Setup Jumper Settings (Slave Mode)