XIA Pixie-16 MZ-TrigIO User manual

Pixie-16
User Manual
Version 3.00
August 21, 2018
Hardware Revisions: B, C, D, F
XIA LLC
31057 Genstar Rd
Hayward, CA 94544 USA
Email: [email protected]
Tel: [phone]; Fax: [phone]
http://www.xia.com/
Information furnished by XIA LLC is believed to be accurate and reliable. However, no responsibility is assumed by
XIA LLC for its use, or for any infringements of patents or other rights of third parties which may result from its use.
No license is granted by implication or otherwise under any patent or patent rights of XIA LLC. XIA LLC reserves
the right to change hardware or software specifications at any time without notice.

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Table of Contents
Safety............................................................................................................................................................5
Specific Precautions..................................................................................................................................5
Power Source........................................................................................................................................5
User Adjustments/Disassembly ............................................................................................................5
Detector and Preamplifier Damage.......................................................................................................5
Servicing and Cleaning.........................................................................................................................5
Warranty Statement ......................................................................................................................................6
Contact Information:.................................................................................................................................6
Manual Conventions.....................................................................................................................................7
1Introduction...........................................................................................................................................8
1.1 Pixie-16 Features ..........................................................................................................................9
1.2 Specifications..............................................................................................................................10
1.3 System Requirements..................................................................................................................11
1.3.1 Pixie-16 Crate .....................................................................................................................11
1.3.2 Host Computer....................................................................................................................11
1.3.3 Drivers and Software ..........................................................................................................12
1.3.4 Detector Signals..................................................................................................................12
1.3.5 Power Requirements...........................................................................................................12
1.3.6 Connectors and Cabling......................................................................................................12
1.4 Software and Firmware Overview..............................................................................................12
1.5 Front Panel..................................................................................................................................12
1.5.1 16 Analog Signal Input Connectors (all Pixie-16 revisions)...............................................13
1.5.2 LVDS I/O Port (all Pixie-16 revisions)...............................................................................13
1.5.3 Digital I/O Connectors (A, B, C, D, E in red color font) (Rev. F Modules only)...............14
1.5.4 Front Panel LEDs (all Pixie-16 revisions) ..........................................................................16
1.5.5 3.3V I/O Connector (Rev. D Modules only).......................................................................17
1.5.6 GATE Inputs (Rev. D Modules only).................................................................................17
1.5.7 3.3V I/O Connector (Rev. B and C Modules only).............................................................18
1.5.8 Digital Input/output Signals Supported by Standard Firmware (all Pixie-16 revisions) ....19
1.6 Front End Attenuation and Termination.....................................................................................21
1.6.1 Rev. F Modules...................................................................................................................21
1.6.2 Rev. B, C, D Modules.........................................................................................................22
1.7 Operating Multiple Pixie-16 Modules Synchronously ...............................................................22
1.7.1 Clock Distribution...............................................................................................................22
1.7.1.1 Individual Clock Mode ...............................................................................................23
1.7.1.2 PXI Clock Mode .........................................................................................................23
1.7.1.3 Daisy-chained Clock Mode.........................................................................................24
1.7.1.4 Multi-Crate Clock Mode.............................................................................................24
1.7.2 Trigger Distribution and Run Synchronization...................................................................28
2Installation ..........................................................................................................................................30
2.1 Hardware Setup...........................................................................................................................30
2.2 Software Installation in Windows...............................................................................................32
2.3 Software Installation in Linux.....................................................................................................33
2.4 Getting Started............................................................................................................................34
2.4.1 Startup.................................................................................................................................34
2.4.2 Settings................................................................................................................................35

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2.4.3 Run......................................................................................................................................35
2.4.4 Results.................................................................................................................................36
3Navigating the Pixie-16 User Interface...............................................................................................37
3.1 Overview.....................................................................................................................................37
3.2 Startup.........................................................................................................................................37
3.3 Settings........................................................................................................................................38
3.3.1 Filter....................................................................................................................................39
3.3.2 Analog Signal Conditioning & Acquire ADC Traces.........................................................39
3.3.3 Histogram Control...............................................................................................................40
3.3.4 Decay Time.........................................................................................................................40
3.3.5 Pulse Shape Analysis..........................................................................................................40
3.3.6 Baseline Control & Acquire Baselines ...............................................................................41
3.3.7 Control Registers.................................................................................................................41
3.3.8 CFD Trigger........................................................................................................................45
3.3.8.1 100 MHz and 250 MHz Pixie-16 modules .................................................................45
3.3.8.2 500 MHz Pixie-16 modules ........................................................................................47
3.3.9 Trigger Stretch Lengths ......................................................................................................48
3.3.10 FIFO Delays........................................................................................................................49
3.3.11 Multiplicity .........................................................................................................................51
3.3.11.1 Illustrations of Multiplicity, Coincidence and Group Triggers...................................51
3.3.11.2 Parameters for Configuring Multiplicity, Coincidence and Group Triggers ..............55
3.3.11.3 Local Fast Trigger Gated by External Fast Trigger ....................................................58
3.3.11.4 Channel Validation Triggers.......................................................................................58
3.3.11.5 Module Validation Trigger .........................................................................................61
3.3.11.6 Module Fast Trigger....................................................................................................63
3.3.12 QDC....................................................................................................................................65
3.4 Run..............................................................................................................................................65
3.5 Results.........................................................................................................................................66
4Data Acquisition and Data Structures.................................................................................................70
4.1 Run Types...................................................................................................................................70
4.1.1 MCA Runs ..........................................................................................................................70
4.1.2 List Mode Runs...................................................................................................................70
4.1.3 Summary of Run Types ......................................................................................................70
4.2 Output Data Structures................................................................................................................71
4.2.1 MCA Histogram Data Structure .........................................................................................71
4.2.2 List Mode Data Structures ..................................................................................................71
4.2.3 List Mode Data Values .......................................................................................................74
4.2.3.1 List Mode Time Stamps..............................................................................................74
4.2.3.2 List Mode Energy........................................................................................................75
4.2.3.3 List Mode Trace Length..............................................................................................76
4.2.3.4 List Mode Event Length .............................................................................................76
4.2.3.5 List Mode Energy Sums..............................................................................................76
4.2.3.6 List Mode Baseline .....................................................................................................76
4.2.3.7 List Mode QDC Sums.................................................................................................76
4.2.3.8 List Mode External Clock Timestamps.......................................................................77
4.2.4 Settings Files (Run Statistics Included) ..............................................................................77
4.2.4.1 File Format..................................................................................................................77
4.2.4.2 File Content.................................................................................................................77
5Hardware Description.........................................................................................................................78

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5.1 Analog Signal Conditioning........................................................................................................78
5.2 Pulse Processing..........................................................................................................................79
5.3 Digital Signal Processor (DSP) and Event Building...................................................................79
5.4 PCI and Trigger Interface ...........................................................................................................80
6Theory of Operation............................................................................................................................81
6.1 Digital Filters for Radiation Detectors........................................................................................81
6.2 Trapezoidal Filtering in a Pixie-16 Module................................................................................83
6.3 Baselines and Preamplifier Decay Times ...................................................................................84
6.4 Thresholds and Pileup Inspection...............................................................................................85
6.5 Filter Range.................................................................................................................................87
6.6 Run Statistics ..............................................................................................................................88
6.6.1 Time and trigger counters...................................................................................................88
6.6.2 Count Rates.........................................................................................................................89

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Safety
Please take a moment to review these safety precautions. They are provided both for your
protection and to prevent damage to the Pixie-16 module and connected equipment. This
safety information applies to all operators and service personnel.
Specific Precautions
Observe all of these precautions to ensure your personal safety and to prevent damage to
either the Pixie-16 module or equipment connected to it.
Power Source
The Pixie-16 module is powered through a custom made PXI/Compact PCI 6U crate.
Please refer to the crate manual for the correct AC voltage connections. The crate must be
powered down to insert and remove the module. The Pixie-16 module is not hot
swappable!
User Adjustments/Disassembly
To avoid personal injury, and/or damage, always turn off power before accessing the Pixie-
16 module’s on-board jumpers.
Detector and Preamplifier Damage
Because the Pixie-16 module does not provide power for the detector or preamplifier there
is little risk of damage to either resulting from the Pixie-16 module itself. Nonetheless,
please review all instructions and safety precautions provided with these components
before powering a connected system.
Servicing and Cleaning
To avoid personal injury, and/or damage to the Pixie-16 module or connected equipment,
do not attempt to repair or clean these units. These modules are warranted against all
defects for one (1) year. Pleasecontact thefactory oryour distributor before returningitems
for service.

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Warranty Statement
XIA LLC warrants that this product will be free from defects in materials and workmanship
for a period of one (1) year fromthe date of shipment. If any such product proves defective
during this warranty period, XIA LLC, at its option, will either repair the defective products
without charge for parts and labor, or will provide a replacement in exchange for the
defective product.
In order to obtain service under this warranty, Customer must notify XIA LLC of the defect
before the expiration of the warranty period and make suitable arrangements for the
performance of the service.
This warranty shall not apply to any defect, failure or damage caused by improper uses or
inadequate care. XIA LLC shall not be obligated to furnish service under this warranty a)
to repair damage resulting from attempts by personnel other than XIA LLC representatives
to repair or service the product; or b) to repair damage resulting from improper use or
connection to incompatible equipment.
THIS WARRANTY IS GIVEN BY XIA LLC WITH RESPECT TO THIS PRODUCT IN
LIEU OF ANY OTHER WARRANTIES, EXPRESSED OR IMPLIED. XIA LLC AND
ITS VENDORS DISCLAIM ANY IMPLIED WARRANTIES OF
MERCHANTABILITYOR FITNESS FOR A PARTICULAR PURPOSE. XIA’S
RESPONSIBILITY TO REPAIR OR REPLACE DEFECTIVE PRODUCTS IS THE
SOLE AND EXCLUSIVE REMEDY PROVIDED TO THE CUSTOMER FOR BREACH
OF THIS WARRANTY. XIA LLC AND ITS VENDORS WILL NOT BE LIABLE FOR
ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES
IRRESPECTIVE OF WHETHER XIA LLC OR THE VENDOR HAS ADVANCE
NOTICE OF THE POSSIBILITY OF SUCH DAMAGES.
Contact Information:
XIA LLC
31057 Genstar Rd.
Hayward, CA 94544 USA
Telephone: [phone]
Downloads: http://support.xia.com
Customer Support: [email protected]

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Manual Conventions
The following conventions are used throughout this manual
Convention
Description
Example
»
The » symbol leads you
through nested menu items
and dialog box options.
The sequence
Run Results»MCA Histogram directs you to
pull down the Run Results menu, and select the
MCA Histogram item.
Bold
Bold text denotes items that
you must select or click on in
the software, such as menu
items, and dialog box options.
...click on the Startup tab.
[Bold]
Bold text within [ ] denotes a
command button.
[Start] indicates the command button labeled
Start Run.
monospace
Items in this font denote text
or characters that you enter
from the keyboard, sections
of code, file contents, and
syntax examples.
Setup.exe refers to a file called “setup.exe”
on the host computer.
“window”
Text in quotation refers to
window titles, and quotations
from other sources
“Acquire ADC Traces” indicates the window
accessed via Settings»Acquire ADC Traces.
Italics
Italic text denotes a new term
being introduced , or simply
emphasis
rise time refers to the length of the slow filter.
...it is important first to set the energy filter flat
top so that it is at least one unit greater than the
preamplifier risetime...
<Key>
<Shift-Alt-
Delete> or
<Ctrl+D>
Angle brackets denote a key
on the keybord (not case
sensitive).
A hyphen or plus between
two or more key names
denotes that the keys should
be pressed simultaneously
(not case sensitive).
<W> indicates the W key
<Ctrl+W> represents holding the control key
while pressing the W key on the keyboard
Bold italic
Warnings and cautionary text.
CAUTION: Improper connections or settings
can result in damage to system components.
CAPITALS
CAPITALS denote DSP
parameter names
SLOWLEN is the length of the slow energy
filter
SMALL CAPS
SMALL CAPS are used for
panels/windows/graphs in the
GUI.
…go to the READ HISTOGRAMS panel and you
see…

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1 Introduction
The Digital Gamma Finder (DGF) family of digital pulse processors are capable of
measuring both the amplitude and shape of pulses in nuclear spectroscopy applications.
The DGF architecture was originally developed for use with arrays of multi-segmented
HPGe gamma ray detectors, but has since been applied to an ever broadening range of
applications.
The DGF Pixie-16 is a 16-channel all-digital waveform acquisition and spectrometer card
based on the CompactPCI/PXI standard for fast data readout to the host. It combines
spectroscopy with waveform digitizing and the option of on-line pulse shape analysis. The
Pixie-16 accepts signals from virtually any radiation detector. Incoming signals are
digitized by 12-bit, 14-bit, and 16-bit, 100 Mega Samples per Second (MSPS), 250 MSPS,
and 500 MSPS ADCs. Waveforms of up to 163 μs in length for each channel can be stored
in a FIFO. The waveforms are available for onboard pulse shape analysis, which can be
customized by adding user functions to the core processing software. Waveforms,
timestamps, and the results of the pulse shape analysis can be read out by the host system
for further off-line processing. Pulse heights are calculated to 16-bit precision and can be
binned into spectra with up to 32K channels. The Pixie-16 supports coincidence
spectroscopy and can recognize complex hit patterns.
Data readout rates through the CompactPCI/PXI backplane to the host computer can be up
to 109 Mbyte/s. The standard PXI backplane, as well as additional custom backplane
connections are used to distribute clocks and trigger signals between several Pixie-16
modules for group operation. A complete data acquisition and processing systems can be
built by combining Pixie-16 modules with commercially available CompactPCI/PXI
processor, controller or I/O modules in the same crate.
Figure 1-1: Picture of the front and side view of the Pixie-16.

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1.1 Pixie-16 Features
Designed for
oSegmented germanium detectors,
oSilicon strip detectors,
oArrays of scintillation detectors,
oSynchronous waveform capture for gamma- ray tracking,
oSub-nanosecond timing measurements,
oMixed systems with different detector types.
Accepts input signals directly from detector preamplifier outputs or scintillator/PMT
or SiPM combinations
12, 14, 16 bits; 100, 250, 500 MSPS ADC
Two software selectable gain/attenuation settings for each analog input
Programmable DC-offset for each analog input
Onboard CFD trigger with adjustable parameters
Programmable pileup inspection criteria include trigger filter parameters, threshold,
and rejection criteria
Triggered synchronous acquisition across channels and modules of waveforms up to
163 µs in length
On-board MCA spectrum from 1K to 32K bins (software selectable), up to 4.3
billion counts per bin
Event processing and optional pulse shape analysis performed with 100 MHz, 32-bit
floating point SHARC®DSP
Event by event list mode data buffered to allow zero dead-time acquisition
Full speed 32-bit, 33 MHz PCI interface to host computer, up to 109 MBytes/s
readout sustained
Configurable digital inputs and outputs
More than 120 backplane lines for clock and trigger distribution or general purpose
I/O and run synchronization between modules
Graphical user interfaces to control and diagnose system
Digital oscilloscope for health-of-system analysis
Compact C driver libraries available for easy integration in existing user interface

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1.2 Specifications
Table 1-1 Detailed Specifications of Pixie-16
Front Panel I/O
Signal Input
16 analog signal inputs (SMB). Switchable input impedance and
attenuation: 50 Ω or 1 kΩ or 4 kΩ (or according to user specification), 1:4
or 1:1 attenuation
Jumper selectable 50 Ω input termination
Sixteen preamplifier inputs, switchable input impedance and attenuation:
50 Ω or 1 kΩ or 4 kΩ (or according to user specification)
Input signal is not recommended to exceed +/-3.5V if 50 Ohm input
termination jumper is installed and the 1:4 attenuation is not used
Works with common resistive feedback preamplifiers of either signal
polarity
Logic Input/output
28 digital inputs/outputs, including:
4 high speed LVDS input/output connections
16 LVDS inputs for channel specific veto (or validation)
2 LVDS inputs for module veto (or validation) or general purpose I/O
6 single-ended inputs and 6 single-ended outputs
Option for external clock through front panel input. In addition, there are
more than 120 digital lines on the backplane for low skew system clock
distribution, trigger, run synchronization, and global veto lines, and
complex trigger logic, multiplicity information, or data transfers between
modules
Backplane I/O
Clock Input/output
Distributed 50 MHz clock, dedicated PXI_CLK line from slot 2 or daisy-
chained
Synchronization
Wired-or SYNC signal distributed through PXI backplane to synchronize
timers and run start/stop
Veto
VETO signal distributed through PXI backplane to suppress event
triggering
General purpose
I/O
More than 120 (121 for Rev F modules, 164 for Rev B/C/D modules)
bussed and neighboring lines on custom backplane to distribute
multiplicity and triggers and for I/O between modules
Data Interface
PCI
32-bit, 33MHz Read/Write, external memory or FIFO readout rate to host
over 100 MByte/s
Digital Controls
Input
Choice of two attenuation options through software settable input relay
Gain
Fixed analog voltage gain set to factory standard or per user specification,
digital gain adjustment possible
Offset
DC offset adjustment from –1.5V to +1.5V, in 65536 steps