Xilinx MultiLINX User manual

XAPP168 (v1.1) February 8, 2000 www.xilinx.com 1
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© 2000 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at
http://www.xilinx.com/legal.htm. All other trademarks and registered trademarks are the property of their respective owners.
Summary This application note provides a quick introduction to the MultiLINX cable hardware. Topics
covered are a description of the cable, how to order a MultiLINX system, a list of features, what
the cable may be used for, the current software support, and how to integrate cable access into
a users’ board. For more information on the MultiLINX cable and other hardware products from
Xilinx, please refer to the Hardware User’s Guide.
Introduction The MultiLINX Cable, shown in Figure 1, is a new peripheral hardware product released by
Xilinx in 1999. This cable is primarily used for the purpose of downloading configuration and
programming data to Xilinx FPGAs and CPLDs, in a users’target system, from a host
computer.
The MultiLINX cable supports a USB interface which increases communication speeds up to
12 Mbits/s, thus reducing download times by a factor of 120X compared to previous cable
products. The MultiLINX Cable is also outfitted with all the appropriate flying leads for multiple
configuration mode support, as well as supporting multiple readback modes such as
verification, Capture, and the Virtex SelectMAP interface. This allows for quick and easy
functional verification of applications that use Programmable Logic.
Additionally, the MultiLINX cables’internal hardware is upgraded via software. This allows for
future expansion of cable features and software support. Upgrades are completely seamless
and invisible to the user.
Application Note: HW-MultiLINX
XAPP168 (v1.1) February 8, 2000
Getting Started With the MultiLINX™
Cable
Author: Carl Carmichael
R

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Getting Started With the MultiLINX™Cable R
Obtaining the
MultiLINX Cable Alliance and Foundation 2.1i software packages are shipped with a mail-in form to purchase
the MultiLINX cable. The MultiLINX cable may also be purchased over the internet, or by credit
card orders by contacting the Xilinx Customer Service Hotline.
Figure 1: MultiLINX Cable Pod and Attachments

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MultiLINXCable
Software
Support
Alliance and Foundation version 2.1i is the first version of Xilinx software to support the
MultiLINX cable. Additionally, a new software tool, ChipScope, is also now available for use with
the MultiLINX system. Please refer to Table 1 for a cross reference of software feature support.
Hardware Debugger 2.1i
The Hardware Debugger program is a standard feature for the Alliance and Foundation series
software packages. The Hardware Debugger version 2.1i currently supports the use of the
MultiLINX Cable for FPGA Configuration and Verification. XC4000 and Spartan Series FPGAs
may be configured and verified serially through the MultiLINX Cable, refer to Table 1. Virtex
series FPGAs may be configured in the serial mode, and may be configured as well as verified
using the SelectMAP interface. The SelectMAP interface uses a byte-wide parallel data bus.
The high speed USB connection to the MultiLINX Cable is supported on Windows 98 and 95c
platforms. The RS232 serial connection is supported on Windows 95/98/NT and Solaris/HP
UNIX platforms.
ChipScope 1.0
The ChipScope functional verification tool is currently sold separately through the Xilinx
website. This program uses the MultiLINX Cable exclusively and currently only supports Virtex
series FPGAs. ChipScope uses the SelectMAP interface of Virtex to support Configuration,
Verification, and Internal Logic State Capture. Capture allows for the functional verification and
debugging of the FPGAs’configured design.
ChipScope supports the high speed USB interface to the MultiLINX Cable on Windows 98/95c
platforms and the RS232 connection on Windows 95/98/NT platforms. UNIX support is not
available.
JTAG Programmer 2.1i
The JTAG Programmer does not currently have support for the MultiLINX Cable; However, this
will be added in a future service pack/release. The JTAG Programmer is also a standard feature
of the Alliance and Foundation software packages. Future support will allow the use of the
MultiLINX cable to program Xilinx ISP devices through the Boundary Scan (JTAG) interface.
Table 1: Software Support Cross-reference
S/W Family Configuration Verification Capture
Hardware
Debugger
2.1i
Virtex SS/SM SM NS
Spartan SS SS NS
XC4000 SS SS NS
XC3000 SS NS NS
ChipScope
1.0
Virtex SM SM SM
Spartan N/A N/A N/A
XC4000 N/A N/A N/A
XC3000 N/A N/A N/A
Notes:
SS = Slave Serial
SM = SelectMAP
NS = Not Supported
NA = Family is not applicable

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Getting Started With the MultiLINX™Cable R
The MultiLINX
System The MultiLINX cable comes complete with the MultiLINX pod, a USB cable, a 9-pin com port
RS232 serial cable with two 25-pin com port adapters (male and female conversion), four sets
of flying leads, warranty form and connection guide.
Connecting to
the Host
Computer
The MultiLINX cable pod may be connected to either the RS232 serial cable or the USB cable.
Only one cable should be used at a time. However, if both cables are connected the RS232
serial cable will override the USB connection.
The RS232 cable may be connected directly to the 9-pin com port of a PC. The 25-pin adapter
allows for connections to the 25-pin serial com port of a PC or UNIX Workstation.
The USB cable is keyed for a "Hos" connection at one end (rectangular) and a “function”
connection at the other end (square). The square end connects to the MultiLINX cable pod. The
rectangular end may be connected to the USB 1 or USB 2 port of a PC or to a USB Hub. Most
PCs today come with USB ports included on the motherboard. If your PC does not have a USB
port it may be possible to add a USB card to your system. Please consult your PC manufacturer
for accessories.
Connecting to a
Target System The MultiLINX Cable has four sets of flying-lead connectors that are used to connect to a users’
target system. The lead ends fit standard 25-mil header pins. Such pins are commercially
available in either Wire-wrap or Solder-end style in break-away sections with 1/10 in. spacing.
The target end of the leads are loose. So, board placement of the header pins is not relevant as
long as they are no more than a few inches from each other. Extending the leads is possible,
but may introduce noise which may interfere with the cable’s operation.
The PWR and GND leads may either be connected to the target system or a separate power
supply; However, GND should always be common between the target system and the
MultiLINX cable for proper I/O communication. The MultiLINX cable requires a 3.3V input on
the PWR lead and requires ~600 mA nominally. For more information on the operating
specifications of the MultiLINX cable, consult the MultiLINX data sheet.
The I/O and configuration port connections support LVTTL I/O standard for either 5V, 3.3V, or
2.5V specifications. Current FPGAs and CPLDs use the LVTTL 3.3V standard. The following
sub-sections provide the required lead connections for the currently supported configuration
interfaces.
Slave Serial Connection
The Slave Serial Configuration Mode for any FPGA requires the use of the following leads:
•PROG
•CCLK
•DONE
•INIT
•DIN
These connections are shown in Figure 2. For more information on the Slave Serial
Configuration Mode please consult the data sheet for the target FPGAs’family type (e.g.,
Spartan-XL).

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Additionally, if Configuration Verification is also to be performed on XC4000 or Spartan series
FPGAs, shown in Figure 3, then the following leads must also be used:
•RT
•RD
Figure 2: Serial Configuration
x168_02_091999
Xilinx Device
MultiLINX Connectors
VCC
Circuit Board
(Optional)
Note: Pull-up resistors are 4.7k ohm
VCC
VCC
M2
TCK
User I/O: RESET
INIT
PROG
DIN
DONE
CCLK
PWR
GND
CCLK
DONE (D/P)
DIN
PROG
INIT
RST
RT
RD (TDO)
TRIG
TDI
TCK
TMS
CLK1-IN
CLK1-OUT
TMS
VCC
M1
VCC
M0
VCC
VCC
VCC VCC
D0
D1
D2
D3
D4
D5
D6
D7
CS0 (CS)
CS1
CS2
CLK2-IN
CLK2-OUT
WS
RS (RDWR)
RDY/BUSY
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Getting Started With the MultiLINX™Cable R
Note: Serial verification is not used with Virtex FPGAs.
SelectMAP Connection
The SelectMAP interface to Virtex FPGAs, shown in Figure 4, require the use of the following
leads:
•PROG
•CCLK
•DONE
•INIT
•D0 - D7
•RS (RDWR)
Figure 3: Serial Configuration and Verify
x168_03_091999
Xilinx Device
MultiLINX Connectors
VCC
Circuit Board
(Optional: Only Used for Probling)
Note: Pull-up resistors are 4.7k ohm
VCC
VCC
M2
TCK
User I/O: RESET
INIT
PROG
DIN
DONE
CCLK
User I/O: RT
User I/O: RD
User I/O:TRIGGER
PWR
GND
CCLK
DONE (D/P)
DIN
PROG
INIT
RST
RT
RD (TDO)
TRIG
TDI
TCK
TMS
CLK1-IN
CLK1-OUT
TMS
GCK (x)System Clock (x)
GCK (y)
VCC
M1
VCC
M0
VCC
VCC
VCC VCC
D0
D1
D2
D3
D4
D5
D6
D7
CS0 (CS)
CS1
CS2
CLK2-IN
CLK2-OUT
WS
RS (RDWR)
RDY/BUSY
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System Clock (y)

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No other connections are necessary even if Verification is to be performed. However, if Capture
is to be used, shown in Figure 5, then the following additional leads must also be used:
•WS
•RT
•RST
Figure 4: SelectMAP Configuration and Verify
x168_04_091999
Xilinx Device
MultiLINX Connectors
Circuit Board
Note: Pull-up resistors are 4.7k ohm
VCC
M2
D7
D6
D5
D4
D3
D2
D1
D0
BUSY/DOUT INIT
PROG
DONE
CCLK
PWR
GND
CCLK
DONE (D/P)
DIN
PROG
INIT
RST
RT
RD (TDO)
TRIG
TDI
TCK
TMS
CLK1-IN
CLK1-OUT
WRITE
VCC
M1
VCC
M0
VCC VCC VCC
CS
D0
D1
D2
D3
D4
D5
D6
D7
CS0 (CS)
CS1
CS2
CLK2-IN
CLK2-OUT
WS
RS (RDWR)
RDY/BUSY
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Getting Started With the MultiLINX™Cable R
Boundary Scan Connection
Boundary Scan connections, shown in Figure 6, need only use the standard four JTAG leads:
•TMS
•TCK
•TDI
•TDO
However, reconfiguration requires access to the PROG pin.
•PROG
Figure 5: SelectMAP With Capture
x168_05_091999
Xilinx Device
MultiLINX Connectors
Circuit Board
Note: Pull-up resistors are 4.7k ohm
VCC
M2
D7
D6
D5
D4
D3
D2
D1
D0 User I/O
User I/O: TRIGGER
BUSY/DOUT
INIT
PROG
DONE
CCLK
GCK (x)
User I/O
Capture Control
Logic
User Logic
Filp-flops and Latches,
LUTRAMs,
and Block RAMs
PWR
GND
CCLK
DONE (D/P)
DIN
PROG
INIT
RST
RT
RD (TDO)
TRIG
TDI
TCK
TMS
CLK1-IN
CLK1-OUT
WRITE
VCC
M1
VCC
M0
CS
GCK (y)
System Clock (y)
CAPTURE
CAPCLK
D0
D1
D2
D3
D4
D5
D6
D7
CS0 (CS)
CS1
CS2
CLK2-IN
CLK2-OUT
WS
RS (RDWR)
RDY/BUSY
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Specifications
for the
MultiLINX Cable
Features
Supports serial download, verification and debug for any size FPGA:
•4000XL, XLA, XV Spartan, Virtex and Spartan-XL families.
•Supports JTAG configuration for 9500 CPLD family and 4000XL, XLA, XV Virtex, Spartan
and Spartan XL FPGA families
•12 MB/s full-speed USB device
•Direct Connection: No voltage 2.5V or 3.3V adapters required
•Supports 5V, 3.3V and 2.5V voltage standards
•USB certified and compliant
•Accepts any supply voltage from 2.5V to 5V as power input (from target application or
external power supply)
•Comes complete with USB cable, RS-232 cable, DB25M to DB9M adapter, and DB25F to
DB9M adapter
•Configures to target hardware with four versatile flying wires
•Compatible with 5.0V, 3.3V and 2.5V target systems
Figure 6: Boundary Scan
x168_06_091999
Xilinx Device
MultiLINX Connectors
Circuit Board
(Only XC4000 and SPARTAN)
(Only XC4000 and SPARTAN)
Note: Pull-up resistors are 4.7k ohm
M2
TMS
PWR
GND
CCLK
DONE (D/P)
DIN
PROG
INIT
RST
RT
RD (TDO)
TRIG
TDI
TCK
TMS
CLK1-IN
CLK1-OUT
TCK
TDI
INIT
PROG
TDO
M1
(See Data Sheet of the Device, if Applicable)
M0
D0
D1
D2
D3
D4
D5
D6
D7
CS0 (CS)
CS1
CS2
CLK2-IN
CLK2-OUT
WS
RS (RDWR)
RDY/BUSY
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Getting Started With the MultiLINX™Cable R
The new MultiLINX TM cable takes advantage of the USB port found on newer PCs. MultiLINX
delivers the ultimate in download performance: Up to 12 Mbits/second throughput.MultiLINX
features an adjustable voltage interface that enables it to talk to systems and I/Os operating at
5V, 3.3V, or 2.5V.
Software support for the MultiLINX cable is provided in version 2.1i of the Alliance Series and
Foundation Series software products.
The MultiLINX Cable is "CE" compliant as specified by the EMC Directives EN 55022 and EN
50082-1.
The MulitiLINX Cable consists of electronics housed in a 3.33" x 5.06"”x 1.03" plastic case.
This assembly weighs 5.8 oz. (160 gm.) At one end of the case are the RS232 and USB
connectors. Four "flying wire" sets are supplied to attach to headers on the top of the unit to the
customer’s Xilinx device. There is a red status LED. Either the USB or RS232 cable can be
used to attach MultiLINX to the host computer (but not both). The shipping weight is 1.5 lbs.
(690 gm.).
MultiLINX can communicate with the host computer via an RS232 compatible serial port. A
DB9F connector is used for the RS232 port on the MultiLINX Cable. A DB9F to DB9M cable is
supplied. Two DB9 to DB25 adapters (M & F) are also supplied for connecting to workstation
platforms.
MultiLINX can also communicate with the host computer via a USB (Universal Serial Bus)
compatible serial port. The supplied shielded USB cable has a Type "“A" style plug to connect
to the host computer port. At the other end of the USB cable is a Type "B" style plug which
connects to the MultiLINX Cable’s connector.
Table 2: RS232 Maximum Baud Rate Support
Computer Platform Maximum Baud Rate
PC Compatible 57,600 baud
SPARC 38,400 baud
HP 38,400 baud
Table 3: USB Platform Support
Computer Platform/OS USB Support (12 Mbits/s)
PC Compatible/Windows 98 Yes
SPARC N/A
HP N/A
Note: The MultiLINX Cable does not get its power from the USB
port.

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MultiLINX
Operating
Characteristics
Revision
History
Table 4: Recommended Operating Conditions
Parameter Operating Non-Operating
DC Voltage 2.5V to 5.0V N/A
Maximum Applied DC
Signal Voltage per
Flying Wire
–0.5V to 5.5V N/A
Typical Current
Requirements 300mA @ 5.0V,
500mA @ 3.3V,
750mA @ 2.5V
N/A
Power Req. 2 Watts Max. N/A
Temp. Range 0°C to 55°C–40°Cto 85°C
Altitude –100 to 15000 ft –1000 to 50000 ft
Table 5: Reliability Characteristics
Parameter Operating Non-Operating
Relative Humidity 5% to 90% (non-condensing at 40°C) 5% to 95% (noncondensing at 65°C)
Vibration 0.5mm (pp), 5 - 55 Hz 1.5mm (pp), 5 - 55 Hz
Shock 5.0G, 11 ms, 1/2 sine 30G, 11 ms, 1/2 sine
Bench Drop Threefootdropontoasolidsurfacewithno
physical damage Three foot drop onto a solid surface with no physical
damage
Notes:Each of MultiLINX Cable’s Flying wiresis capable of driving a total capacitive load of 100 pF; Each of MultiLINX Cable’s Flying
wires is capable of driving a total pull-up resistance of 500 ohms; Each of MultiLINX Cable’s Flying wires is capable of driving
a total pull-down resistance of 5000 ohms.
Date Version Revision
10/6/99 1.0 Initial Xilinx release.
2/8/00 1.1 Updated format and Figure 1.
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