Xycom AHIP-370 User manual

AHIP-370
Advanced High
Integration Platform
with PPGA Celeron®
Processor
P/N 350370(C)


2002 XYCOM AUTOMATION, INC. Printed in the United States of America

AHIP-370 Manual
2
Revision Description Date
A Manual Released 10/99
B Update Jumper Locations 11/00
C Touchscreen Update 07/02
Trademark Information
Brand or product names are registered trademarks of their respective owners.
Windows is a registered trademark of Microsoft Corp. in the United States and other countries.
Copyright Information
This document is copyrighted by Xycom Automation Incorporated (Xycom) and shall not be reproduced or copied
without expressed written authorization from Xycom.
The information contained within this document is subject to change without notice. Xycom does not guarantee the
accuracy of the information and makes no commitment toward keeping it up to date.
Xycom Automation
750 North Maple Road
Saline, MI 48176–1292
734 - 429-4971 (phone)
734 - 429-1010 (fax)

Table of Contents
3
Table of Contents
Chapter 1 Introduction...............................................................................................................................5
Product Overview......................................................................................................................................5
Module Features .......................................................................................................................................5
Architecture ...............................................................................................................................................6
Local Bus Interfaces..................................................................................................................................7
Fast IDE controller ...............................................................................................................................7
Accelerated Graphics Port (AGP) .............................................................................................................7
XGA Graphics Controller......................................................................................................................7
On-board Memory.....................................................................................................................................8
DRAM...................................................................................................................................................8
Flash BIOS...........................................................................................................................................8
Non-volatile SRAM...............................................................................................................................8
DiskOnChip 2000.................................................................................................................................8
Serial and Parallel Ports............................................................................................................................9
USB...........................................................................................................................................................9
Keyboard Interface....................................................................................................................................9
Hard and Floppy Drives.............................................................................................................................9
Environmental Specifications ..................................................................................................................10
Hardware Specifications..........................................................................................................................11
Chapter 2 – Installation............................................................................................................................13
Configuration Options..............................................................................................................................14
Jumpers...................................................................................................................................................14
System Interrupts ....................................................................................................................................16
DMA Mapping..........................................................................................................................................17
Memory Map............................................................................................................................................17
I/O Map....................................................................................................................................................18
Registers .................................................................................................................................................20
Register 231h – Miscellaneous Control...................................................................................................20
Register 233h – Flash BIOS Control.......................................................................................................20
Register 234h - I/O Port Location............................................................................................................21
I/O Range Select................................................................................................................................21
Offset Registers.......................................................................................................................................22
Offset 0 Page Register for Programming (Port Address) ..................................................................22
Offset 1 Page Register for Programming (Port Address +1) .............................................................23
Connectors..............................................................................................................................................23
Parallel Port Connector (PARCOM2)......................................................................................................23
Serial Port Connectors ............................................................................................................................23
COM1 Connector (COM1) .................................................................................................................23
COM2 Connector (PARCOM2)..........................................................................................................23
PS/2 Keyboard/Mouse Connector (KBMS1)......................................................................................24
Internal Keyboard Connector (KYBD1)..............................................................................................24
VGA (Video) Connector (VGA1)..............................................................................................................24
Floppy Drive Connector (FDD1 and FDD2) ............................................................................................24
Internal Mouse Connector (MS2)............................................................................................................24
Internal LED Connector (LEDMSC1) ......................................................................................................24
LED In Keypad Connector.......................................................................................................................24
ISA/IDE Backplane Connector (ATIDE1)................................................................................................25
IDE Connector (HDD1)............................................................................................................................25
Power Connector (PWR1).......................................................................................................................25
Touch Control Connector (TCTRL1).......................................................................................................25
Touch Connector (TCH1)........................................................................................................................25
Flat Panel Connector (FPNL1 and FPNL2).............................................................................................25

AHIP-370 Manual
4
Backlight Inverter Connector (DCINV1) ..................................................................................................25
Chapter 3 – BIOS Setup Menus...............................................................................................................27
Moving through the Menus......................................................................................................................27
BIOS Main Setup Menu...........................................................................................................................28
IDE Submenu..........................................................................................................................................29
Cache Submenu......................................................................................................................................30
Advanced Menu.......................................................................................................................................31
I/O Device Configuration Submenu.........................................................................................................32
Advanced Chipset Control Submenu......................................................................................................33
On-board Socket Site Submenu..............................................................................................................34
Flat Panel Submenu................................................................................................................................35
Security Menu..........................................................................................................................................36
Power Menu ............................................................................................................................................37
Device Monitoring Submenu ...................................................................................................................38
Boot.........................................................................................................................................................39
Exit Menu.................................................................................................................................................40
BIOS Compatibility ..................................................................................................................................40
Appendix A - DRAM Installation...............................................................................................................41
Appendix B – Video Modes......................................................................................................................43
Introduction..............................................................................................................................................43
Video Modes............................................................................................................................................43
Standard Modes......................................................................................................................................43
Extended Modes .....................................................................................................................................44
Windows 3.1............................................................................................................................................45
Windows ‘95............................................................................................................................................46
Appendix C – Pinouts...............................................................................................................................49
VGA Connector (VGA1)..........................................................................................................................49
COM1 Connector RS-232/RS-485 (COM1_4)........................................................................................50
LPT1/COM2 RS-232 Connector (PARCOM2) ........................................................................................50
DCIN1 Power Connector (PWR1)...........................................................................................................52
Touch Control Connector (TCTRL1).......................................................................................................53
Touch Connector (TCH1)........................................................................................................................54
Internal Mouse Connector (MS2)............................................................................................................54
Internal LED Connector (LEDMSC1) ......................................................................................................55
LED In_Keypad Connector (LEDKB1).....................................................................................................55
Flat Panel Connector (FPNL1 and FPNL2).............................................................................................56
Backlight Inverter Connector (DCINV1) ..................................................................................................56
Internal Keyboard Connector (KYBD1) ...................................................................................................57
PS/2 Keyboard/Mouse Connector (KBMS1) ...........................................................................................57
Internal Floppy Connector (FDD1) ..........................................................................................................57
External Floppy Connector (FDD2).........................................................................................................58
IDE Connector (HDD1)............................................................................................................................59
ISA/IDE Backplane Connector (ATIDE1)................................................................................................60
PCI Backplane Connector (PCIMG1)......................................................................................................62
Keypad connector (KEYPAD1)................................................................................................................64
USB Connector .......................................................................................................................................64

Chapter One - Introduction
5
Chapter 1 Introduction
Product Overview
The Xycom Automation Advanced High-Integration Platform 370 (AHIP-370) board
is developed expressly for use in Xycom’s line of flat panel industrial personal com-
puters. It is based on the AHIP6 but is optimized in design, layout, and features for
use with flat panel computer systems. This integrated design approach allows Xycom
industrial PC/ATs to incorporate “Big PC” features in an extremely compact pack-
age. These “Big PC” features include AGP video PCI/ISA expansion, Celeron CPU,
full-size hard disk, status LEDs, infrared port, and integrated touchscreen.
Module Features
•Supports
•66 MHz and 100 MHz front side bus
•Intel Celeron® processors (PPGA package)
•32 MB - 256 MB DRAM DIMMs
•AGP local bus XGA graphics with 2 MB integrated DRAM
•Up to 1024x768\256 colors non-interlaced
•640x480x256K, 800x600x64K, 1024x768x256 color TFT panels
•PCI fast IDE controller
•Two 16550-compatible serial ports
•COM 1 is RS-232, or RS-485
•COM 2 is RS-232 port, or Infrared (IR or IrDA), or Touchscreen
•Centronics-compatible parallel port
•Floppy Controller (only one floppy supported)
•Internal FFC connector
•External connector
•Touchscreen interface (COM 2 or PS/2 mouse port)
•PS/2 keyboard port
•Real time clock and battery
•Disk on a chip supported (DOC 2000)
•32Kx8 and 128Kx8 nonvolatile RAM supported
•LED interface
•Designed specifically for Xycom Automation industrial PC/ATs.

AHIP-370 Manual
6
Architecture
Figure 1-1. AHIP-370 Block diagram

Chapter One - Introduction
7
Local Bus Interfaces
The Celeron design uses the 440BX chip set. The 440BX integrates a high perform-
ance interface from PCI to IDE. This interface is capable of accelerated data transfers.
The 440BX chipset provides an accelerated PCI-to-ISA interface that includes
•A high-performance enhanced IDE controller
•PCI and ISA master/slave interfaces
•Plug-and-play port for on-board devices
The chipset also provides many common I/O functions found in ISA-based PC sys-
tems, including:
•Seven-channel DMA controller
•Two 82C59 interrupt controllers
•8254 timer/counter
•Control logic for NMI generation
Fast IDE controller
The high-speed local bus IDE controller supports programmed I/O modes 0-4. It also
provides 4x32-bit read-ahead buffer and 4x32-bit write-post buffer support to en-
hance IDE performance.
Accelerated Graphics Port (AGP)
XGA Graphics Controller
The AGP bus controller supports CRT displays and flat panel displays with 2 MB
video memory. The controller also supports resolutions of 640x480, 800x600, and
1024x768 with 64K colors.

AHIP-370 Manual
8
Note
The IDE controller supports enhanced PIO modes, which reduce the cy-
cle times for 16-bit data transfers to the hard drive. Check with your
drive manual to see if the drive you are using supports these modes. The
higher the PIO mode, the shorter the cycletime.
Select the PIO modes in the BIOS setup (refer to Chapter 3). The auto-
configure classifies the drive connected if the drive supports the auto ID
command. If you experience problems, change the PIO to standard.
On-board Memory
DRAM
The AHIP-370 has two 168-pin DIMM memory sites, providing up to 256 MB of
SDRAM (with up to 512 MB capability in the future). The memory site is populated
by 100 MHz synchronous DRAM.
Flash BIOS
The AHIP-370 board uses a Flash BIOS. Flash is used for system BIOS and video
BIOS.
Non-volatile SRAM
The AHIP-370 hardware supports non-volatile SRAM. Contact Xycom Automation
at 1-800-AT-XYCOM (1-800-289-9266) for additional information about this fea-
ture.
The SRAM comes in a module type package and contains a built-in battery and bat-
tery backup circuitry. The battery life is approximately seven years in the absence of
VCC. The SRAM supports 32Kx8 and 128Kx8 memory sizes. The RAM comes in a
32 pin dip (0.6 inches wide) standard format.
SRAM can be located at: CC000, D0000, or D8000.
DiskOnChip 2000
The DiskOnChip 2000 is a single-chip Flash disk in a standard 32-pin DIP format.
It requires an 8 Kbyte window to view as an extension BIOS. During boot up, the
DiskOnChip loads its software in the PC’s memory and installs itself as an addi-
tional drive.

Chapter One - Introduction
9
Serial and Parallel Ports
PC/AT peripherals include two high-speed, RS-232, 16550-compatible serial ports
and one bi-directional Centronics-compatible parallel port:
•COM 1 of the serial ports accepts either RS-232 or RS-485 connections.
•COM 2 is RS-232 (stacked DB 25) with parallel port.
The COM2 port can be used for one of three options:
•Serial port out the 25 pin DB connector
•Touchscreen controller interface
•Infrared (IrDA) interface
The BIOS setup is used to configure the port as a serial port or IrDA port. This port
can be used as both a serial interface and an IR interface, by allowing software to
control the connection.
If the touchscreen controller is jumpered to use COM2, the 25-pin DB connector
must not be used to interface to a device. These lines are combined internally. The
BIOS setup menu for COM2 must be set to standard operation to use the touchscreen
controller on COM2.
USB
USB (Universal Serial Bus) is a "plug-and-play" interface between a computer and
add-on devices (such as audio players, joysticks, keyboards, telephones, scanners,
and printers). With USB, a new device can be added to your computer without hav-
ing to add an adapter card or even having to turn the computer off. USB supports a
data speed of 12 megabits per second. This speed will accommodate a wide range of
devices, including MPEG-2 video devices, data gloves, and digitizers.
Keyboard Interface
The keyboard interface uses a standard PS/2-style connector. A polyswitch protects
the +5 V. This device opens if the +5 V is shorted to GND. Once you remove the
shorting condition, the polyswitch allows current flow to resume.
Hard and Floppy Drives
The floppy interface supports one floppy drive. The AHIP-370 can interface to a
floppy via the on-board floppy connector or the external floppy connector.
In order to connect a floppy drive to the external connector after power up, the
floppy drive must be setup for a 1.44 MB drive and the floppy drive test must be dis-

AHIP-370 Manual
10
abled. If this is not done the system generates a floppy drive error during the POST
(Power On Self Test).
The enhanced IDE (EIDE) interface supports up to 2 hard drives. Hard drive inter-
face is via the Xycom plug-in backplane or the on-board IDE controller.
Caution
The higher the PIO mode, the shorter the cycletime. As the IDE cable
length increases, this reduced cycle time can lead to erratic operation.
The total IDE cable length must not exceed 18 inches. If two IDE drives
are connected, they must not be more than six inches apart.
Environmental Specifications
Table 1-1. Environmental Specifications
Characteristic Specification
Temperature
Operating
Non-operating 0° to 55° C (32° to 140° F) -40° to 85°C (-40° to 185°F)
Humidity
Operating
Non-operating 20% to 80% RH noncondensing 20% to 80% RH noncondensing
Altitude
Operating
Nonoperating Sea level to 10,000 feet (3048 m) Sea level to 50,000 feet (15240 m)
Vibration a (3512, 3515 systems b)
Operating
Nonoperating
5 to 55Hz
0.006” peak to peak displacement
56-2000 Hz
1.0g maximum acceleration
5-55 Hz
0.006” peak to peak displacement
56-2000 Hz
2.5 g maximum acceleration
Shock a (3512, 3515 systems b)
Operating
Nonoperating 15g peak acceleration, 11 msec duration 30g peak acceleration, 11 msec duration
aThese values are with solid state hard drives and NOT rotating media drives
bConsistent with system level specifications. See your system manual if you have a system other than
the 3512 or 3515 models.

Chapter One - Introduction
11
Hardware Specifications
Table 1-2. Hardware Specifications
Characteristic Specification
Power Specifications: The CPU
power supply on the AHIP-370
provides a voltage range of 1.30V
to 2.05V in increments of 50mV.
The CPU selects its voltage
through its four outputs VID3-
VID0. The supply was changed to
accommodate future Socket370
CPUs which will run at lower volt-
ages.
The maximum current that the supply can deliver is 19A.
CPU speed 300 MHz, 366 MHz, and 433 MHZ
AGP Super VGA Graphics Con-
troller 640x480, 800x600, and 1024x768, 64K colors maximum resolution 2 MB video DRAM
Serial Ports (2) COM1 is RS-232 or RS-485
COM2 is RS-232, or IR, or Touchscreen
Both 16550 compatible
Parallel Interface Centronics compatible
On-board memory Up to 256 MB; 66 MHz SDRAM

Chapter Two - Installation
13
TOUCH
CONTROL
CONN.
BACKLIGHT
INVERTER
CONN.
INTERNAL
MOUSE
CONN.
LED IN
KEYPAD
CONN.
TOUCH
CONN. KEYPAD
CONN.
COM2
RS-232
(TOP)
PARALLEL
(BOTTOM)
CONNS.
COM1
RS-485
(TOP)
RS-232
(BOTTOM)
CONNS.
EXTERNAL
MOUSE
(TOP)
KEYBOARD
(BOTTOM)
CONNS.
USB
CONN.
VIDEO
CONN.
INTERNAL
FLOPPY
CONN.
EXTERNAL
FLOPPY
CONN.
INTERNAL
KEYBOARD
CONN.
LED
CONN. ATI/IDE1
BACKPLANE
CONN.
POWER
CONN.
HDD1
CONN.
SYSTEM
FAN
CONN.
FLAT
PANEL
CONN.
CPU
FAN
CONN.
J17
Chapter 2 – Installation
This chapter provides information on configuring the AHIP-370 Processor Module.
Pinouts for the connectors are located in Appendix C.
Figure 2-1 illustrates the jumper and connector locations on the AHIP-370.
Figure 2-1. AHIP-370 Jumper and Connector Locations

AHIP-370 Manual
14
Configuration Options
Jumpers
The following tables list AHIP-370 jumpers, their default positions and their func-
tions. The jumpers marked “Access” are placed at the top of the board for easy cus-
tomer access.
Table 2-1. AHIP-370 Jumpers
Jumper Position Function
J1 A
BPush button reset switch DISABLED (Access) Push button reset switch ENABLED
J2 A
BCMOS OK (Access) Clear CMOS
J3 A
BFlat panel selected (Access) CRT selected
J4 A
BNormal Program the H8
J7 A
BBoot flash enabled Boot ROM enabled
J8 A
BEnables RS-485 port in the assertive state. Enables RS-485 port in the negated state.
J9 A
BDTR used to control the RS-485 port RTS used to control the RS-485 port
J18 A
BVGA ENABLED VGA DISABLED
The BIOS recovery scheme used on the AHIP6 utilizes a jumper (J5) to select recov-
ery mode. The Flash Programmable Gate Array (FPGA) at U15 uses this to define
the state of address signal A18 into the flash chip. According to the following table:
J5* Mode Flash A18 state
A Normal Inverted
B Recovery Not Inverted
*Recent changes in flash technology have mandated that J5 be in the B position for
normal operation. This is confusing, as it is contrary to the design documentation
and user manual. Because of this, J5 has been eliminated on the AHIP-370. A 1K
pull-down resistor is connected to signal XD (4) to simulate the B position.

Chapter Two - Installation
15
The following table outlines the changes in jumper configurations between the
AHIP-370 and AHIP6:
Table 2- 2. Changes in Jumper Configuration
AHIP6
Jumper AHIP-370 Jumper Description Comments
J6 N/A Controls the speed of the CPU The socket370 implementation by Intel calls
for the CPU to define its own speed and not
be determined by jumpers. There are no
jumpers on the AHIP-370 for this purpose.
J1 J1 A PB reset disabled
B PB reset enabled PB refers to an external pushbutton that may
be connected through the RS-232 interface.
J2 J2 A CPU will not clear CMOS on
power up
B CPU will clear CMOS
J3 J3 A Flat panel enabled
B CRT port enabled
J4 J4 A Normal operation
B Puts H8 in program mode
J5 N/A A Normal flash boot
B Recovery flash boot See above.
J7 J7 A CPU boots from flash
B CPU boots from ROM
J18 N/A A Onboard video enabled
B Onboard video disabled The video is always enabled on the AHIP-370.
If an external VGA adapter is plugged into the
system, the BIOS will disable the onboard
chip.
N/A J8 A The asserted state will enable
the RS-485 port.
B The negated state will enable
the RS-485 port.
Refers to the state of the modem control
signal selected by J9.
N/A J9 A DTR is used to control the
RS-485 port.
B RTS is used to control the
RS-485 port.
J8 and J9 function together to control the
RS485 port.
RS-485 TriState Control
On the AHIP6, the RS-485 is enabled by
asserting DTR. Two jumpers were added to
the AHIP-370 to allow either DTR or RTS to
control the RS-485 drives and determine
whether the asserted or negated state will
enable it.
J8 J10 Used to program Lattice
component. Factory use only.
NA J14, 15, 16,
17 OUT = Xycom Controller, PS/2 Mode
IN = Xycom Controller, Serial
Mode
These jumpers allow the PS/2 AUX port and
interlink mouse to pass through the Xycom
controller.

AHIP-370 Manual
16
IN = Microtouch Controller, any
mode
J19 J11 Connecting the two pins will
reset the CPU. Factory use only for emulators.
N/A J12 Forces front-side bus to run at
66MHz. Factory use only.
All AHIP-370 jumpers are factory set in the "A" position.
System Interrupts
The following table describes the interrupts used on the AHIP-370.
Table 2- 3. System Interrupts
Interrupt Function
IRQ0 System Timer
IRQ1 Keyboard
IRQ2 Cascade
IRQ3 Serial Port*
IRQ4 Serial Port*
IRQ5 Parallel Port*
IRQ6 Floppy Controller
IRQ7 Parallel Port*
IRQ8 Real Time Clock
IRQ9 Unused
IRQ10 Serial Port*
IRQ11 Serial Port*
IRQ12 Mouse Port
IRQ13 Math Co
IRQ14 Fixed Disk
IRQ15 Unused
* BIOS setup controlled
The BIOS setup menu controls the interrupts for the serial and the parallel port.
The two Serial ports on the AHIP-370 board can be mapped to any two of the fol-
lowing interrupts: 3, 4, 10, & 11 (defaults are interrupts 3 and 4). One parallel port
can be mapped to IRQ5 or IRQ7. The BIOS setup menu is used to control the loca-
tion and interrupts for the serial and parallel ports.
Note
The BIOS controls the mapping of the AGP interrupts to AT-bus inter-
rupts. This means if a AGP device is plugged into a slot and needs an
interrupt, one of the AT-bus interrupts must be mapped to the AGP inter-
rupt.

Chapter Two - Installation
17
DMA Mapping
Table 2-4. DMA Channels
DMA Function
DMA0 Unused (Could be used for EPP/ECP parallel port option)
DMA1 Unused
DMA2 Floppy Controller
DMA3 Unused (Could be used for EPP/ECP parallel port option)
DMA5 Unused
DMA6 Unused
DMA7 Unused
DMA channels 0-3 are 8-bit and DMA channels 5-7 are 16-bit. When the ECP option
is enabled, one of the 8-bit DMA channels is used.
Memory Map
The following table shows the AHIP-370 memory map. The I/O designation refers to
memory viewed as part of the AT bus.
Table 2- 5. Memory Map
Address Range (HEX) Size Device
FFFE0000 - FFFFFFFF 128K SYSTEM BIOS
end of DRAM - FFFDFFFF xxxK I/O Memory
00100000 - end of DRAM xxxK DRAM*
000F0000 - 000FFFFF 64K SYSTEM BIOS
000E0000 - 000EFFFF 64K SYSTEM BIOS
000D0000 - 000DFFFF 64K AT bus I/O
000C0000 - 000CBFFF 48K VGA BIOS
000A0000 - 000BFFFF 128K VGA DRAM MEMORY
00000000 - 0009FFFF 640K DRAM
*See Intel 430BX data sheet for a description of optional settings for assigning
memory holes or gaps within memory map area.

AHIP-370 Manual
18
I/O Map
The I/O map for the AHIP-370 in Table 2- 6 contains all the I/O ports of the IBM AT
architecture with some additions.
Table 2- 6. I/O Map
Hex Range Device
000-01F DMA controller 1, 8237A-5 equivalent
020-021 Interrupt controller 1, 8259 equivalent
022-024 Available
025-02F Interrupt controller 1, 8259 equivalent (see Note 3)
040-05F Timer, 8254-2 equivalent
060-06F 8742 equivalent (keyboard)
070-07F Real Time Clock bit 7 NMI mask (see Note 3)
080-091 DMA page register (see Note 3)
092 Reset/ Fast Gate A20
93-9F DMA page register (see Note 3)
0A0-0BF Interrupt controller 2, 8259 equivalent (see Note 3)
0C0-0DF DMA controller 2, 8237A-5 equivalent (see Note 3)
0F0 N/A
0F1 N/A
0F2-0F3 N/A
0F4 IDE ID port
0F5-0F7 N/A
0F8 IDE Index port
0F9-0FB N/A
0FC IDE Data port
0FD-0FF N/A
100 Available
102 C&T Global enable register
103-179 Available
180-181 SRAM control register (May be remapped based on I/O port 234h)
182-1EF Available
1F0-1F7 IDE Controller (AT Drive)
1F8-22F Available
231 Xycom LED port
233 Xycom Flash control register
234 Xycom IO port control register
278-27F Parallel Port 2 (see Note 1)
280-2F7 Available
2F8-2FF Serial Port 2 (see Note 1)
300-36F Available
370-377 Alt. Floppy Disk Controller (see Note 1)
378-37F Parallel Port 1 (see Note 1)
380-3AF Available
3B0-3BB mono mode video

Chapter Two - Installation
19
Hex Range Device
3BC-3BF reserved for parallel port
3C0-3CF VGA registers (see Note 2)
3D0-3DF CHIPS flat panel & color mode registers
3E0-3EF Available
3F0-3F7 Primary Floppy disk controller
3F8-3FF Serial port 1 (see Note 1)
CF8 AGP configuration address register (see Note 4)
CFC AGP configuration data register (see Note 4)
Note 1
Since serial and parallel port addresses can be changed or the port may
be disabled, these addresses can be used for some applications and not
for others.
Note 2
Reference the C&T69000 advance data book for detailed information.
Note 3
Reference the Intel 430BX chip set data book for detailed information.
Note 4
Reference the following for AGP configuration: AGP local bus specifi-
cation rev 2.1, Intel 430BX chip set data book, and C&T69000 data
book.

AHIP-370 Manual
20
Registers
The AHIP-370 contains five I/O ports: 231h, 233h, 234h, and a user-definable port
(port 180/1h, 2E0/1h, 3E0/1h, or 300/1h). These ports are compatible with AHIP4+
and AHIP 6+.
Register 231h – Miscellaneous Control
Register 231h controls the LEDs and signals shown in the following table.
Table 2- 7. Register 231h - CPU LED Port
Bit LED/Signal Result R/W
0 Reserved 0 R
1 DOC 2000 1= Enables DOC 2000 R/W
2 Reserved 0 R
3 Reserved 0 R
4 Reserved 0 R
5* ENFLASHWR 1 = Enables Flash write R/W
6 VGA_EN 1 = Enables on-board VGA R
7 CLRCMS 1 = CMOS okay
0 = Clear CMOS R
*Note: This bit must be 1 to make FLASH visible @D0000h when booting from
AT bus. This bit also enables the FLASH @C0000h when booting to FLASH.
Register 233h – Flash BIOS Control
Register 233h controls the signals shown in the following table.
Table 2- 8. Register 233h - Flash BIOS Control Register
Bit Signal Result R/W
0 FLA15 Flash address 15 - page control bit R/W
1 FLA16 Flash address 16- page control bit R/W
2 FLA17 Flash address 17 - page control bit R/W
3 FLA18 Flash address 18 - page control bit R/W
4 FPSEL0 Flat panel select bit 0 R
5 FPSEL1 Flat panel select bit 1 R
6 FPSEL2 Flat panel select bit 2 R
7 FPSEL3 Flat panel select bit 3 R