Texas Instruments TPS54JA20EVM-023 User manual

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Using the TPS54JA20EVM-023 12-A, Buck Converter Evaluation Module
User's Guide
SLVUBO0A–March 2020–Revised May 2020
Using the TPS54JA20EVM-023 12-A, Buck Converter
Evaluation Module
This user’s guide contains information for the TPS54JA20EVM-023 evaluation module (EVM) as well as
for the TPS54JA20 DC/DC converter. Also included are the performance specifications, the schematic,
and the list of materials for the TPS54JA20EVM.
Contents
1 Introduction ................................................................................................................... 2
1.1 Background.......................................................................................................... 2
1.2 Performance Specification Summary ............................................................................ 3
1.3 Modifications......................................................................................................... 3
2 Test Setup and Results..................................................................................................... 5
2.1 Input/Output Connections.......................................................................................... 5
2.2 Start Up Procedure................................................................................................. 5
2.3 Efficiency............................................................................................................. 6
2.4 Load Regulation..................................................................................................... 8
2.5 Load Transients..................................................................................................... 9
2.6 Loop Characteristics .............................................................................................. 10
2.7 Output Voltage Ripple ............................................................................................ 11
2.8 Powering Up ....................................................................................................... 12
3 Schematic, List of Materials, and Layout................................................................................ 13
3.1 Schematic .......................................................................................................... 14
3.2 List of Materials.................................................................................................... 15
3.3 Layout............................................................................................................... 16
List of Figures
1 Safety Warnings ............................................................................................................. 2
2 TPS54JA20 Efficiency Plot: Vin Range................................................................................... 6
3 TPS54JA20 Efficiency Plot: Vcc Range .................................................................................. 6
4 TPS54JA20 Efficiency Plot: Skip Mode................................................................................... 7
5 TPS54JA20 Efficiency Plot: FCCM and Skip Mode..................................................................... 7
6 TPS54JA20 Load Regulation .............................................................................................. 8
7 TPS54JA20 Load Regulation .............................................................................................. 8
8 TPS54JA20 Load Transient Response................................................................................... 9
9 TPS54JA20 Load Transient Response................................................................................... 9
10 TPS54JA20 Bode Plot..................................................................................................... 10
11 TPS54JA20 Output Ripple, No Load .................................................................................... 11
12 TPS54JA20 Output Ripple, 12-A Load.................................................................................. 11
13 TPS54JA20 Output Ripple, Skip Mode, 10mA Load .................................................................. 11
14 TPS54JA20 Enable Start-Up, 12A Load................................................................................ 12
15 TPS54JA20 EN Shutdown, 12A Load................................................................................... 12
16 TPS54JA20EVM Top-Side Layout....................................................................................... 17
17 TPS54JA20EVM Internal Layer-1 Layout............................................................................... 17
18 TPS54JA20EVM Internal Layer-2 Layout............................................................................... 18

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19 TPS54JA20EVM Bottom-Side Layout................................................................................... 18
List of Tables
1 Input Voltage and Output Current Summary............................................................................. 2
2 TPS54JA20EVM Performance Specification Summary ................................................................ 3
3 TPS54JA20EVM Mode Pin Selection..................................................................................... 4
4 Enable Pin Selection ........................................................................................................ 4
5 TPS54JA20EVM EVM Connectors and Test Points.................................................................... 5
6 TPS54JA20EVM List of Materials........................................................................................ 15
Trademarks
D-CAP3 is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
1 Introduction
The TPS54JA20 is a D-CAP3™ synchronous buck converter designed for 12 A output current, and the
evaluation module is designed to demonstrate the small printed-circuit-board areas that may be achieved
when designing with the device. The high-side and low-side switching MOSFETs are integrated in the
device package along with their gate drive circuitry. Rated input voltage and output current ranges for the
evaluation module are given in Table 1.
1.1 Background
The EVM is setup to allow the user to evaluate the performance of the TPS54JA20 IC, and easily make
changes to multiple settings. The low drain-to-source on resistance of the MOSFETs allows the device to
achieve high efficiencies and keep the junction temperature low at high output currents. There is no need
for external compensation components since this device is designed with D-CAP3™ control topology. On
the EVM the switching frequency and the operation mode are externally selectable using a jumper to set
the resistor from the MODE pin to AGND. An external resistor divider allows for an adjustable output
voltage. Additionally, the device provides adjustable soft start, adjustable OC limit threshold, external
reference input, and an open-drain power good indicator. Lastly the TPS54JA20 device has a fixed
internal VIN under voltage lockout and externally adjustable UVLO using a resistor divider at the EN pin.
Table 1. Input Voltage and Output Current Summary
EVM INPUT VOLTAGE RANGE OUTPUT CURRENT
RANGE
TPS54JA20 VIN = 4 V to 16 V 0 A to 12 A
Figure 1. Safety Warnings

O INTREF
FB HS FB LS
INTREF
V V
R R
V
_ _

u
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1.2 Performance Specification Summary
A summary of the TPS54JA20EVM performance specifications is provided in Table 2. Specifications are
given for an input voltage of VIN = 12 V and an output voltage of 2.5 V, unless otherwise specified. The
TPS54JA20EVM is designed and tested for VIN = 4 V to 16 V. The ambient temperature is 25°C for all
measurements, unless otherwise noted.
Table 2. TPS54JA20EVM Performance Specification Summary
SPECIFICATION TEST CONDITIONS MIN TYP MAX Unit
VIN voltage range (without internal
Bias) 4 12 16 V
VIN voltage range (with external Bias) 2.7 12 16 V
Output voltage setpoint 2.5 V
Output current range VIN = 4 V to 16 V 0 12 12 A
Internal LDO Voltage 3.0 V
Line regulation VIN = 4 V to 16 V, IO= 12 A +/– 0.07%
Load regulation VIN = 12 V, IO= 0 A to 12 A +/– 0.12%
Load transient response
IO= 3 A to 9 A , 2
A/us Voltage change –50 mV
Recovery time 12 µs
IO= 9 A to 3 A , 2
A/us Voltage change 50 mV
Recovery time 12 µs
Loop bandwidth VIN = 12 V, IO= 12 A 75 kHz
Phase margin VIN = 12 V , IO= 12 A 58 degree
Output ripple voltage IO= 12 A 12 15 mVPP
Operating frequency 600 800 1000 kHz
1.3 Modifications
These evaluation modules are designed to provide access to the features of the TPS54JA20. Some
modifications can be made to this module.
1.3.1 Output Voltage Setpoint
To change the output voltage of the EVM, it is necessary to change the value of resistor R6 and R7. R9 is
fixed at 10k Ohm. Changing the total value of R6 plus R7 can change the output voltage above the 0.9V
reference voltage VINTREF. A two resistor configuration of R6+R7 is implemented to give the exact desired
output voltage setting. The value of R6 and R7 for a specific output voltage can be calculated using
Equation 1.
(1)
VINTREF= 0.9V
RFB_HS = R6+ R7
RFB_LS = R9= 10kΩ

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1.3.2 Frequency and Operation Mode Setting
To change the frequency and operation mode of the part, the MODE pin is used. J6 and the surrounding
circuitry allows for an easy change to the frequency and operation mode setting. All 6 options offered by
J6 are shown in Table 3
Table 3. TPS54JA20EVM Mode Pin Selection
Switching Frequency (FSW)Operation Mode Under
Light Load Mode Pin Connections
Connection Jumper Setting
600 kHz Skip Mode Short to VCC Short Pins 1 and 2
800 kHz Skip Mode 243kΩ+/- 10% to AGND Short Pins 3 and 4
1000 kHz Skip Mode 121kΩ+/- 10% to AGND Short Pins 5 and 6
1000 kHz Forced CCM 60.4kΩ+/- 10% to AGND Short Pins 7 and 8
800 kHz Forced CCM 30.1kΩ+/- 10% to AGND Short Pins 9 and 10
600 kHz Forced CCM Short to AGND Short Pins 11 and 12
1.3.3 Enable Pin Selection
The converter can be enabled and disabled by J5.
Default setting: EN pin connected to VIN.
Table 4. Enable Pin Selection
Set On Connection Enable Selection
Pins 2-3 Shorted EN pin connected to VIN pins through resistor divider
J3 Open EN pin is left floating
Pins 1-2 Shorted EN pin connected to PGND
1.3.4 Remote Sensing
The EVM is not set-up for remote sensing by default. To set up remote sensing follow these steps:
1. Replace R8 and R11 with 100Ωresistors
2. Connect your sense points to the Vsns+ and Vsns- test points
1.3.5 Adjustable UVLO
The undervoltage lockout (UVLO) can be adjusted externally using R2 and R9. See the TPS54JA20 Data
Sheet to get detailed instructions for setting the external UVLO.

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2 Test Setup and Results
This section describes how to properly connect, set up, and use the TPS54JA20EVM. This section also
includes test results typical for the evaluation module and covers efficiency, output voltage regulation, load
transient, loop response, output ripple, and start-up.
2.1 Input/Output Connections
The TPS54JA20EVM is provided with input/output connectors and test points as shown in Table 5. A
power supply capable of supplying greater than 15 A must be connected to J1 and J2 through a pair of
20-AWG wires or better. The load must be connected to J3 and J4 through a pair of 20-AWG wires or
better on each connector. The maximum load current capability is 12 A.
Wire lengths must be minimized to reduce losses in the wires. Test point VIN_SENSE+ provides a place
to monitor the input voltage with Test point VIN_SENSE- providing a convenient ground reference. Test
point VOUT+ is used to monitor the output voltage with VOUT- as the ground reference.
Table 5. TPS54JA20EVM EVM Connectors and Test Points
REFERENCE
DESIGNATOR FUNCTION
J1 VIN input voltage connector (see Table 1 for VIN range)
J2 PGND connection for input
J3 VOUT, 2.5V at 12A maximum
J4 PGND connection for output
J5 3-pin header for enable. ON -> Connects EN to VIN to enable the device. OFF- > Connects EN to GND
to disable device. Floating EN will prevent the part from operating.
J6 12 Pin header for Mode selection (see Table 3)
VIN_SENSE+,
VIN_SENSE- VIN voltage sensing test points
VOUT+, VOUT- VOUT voltage sensing test points
VCC, PGND VCC voltage forcing/sensing test points
PGOOD PGOOD output test point (pulled up to VCC pin through a 30kΩresistor)
EN EN test point
VSNS+, VSNS- Remote sensing test points
AGND AGND test point
BODE+, BODE- Loop measurement test points (BODE+ is at the same net as VOUT, but is closer to FB divider and IC)
SS/REFIN Can be used to monitor the reference voltage
SW Switch Node test point
2.2 Start Up Procedure
1. Make sure the EN jumper (J5) is in the ON position (shorting pin 2 and pin 3) to connect the EN pin to
the resistor divider from VIN.
2. (Optional) Apply appropriate external bias voltage on VCC and PGND test points. If no external bias,
please go directly to step 3. The external bias range is 3.3V to 5.3V.
3. Apply appropriate VIN voltage to the VIN and PGND terminals at J1 and J2.

Output Current (A)
Efficiency (%)
0 2 4 6 8 10 12
70
80
90
100
Vin = 12 V
Vout = 2.5 V
800 kHz
800 nH
FCCM
D020
INTVCC
3.3-V VCC
5-V VCC
Output Current (A)
Efficiency (%)
0 2 4 6 8 10 12
20
30
40
50
60
70
80
90
100
Vout = 2.5 V
800 kHz
800 nH
VCC = Int
FCCM
D019
Vin = 8 V
Vin = 12 V
Vin = 16 V
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2.3 Efficiency
The efficiency of this EVM peaks at a load current of about 6 A and then decreases as the load current
increases toward full load. The following images show the efficiency for the TPS54JA20EVM at an
ambient temperature of 25°C. Figure 2 shows the efficiency over a range of Vin values, Figure 3 shows
efficiency over a range of Vcc values, and Figure 4 shows how the light load efficiency is improved in
DCM. Figure 2 and Figure 4 compare the efficiency of FCCM and Skip modes.
Figure 2. TPS54JA20 Efficiency Plot: Vin Range
Figure 3. TPS54JA20 Efficiency Plot: Vcc Range

Output Current (A)
Efficiency (%)
0 2 4 6 8 10 12
20
30
40
50
60
70
80
90
100
Vin = 12 V
Vout = 2.5 V
800 kHz
VCC = Int
800 nH
D021
FCCM
Skip
Output Current (A)
Efficiency (%)
0 2 4 6 8 10 12
20
30
40
50
60
70
80
90
100
Vout = 2.5 V
800 kHz
800 nH
VCC = Int
Skip
D022
Vin = 8 V
Vin = 12 V
Vin = 16 V
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Figure 4. TPS54JA20 Efficiency Plot: Skip Mode
Figure 5. TPS54JA20 Efficiency Plot: FCCM and Skip Mode

Output Current (A)
Output Voltage (V)
0 1 2 3 4 5 6 7 8 9 10 11 12
2.484
2.487
2.49
2.493
2.496
2.499
2.502
2.505
2.508
2.511
2.514
2.517
800 kHz
800 nH
Skip
VCC = Int
D026
Vin = 8 V
Vin = 12 V
Vin = 16 V
Output Current (A)
Output Voltage (V)
0 1 2 3 4 5 6 7 8 9 10 11 12
2.484
2.487
2.49
2.493
2.496
2.499
2.502
2.505
2.508
2.511
2.514
2.517
800 kHz
800 nH
FCCM
VCC = Int
D024
Vin = 8 V
Vin = 12 V
Vin = 16 V
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2.4 Load Regulation
Figure 6 and Figure 7 show the load regulation for the TPS54JA20EVM.
Measurements are given for an ambient temperature of 25°C.
Figure 6. TPS54JA20 Load Regulation
Figure 7. TPS54JA20 Load Regulation

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2.5 Load Transients
Figure 8 and Figure 9 show how the TPS54JA20EVM response to load transients. The current step is
from 25% to 75% Load. The current step slew rate is 2 A/µs. Total peak-to-peak voltage variation is as
shown, including ripple and noise on the output.
Figure 8. TPS54JA20 Load Transient Response
Figure 9. TPS54JA20 Load Transient Response

Frequency (Hz)
Gain (dB)
Phase (Degrees)
1000 2000 3000 5000 7000 10000 20000 30000 50000 100000 200000300000 500000 1000000
-40 -200
-30 -150
-20 -100
-10 -50
0 0
10 50
20 100
30 150
40 200
50 250
60 300
70 350
80 400
Vin = 12 V
Vout = 2.5 V
800 kHz
VCC = Int
800 nH
Iout = 12 A
D018
Gain
Phase
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2.6 Loop Characteristics
Figure 10 shows the TPS54JA20EVM loop-response characteristics. Gain and phase plots are shown for
VIN voltage of 12 V. Load current for the measurement is 100%.
Figure 10. TPS54JA20 Bode Plot