YUGE CLM920 NC5 Installation manual

Product Name
CLM920_NC5_LTE Module Hardware User Guide
Number of Pages
44
Produce Version
V1.6
Date
2017/6/28
CLM920_NC5
LTE Module Hardware User Guide
V1.6
Shang Hai YUGE Information Technology co., LTD
All rights reserved

CLM920_NC3_LTE Module Hardware User Guide
Shang Hai YUGE Information Technology co., LTD
Page 1 of 37
Update records
version
Date
Author
Description
V1.0
20160808
David
Initial
V1.1
20161101
David
1.Modify the analog voice circuit description
V1.2
20161130
David
1. Increase the power supply description
2. Add PCM description
V1.3
20170215
David
1. Add a description that supports the LTE cat.1
specification
V1.4
20170323
David
1. Increase WCDMA B5 RF indicator
V1.5
20170421
David
1. Modify the working range of the module through
the high and low temperature limit test
V1.6
20170628
David

CLM920_NC3_LTE Module Hardware User Guide
Shang Hai YUGE Information Technology co., LTD
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Contents
Chapter 1. Introduction...................................................................................................................................... 5
Chapter 2. Module review..................................................................................................................................6
2.1 Product Introduction............................................................................................................................ 6
2.2 Module characteristics......................................................................................................................... 7
2.3 Module function...................................................................................................................................9
Chapter 3. Interface application description....................................................................................................10
3.1 Overview of this chapter....................................................................................................................10
3.2 Module interface................................................................................................................................ 11
3.2.1 52-pin gold finger................................................................................................................... 11
3.2.2 Interface Definition.................................................................................................................12
3.3 Power Interface.................................................................................................................................. 14
3.4 Switching machine reset mode.......................................................................................................... 16
3.4.1 Boot Timing............................................................................................................................ 16
3.4.2 Power-off shutdown................................................................................................................17
3.4.3 Reset control........................................................................................................................... 17
3.5 USB interface.....................................................................................................................................18
3.6 UART interface.................................................................................................................................. 19
3.7 USIM Interface.................................................................................................................................. 20
3.7.1 USIM Card Reference Circuit................................................................................................ 20
3.7.2 USIM_DET Hot Swap Reference Design..............................................................................21
3.8 General GPIO Interface..................................................................................................................... 22
3.9 Network indication interface............................................................................................................. 22
3.10 RF antenna interface........................................................................................................................ 23
3.10.1 RF connector position...........................................................................................................23
3.10.2 RF Connector Size................................................................................................................24
3.11 Analog voice interface..................................................................................................................... 25
3.11.1 Analog Voice Reference Design........................................................................................... 26
3.11.2 PCM digital voice interface.................................................................................................. 27
Chapter 4. Overall technical indicators........................................................................................................... 28
4.1 Chapter overview............................................................................................................................... 28
4.2 Working frequency.............................................................................................................................28
4.3 Conducted RF Measurement............................................................................................................. 29
4.3.1 Test environment.....................................................................................................................29
4.3.2 Test Standards......................................................................................................................... 29
4.4 Conducted Receive Sensitivity and Transmit Power........................................................................ 29
4.5 Antenna requirements........................................................................................................................ 30
4.6 Power Consumption Characteristics..................................................................................................31
Chapter 5. Interface electrical characteristics..................................................................................................33
5.1 Working storage temperature.............................................................................................................33

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5.2 Module IO Level................................................................................................................................33
5.3 Power supply......................................................................................................................................33
5.4 Electrostatic property.........................................................................................................................34
Chapter 6. Structural and mechanical properties.............................................................................................35
6.1 Appearance.........................................................................................................................................35
6.2 Mini PCI Express Connector............................................................................................................. 35
6.3 Module fixing method....................................................................................................................... 36
Chart catalog
Figure 2-1 Functional block diagram of the CLM920_NC5 Mini PCIE module........................................... 10
Figure 3-1 Gold finger TOP surface and BOTTOM surface...........................................................................11
Figure 3-2 Detail of the gold finger TOP and BOTTOM AB......................................................................... 12
Figure 3-3 LDO power reference circuit......................................................................................................... 15
Figure 3-4 DCDC power supply reference circuit...........................................................................................15
Figure 3-5 MOS tube control power switch reference circuit.........................................................................15
Figure 3-6 GSM TDMA Burst Current Supply Voltage Drop.........................................................................16
Figure 3-7 Startup timing diagram...................................................................................................................16
Figure 3-8 Reset Reference Circuit................................................................................................................. 17
Figure 3-9 Reset timing diagram..................................................................................................................... 18
Figure 3-10 USB connection design circuit diagram...................................................................................... 18
Figure 3-11 UART serial port design...............................................................................................................19
Figure 3-12 Level shifting circuit.................................................................................................................... 20
Figure 3-13 USIM design circuit diagram.......................................................................................................21
Figure 3-14 SIM card hot plug detection.........................................................................................................21
Figure 3-15 WAKEUP_OUT signal waveform...............................................................................................22
Figure 3-16 Network indicator circuit diagram...............................................................................................23
Figure 3-17 Location of the RF connector...................................................................................................... 23
Figure 3-18 RF connector size chart................................................................................................................24
Figure 3-19 Matching coaxial RF line size......................................................................................................24
Figure 3-20 Main set and diversity antenna matching circuit......................................................................... 25
Figure 3-21 Comparison of received signal strengths with and without diversity antennas.......................... 25
Figure 3-22 Analog voice reference circuit..................................................................................................... 26
Figure 6-1 Appearance of the CLM920_NC5................................................................................................. 35
Figure 6-2 Connector dimensions....................................................................................................................35
Table directory
Table 2-1 Module Specifications....................................................................................................................... 7
Table 2-2 List of module frequency bands........................................................................................................ 7
Table 2-3 key characteristics..............................................................................................................................8
Table 3-1 IO parameter definition....................................................................................................................12
Table 3-2 Interface definition...........................................................................................................................12
Table 3-3 Power pin definition........................................................................................................................ 14
Table 3-5 boot timing parameters.................................................................................................................... 16

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Table 3-6 RESET pin parameters.................................................................................................................... 17
Table 3-7 USB interface pin definition............................................................................................................18
Table 3-8 UART serial port signal definition.................................................................................................. 19
Table 3-9 SIM card signal definition............................................................................................................... 20
Table 3-10 SIM card hot swap detection pin definition.................................................................................. 21
Table 3-11 General GPIO Pin Definitions....................................................................................................... 22
Table 3-12 Network indicator pin definition................................................................................................... 22
Table 3-13 Network indication status.............................................................................................................. 23
Table 3-4 Main parameters of the RF connector............................................................................................. 24
Table 3-15 Simulation voice pin definition..................................................................................................... 25
Table 3-16 PCM pin definition........................................................................................................................ 27
Table 3-17 PCM specific parameters...............................................................................................................27
Table 4-1 RF frequency table...........................................................................................................................28
Table 4-2 Test instruments............................................................................................................................... 29
Table 4-3 2G3G RF indicators.........................................................................................................................29
Table 4-4 4G RF sensitivity indicators............................................................................................................ 30
Table 4-5 4G RF transmit power indicators.................................................................................................... 30
Table 4- 6 Main set antenna indicator requirements........................................................................................30
Table 4-7 GNSS antenna indicator requirements............................................................................................ 31
Table 4-8 GSM power consumption................................................................................................................31
Table 4-9 WCDMA Power Consumption........................................................................................................32
Table 4-10 LTE power consumption................................................................................................................32
Table 4-11 TDS-CDMA power consumption.................................................................................................. 32
Table 5-1 CLM920_NC5 4G module operating temperature..........................................................................33
Table 5-2 Electrical characteristics of the CLM920_NC5 Mini PCIE module...............................................33
Table 5-3 CLM920_NC5 module working voltage.........................................................................................33
Table 5-4 CLM920_NC5 ESD Features..........................................................................................................34

CLM920_NC3_LTE Module Hardware User Guide
Shang Hai YUGE Information Technology co., LTD
Page 5 of 37
Chapter 1. Introduction
This document is a wireless solution product CLM920_NC5 Mini PCIE module hardware interface
manual, designed to describe the hardware components and functional characteristics of the module
solution product, application interface definition and usage instructions, electrical and mechanical
characteristics, etc., for user-based application development of the product Provide hardware instructions.
Abbreviation:
ADC
Analog-Digital Converter
AFC
Automatic Frequency Control
AGC
Automatic Gain Control
ARFCN
Absolute Radio Frequency Channel Number
B2B
Board to Board Connector
BER
Bit Error Rate
CDMA
Code Division Multiple Access
DAI
Digital Audio interface
DAC
Digital-to-Analog Converter
DSP
Digital Signal Processor
DTR
Data Terminal Ready
EFR
Enhanced Full Rate
EMC
Electromagnetic Compatibility
EMI
Electro Magnetic Interference
ESD
Electronic Static Discharge
EVDO
Evolution Data Only
FR
Full Rate
GPRS
General Packet Radio Service
HR
Half Rate
IMEI
International Mobile Equipment Identity
ISO
International Standards Organization
PLL
Phase Locked Loop
PPP
Point-to-point protocol
RAM
Random Access Memory
ROM
Read-only Memory
RTC
Real Time Clock
SMS
Short Message Service
UART
Universal asynchronous receiver-transmitter
UIM
User Identifier Management
USB
Universal Serial Bus
VSWR
Voltage Standing Wave Ratio

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Chapter 2. Module review
2.1 Product Introduction
CLM920_NC5 Mini PCIE module is a PCI Express Mini Card 1.2 standard module, which is an
integrated FDD-LTE/TDD-LTE/TD-SCDMA/WCDMA/EVDO/CDMA/EDGE
/GSM network standard and GPS positioning service. Wireless terminal products. The module baseband
chip adopts Qualcomm's MDM9X07, supports the three major network standards of China Mobile Unicom
Telecom, and supports OS: Windows 7/Windows 8/Windows 10/Android 4.0 and above. The CLM920_NC5
module can be used in the following situations:
Car Equipment
Wireless POS machine
Wireless advertising, media
Remote monitoring
Smart meter reading
Mobile broadband
automated industry
Other wireless terminals, etc.

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2.2 Module characteristics
Table 2-1 Module Specifications
Product name
Description
CLM920_NC5
LTE for CMCC,CUCC and CTCC, support SRLTE,GPS and Analog audio
CLM920_TB5
LTE for CMCC,CUCC and CTCC, support GPS,Analog audio,LTE Cat.1 spec
(optional)
CLM920_TE5
LTE for CMCC,CUCC and EU, support GPS and Analog audio
Table 2-2 List of module frequency bands
Network Type
Frequency band
Module series
CLM920_NC5
CLM920_TB5
CLM920_TE5
GSM
GSM850
√
√
√
GSM900
√
√
√
GSM1800
√
√
√
LTE(FDD)
LTE FDD B1
√
√
√
LTE FDD B3
√
√
√
LTE FDD B5
√
√
√
LTE FDD B7
√
LTE FDD B8
√
√
√
LTE FDD B20
√
LTE(TDD)
LTE TDD B38
√
√
√
LTE TDD B39
√
√
√
LTE TDD B40
√
√
√
LTE TDD B41
√
√
√
TD-SCDMA
TD-SCDMA B34
√
√
√
TD-SCDMA B39
√
√
√
WCDMA
BAND 1
√
√
√
BAND 5
√
√
√
BAND 8
√
√
√
CDMA2000/EV
DO
BC0
√
GNSS
GLONASS
√
√
√
GPS
√
√
√
BeiDou/Compass
√
√
√
The module chip supports Category 4 by default.
The GNSS feature is optional.
The diversity function is optional.
The CLM920 TB5 supports CAT1 standard modules for customer-specific applications. The CAT1

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system has an uplink of 5 Mbps and a downlink of 10 Mbps.
If you have a frequency band or technical requirements, you can contact local technical support for
assistance.
Table 2-3 key characteristics
Characteristic
Description
Physical characteristics
51mmx30mmx2.8mm
Fixed way
Ground screw hole (2)
Application processor
Single core ARM Cortex-A7 processor, clocked at 1.2GHZ, 256kB level 2
cache
Operating Voltage
3.3V - 4.2V Typical Voltage 3.7V
Energy saving current
Standby current < 5mA
Application interface
Standard SIM interface, support 3.0V/1.8V, support hot swap function
USB2.0 (High-Speed)
Hardware reset interface
UART serial interface
PCM/analog voice interface
Power interface
Network status indication interface
General purpose GPIO interface
Antenna connector
Main set antenna connector (MM4829-2702RA4)
Diversity Antenna Connector (MM4829-2702RA4)
GPS antenna connector (MM4829-2702RA4)
Transmit power
LTE:
Class 3 (23dBm±2dB)
UMTS:
Class 3 (24dBm+1/-3dB)
TD-SCDMA:
Class 2 (24dBm+1/-3dB)
CDMA2000:
Class 3 (24dBm+3/-1dB)
GSM/GPRS:
Class 4 (33dBm±2dB) GSM850/GSM900
Class 1 (30dBm±2dB) DCS1800/PCS1900
Data service
GSM/EDGE:
GPRS: DL 85.6 kbps/UL 85.6 kbps
EDGE: DL 236.8 kbps/UL 236.8 kbps
WCDMA:
UMTS R99:DL 384 kbps/UL 384 kbps
DC-HSPA+: DL 42 Mbps/UL 5.76 Mbps
TD-SCDMA:
TD-HSDPA/HSUPA: 2.2Mbps(UL)/2.8Mbps(DL)
EV-DOr0/DOrA

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CDMA 1xEVDOr0: DL 2.4Mbps/UL 153kbps
CDMA 1xEVDOrA: DL 3.1Mbps/UL 1.8Mbps
LTE:
LTE FDD:DL 150Mbps/UL 50Mbps@20M BW cat4
LTE TDD:DL 130Mbps/UL 35Mbps@20M BW cat4
LTE FDD:DL 10Mbps/UL 5Mbps@20M BW cat1
LTE TDD:DL 10Mbps/UL 5Mbps@20M BW cat1
Satellite positioning
GPS/BEIDOU/GLONASS
Protocol:NMEA
Diversity antenna
Support LTE diversity antenna
AT command
Support for standard AT instruction sets (Hayes 3GPP TS 27.007 and
27.005)
SMS business
Support Text and PDU mode
Support point-to-point MO and MT
SMS storage: USIM card / ME (default)
Virtual network card
Support USB virtual network card
Temperature range
Normal operating temperature –35°C to +75°C
Extreme operating temperature –40°C to +85°C
Storage temperature -40°C to +85°C
Module function distinction
On the label paper, M stands for the main set, D takes the table
diversity, G stands for GPS, and V stands for analog voice.
2.3 Module function
The CLM920_NC5 Mini PCIE module mainly consists of the following circuit units:
Baseband processing unit
Power management unit
Memory unit
RF transceiver unit
RF front end unit
GPS RF receiving unit
The functional block diagram of the CLM920_NC5 Mini PCIE module is as follows:

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Figure 2-1 Functional block diagram of the CLM920_NC5 Mini PCIE module
Chapter 3. Interface application description
3.1 Overview of this chapter
This chapter mainly describes the interface definition and application of this module. Contains the
following sections:
52-pin gold finger

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Interface definition
Power interface
USB interface
USIM interface
UART interface
WWAN control interface
PCM/analog voice interface
RF antenna interface
3.2 Module interface
3.2.1 52-pin gold finger
The CLM920_NC5 Mini PCIE module uses the 52-pin Mini PCIE Goldfinger as an external interactive
interface.
Figure 3-1 Gold finger TOP surface and BOTTOM surface

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Figure 3-2 Detail of the gold finger TOP and BOTTOM AB
3.2.2 Interface Definition
The CLM920_NC5 Mini PCIE module interface is a standard Mini PCI Express interface. The module
interface definitions are shown in the following table:
Table 3-1 IO parameter definition
Symbol sign
Description
IO
Two-way input and output
PI
power input
PO
Power Output
AI
Analog input
AO
Analog output
DI
Digital input
DO
Digital output
Table 3-2 Interface definition
Pin
Standard
definition
Module definition
IO
Functional description
Remarks
1
WAKE#
MIC+
AI
Audio input +
2
3.3Vaux
VBAT
PI
Power input
3
COEX1
MIC-
AI
Audio input -
4
GND
GND
Ground
5
COEX2
SPK+/REC+
AO
Analog output +
AT set
headphones
and speakers
6
1.5V
UIM_DET
DI
SIM card hot plug detection
7
CLKREQ#
SPK-/REC-
AO
Analog output -
AT set
headphones
and speakers
8
UIM_PWR
UIM_PWR
PO
SIM power output
9
GND
GND
Ground
10
UIM_DATA
UIM_DATA
IO
SIM data signal

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11
REFCLK-
UART_RX
DI
Serial port receiving signal
12
UIM_CLK
UIM_CLK
DO
SIM clock signal
13
REFCLK+
UART_TX
DO
Serial port send signal
14
UIM_RESET
UIM_RESET
DO
SIM reset signal
15
GND
GND
Ground
16
UIM_VPP
NC
17
RESERVED
VDD_EXT
PO
1.8V output power supply
18
GND
GND
Ground
19
RESERVED
WAKEUP_IN
DI
Module sleep control
1.8V, active
low
20
W_DISABLE#
W_DISABLE#
DI
Turn off RF communication
Active low
21
GND
GND
Ground
22
PERST#
RESET
DI
Reset control
Active low
23
PERn0
UART_CTS
DI
Serial port send clear
24
3.3Vaux
VBAT
PI
Power input
25
PERp0
UART_RTS
DO
Serial port request to send
26
GND
GND
Ground
27
GND
GND
Ground
28
1.5V
PWRKEY
AI
Power on signal
29
GND
GND
Ground
30
SMB_CLK
NC
31
PETn0
NC
32
SMB_DATA
WAKEUP_OUT
DO
Module wake up host
33
PETp0
NC
34
GND
GND
Ground
35
GND
GND
Ground
36
USB_D-
USB_DM
IO
USB differential signal -
37
GND
GND
Ground
38
USB_D+
USB_DP
IO
USB differential signal +
39
3.3Vaux
VBAT
PI
power input
40
GND
GND
Ground
41
3.3Vaux
VBAT
PI
power input
42
LED_WWAN#
LED_WWAN#
OC
Status light indication
43
GND
GND
Ground
44
LED_WLAN#
UIM_DET
DI
Hot plug detection
Reserved SIM
hot swap
45
RESERVED
PCM_CLK
DO
PCM clock pulse
46
LED_WPAN#
NC
Reserved
status light
indication
47
RESERVED
PCM_DOUT
DO
PCM sends data

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48
1.5V
NC
49
RESERVED
PCM_DIN
DI
PCM receiving data
50
GND
GND
Ground
51
RESERVED
PCM_SYNC
DO
Frame synchronization
signal
52
3.3Vaux
VBAT
PI
power input
The module typically has an IO port level of 1.8V (in addition to the SIM, the SIM card port level
supports 1.8V and 3.0V).
This module defines the RESERVED and NC pins to be left unconnected.
3.3 Power Interface
The CLM920_NC5 Mini PCIE module power connector consists of two parts:
VBAT is the working power of the module;
UIM_PWR is the working power supply for the SIM card;
The power interface of the CLM920_NC5 Mini PCIE module is as follows:
Table 3-3 Power pin definition
Pin number
name
I/O
description
Min
typical
Max
2,24,39,41,52
VBAT
PI
Module power
supply
3.3V
3.7V
4.2V
8
UIM_PWR
PO
SIM power
supply
0
1.8V/2.85V
1.9/2.95V
17
VDD_EXT
PO
Output power
1.8V
4,9,15,18,21,26,2
7,29,34,35,37,40,
43,50
GND
Ground
-
0
-
CLM920_NC5 Mini PCIE module adopts single power supply mode, the module provides 5 power
supply pins and 14 ground pins. In order to ensure the normal operation of the module, all power and
ground pins must be connected. The module power supply range is 3.3-4.2V, and it is recommended to
use 3.7V/2A power supply. The module will generate a peak current of more than 2A when transmitting
data or talking, resulting in a large ripple on the power supply. Therefore, when designing the circuit, the
power supply trace should be kept as short as possible. It is recommended to reserve one 220uF capacitor
near the power input. Customers are advised to use DCDC or LDO to provide sufficient current. The VBAT
is then powered through the MOS transistor so that the module can be completely powered down. For
practical use, please refer to the following circuit design:

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Figure 3-3 LDO power reference circuit
Figure 3-4 DCDC power supply reference circuit
Figure 3-5 MOS tube control power switch reference circuit
1. To prevent damage to the module caused by surge and overvoltage, it is recommended to connect a
5.1V/500mW Zener diode in parallel with the VBAT pin of the module.
2. It is recommended to add 3 ceramic capacitors (33pF, 10pF, 100nF) to the VBAT pin and place them near
the VBAT pin.
3. The minimum working voltage of the module is 3.3V. Since the transmission data or GSM call will

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generate more than 2A current, the ripple voltage drop will occur on the power supply voltage, so the
power supply voltage must not be lower than 3.3V.
Figure 3-6 GSM TDMA Burst Current Supply Voltage Drop
3.4 Switching machine reset mode
The CLM920_NC5 Mini PCIE module only supports power-on and power-on mode. The user can
check whether the module is powered on by querying the high and low levels of the VDD_EXT pin.
Table 3-4 Switching machine reset pin definition
Pin
Signal name
I/O
High value
Description
22
RESET
DI
1.8V
Module reset control pin, low effective
28
PWRKEY
PI
VBAT-0.3V
Low level boot
3.4.1 Boot Timing
Figure 3-7 Startup timing diagram
Table 3-5 boot timing parameters

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Symbol
Description
Min
Typical
Max
Unit
Ton
Boot low level width
100
500
-
mS
Ton(status)
Boot time (according to status status)
22
-
-
S
Ton(usb)
Boot time (according to usb status)
-
20
-
S
Ton(uart)
Boot time (according to uart status)
-
20
-
S
VIH
PWRKEY input high level
0.6
0.8
1.8
V
VIL
PWRKEY input low level
-0.3
0
0.5
V
3.4.2 Power-off shutdown
If the CLM920_NC5 Mini PCIE module is to be shut down, the VBAT power supply can be cut off. At
this time, the module does not perform the normal shutdown process. It is recommended that the
module be powered off and restarted only when the module fails to restart. It is recommended that the
interval between restarts be greater than 30S.
3.4.3 Reset control
CLM920_NC5 Mini PCIE module PIN22 signal is RESET reset pin. When the application needs to reset
the module, the module can be reset by pulling the pin low for 150-450ms. The RESET pin is sensitive to
interference and is away from RF interference signals when routing.
Figure 3-8 Reset Reference Circuit
Table 3-6 RESET pin parameters
Symbol
Description
Min
Typical
Max
Unit
Treset
Low pulse width
150
200
450
ms
VIH
RESET input high level voltage
1.17
1.8
2.1
V
VIL
RESET input low level voltage
-0.3
0
0.8
V
The reset RESET timing is as follows:

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Figure 3-9 Reset timing diagram
The CLM920_NC5 Mini PCIE module supports AT command reset. The AT command is at+cfun=1,1 to
restart the module. Detailed instructions can be found in the CLM920_NC5 AT instruction set manual.
3.5 USB interface
CLM920_NC5 Mini PCIE module USB interface supports USB2.0 high-speed protocol, supports slave
mode, does not support USB charging mode. USB input and output traces must comply with the USB2.0
feature. The USB interface is defined as follows:
Table 3-7 USB interface pin definition
Pin number
Signal name
IO
Description
36
USB_DM
IO
USB differential signal -
38
USB_DP
IO
USB differential signal +
4,9,15,18,21,26,27,29,
34,35,37,40,43,50
GND
Ground
The module acts as a USB slave device and supports USB sleep and wake-up mechanisms. The
reference design circuit is as follows:
Figure 3-10 USB connection design circuit diagram

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1.The USB interface supports high-speed (480Mbps) and full-speed (12Mbps) modes. Therefore, the trace
design needs to strictly follow the USB2.0 protocol requirements. Pay attention to the protection of the
data lines, differential traces, and control impedance of 90Ω.
2.In order to improve the antistatic performance of the USB interface, it is recommended to add an ESD
protection device on the data line. The equivalent capacitance of the protection device is less than 2pF.
3.The USB interface bus supply voltage is provided internally by the module and is not required externally.
At the same time, since the USB interface of the module does not provide USB bus power, the module can
only be used as a slave device of the USB bus device.
The USB interface supports the following features:
Software download upgrade
Data communication
AT Command
GNSS NMEA output, etc.
3.6 UART interface
The CLM920_NC5 Mini PCIE module provides a set of UART interfaces with a serial port level of 1.8V.
Through the serial port, you can send AT commands, print program log information, and so on.
The module serial port supports 9600, 19200, 38400, 57600, 115200, 230400bps baud rate, the
default is 115200bps.
The UART interface is defined as follows:
Table 3-8 UART serial port signal definition
Pin number
Signal name
I/O
Description
11
UART_RX
DI
Serial port receiving data
13
UART_TX
DO
Serial port to send data
23
UART_CTS
DI
User allows module to send
25
UART_RTS
DO
The module requests the user to send
If you need to use the serial port, you need to refer to the following serial port design.
Figure 3-11 UART serial port design
Table of contents
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