YUGE CLM920 TD5 Parts list manual

Product Name
CLM920_TD5 LTE Module Hardware Usage
Guide
Number of Pages
41
Produce Version
V1.2
Date
2019/9/4
CLM920_TD5
LTE Module Hardware Usage Guide
V1.2
Shanghai Yuge Information Technology co., LTD
All rights reserved

CLM920_TD5 LTE Module Hardware Usage Guide
Shanghai Yuge Information Technology co., LTD
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History record
Version
Date
Author
Description
V1.0
20170710
David
Initialized version
V1.1
20170825
Cheung
V1.2
20190904
Document
group
1.28 pin is modified to reserve
2. Modify the USIM card reference circuit

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Contents
Chapter 1. Introduction...........................................................................................................- 8 -
Chapter 2. Module review...................................................................................................... - 9 -
2.1 Module introduction................................................................................................. - 9 -
2.2 Module characteristics..............................................................................................- 9 -
2.3 Module function..................................................................................................... - 12 -
Chapter 3. Interface application description.........................................................................- 14 -
3.1 Chapter overview....................................................................................................- 14 -
3.2 Module interface.....................................................................................................- 14 -
3.2.1 52-pin gold finger........................................................................................ - 14 -
3.2.2 Interface definition...................................................................................... - 15 -
3.3 Power interface.......................................................................................................- 18 -
3.3.1 Power supply design....................................................................................- 18 -
3.3.2 Power reference circuit................................................................................- 19 -
3.3.3 VDD_EXT 1V8 voltage output...................................................................- 21 -
3.4 Switching machine reset mode...............................................................................- 21 -
3.4.1 Boot timing..................................................................................................- 21 -
3.4.2 Power down................................................................................................. - 22 -
3.4.3 Reset control................................................................................................- 22 -
3.5 USB interface......................................................................................................... - 23 -
3.6 UART interface...................................................................................................... - 24 -
3.7 USIM interface....................................................................................................... - 25 -
3.7.1 USIM card reference circuit........................................................................ - 26 -
3.7.2 UIM_DET Hot Swap Reference Design..................................................... - 27 -
3.8 General purpose GPIO interface............................................................................ - 28 -
3.9 Network indication interface.................................................................................. - 28 -
3.10 Analog voice interface..........................................................................................- 29 -
3.10.2 Analog Audio Interface Reference Design................................................ - 29 -
3.11 PCM digital voice interface..................................................................................- 31 -
3.12 Antenna interface..................................................................................................- 32 -
3.12.1 RF connector location................................................................................- 32 -
3.12.2 RF connector............................................................................................. - 32 -
Chapter 4. Overall technical indicators................................................................................ - 35 -
4.1 Chapter overview....................................................................................................- 35 -

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4.2 Working frequency................................................................................................. - 35 -
4.3 Conducted radio frequency measurement.............................................................. - 36 -
4.3.1 Test environment......................................................................................... - 36 -
4.3.2 Standard test................................................................................................ - 36 -
4.4 Conducted receiving sensitivity and transmit power..............................................- 36 -
4.5 Antenna requirements.............................................................................................- 38 -
4.6 Power consumption characteristics........................................................................ - 40 -
Chapter 5. Interface electrical characteristics.......................................................................- 42 -
5.1 Working storage temperature..................................................................................- 42 -
5.2 Module IO electrical characteristics.......................................................................- 42 -
5.3 Power supply characteristics.................................................................................. - 42 -
5.4 Electrostatic property..............................................................................................- 43 -
Chapter 6. Structural and mechanical properties..................................................................- 44 -
6.1 Exterior................................................................................................................... - 44 -
6.2 Mini PCI Express Connector..................................................................................- 44 -
6.3 Module fixing method............................................................................................ - 45 -

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Figure
图2-1 CLM920_TD5 MiniPCIE Module functional block diagram...................................- 13 -
Figure 3-1 Gold finger TOP surface and BOTTOM surface................................................- 14 -
Figure 3-2 Detail of the gold finger TOP and BOTTOM AB.............................................. - 15 -
Figure 3-3 Burst current supply voltage drop for GSM TDMA network.............................- 19 -
Figure 3-4 VBAT power supply........................................................................................... - 19 -
Figure 3-5 LDO linear power reference circuit....................................................................- 20 -
Figure 3-6 DC switching power supply reference circuit.................................................... - 20 -
Figure 3-7 PMOS tube control power switch reference circuit............................................- 20 -
Figure 3-8 Startup timing diagram....................................................................................... - 21 -
Figure 3-9 Reset reference circuit........................................................................................ - 22 -
Figure 3-10 Reset timing diagram........................................................................................- 23 -
Figure 3-11 USB connection design circuit diagram........................................................... - 24 -
Figure 3-12 UART serial port design................................................................................... - 25 -
Figure 3-13 Level conversion chip circuit............................................................................- 25 -
Figure 3-14 USIM design circuit diagram............................................................................- 26 -
Figure 3-15 Hot swap detection of the USIM card.............................................................. - 27 -
Figure 3-16 WAKEUP_OUT signal waveform....................................................................- 28 -
Figure 3-17 Network indicator circuit diagram....................................................................- 29 -
Figure 3-18 Analog voice reference circuit.......................................................................... - 30 -
Figure 3-19 External audio codec reference circuit............................................................. - 30 -
Figure 3-20 PCM short frame mode timing diagram........................................................... - 32 -
Figure 3-21 Location of the antenna interface..................................................................... - 32 -
Figure 3-22 RF connector size chart.................................................................................... - 33 -
Figure 3-23 Recommended coaxial RF plug size.................................................................- 33 -
Figure 3-24 Main set and diversity antenna matching circuit.............................................. - 34 -
Figure 3-25 Comparison of received signal strengths with and without diversity antennas- 34 -
Figure 6-1 Appearance of the CLM920_TD5...................................................................... - 44 -
Figure 6-2 Connector dimensions........................................................................................ - 44 -

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Table
Table 2-1 Module band list.....................................................................................................- 9 -
Table 2-2 Key Features.........................................................................................................- 10 -
Table 3-1 IO parameter definition........................................................................................ - 15 -
Table 3-2 Interface definition............................................................................................... - 15 -
Table 3-3 Power pin definition............................................................................................. - 18 -
Table 3-4 Switching machine reset pin definition................................................................ - 21 -
Table 3-5 Boot timing parameters........................................................................................ - 22 -
Table 3-6 RESET pin parameters......................................................................................... - 22 -
Table 3-7 USB interface pin definition................................................................................ - 23 -
Table 3-8 UART serial port signal definition....................................................................... - 25 -
Table 3- 9 SIM card signal definition...................................................................................- 25 -
Table 3-10 SIM card hot swap detection pin definition....................................................... - 27 -
Table 3-11 General GPIO Pin Definitions............................................................................- 28 -
The CLM920_TD5 Mini PCIE module supports sleep wakeup. WAKEUP_IN wakes up for
the host control module, WAKEUP_OUT wakes up the host for the module, and needs to set
AT^RPTFLAG=0 to enable the wake-up function. (It needs to be valid every time the power
is turned on)..........................................................................................................................- 28 -
Table 3-12 Network indicator pin definition........................................................................ - 28 -
Table 3-13 Network indication status...................................................................................- 29 -
Table 3-14 Analog Voice Pin Definitions............................................................................. - 29 -
Table 3-15 PCM interface pin definitions............................................................................ - 31 -
Table 3-16 PCM specific parameters................................................................................... - 31 -
Table 3-17 Main parameters of the RF connector................................................................ - 33 -
Table 4-1 RF frequency table............................................................................................... - 35 -
Table 4-2 Test instruments....................................................................................................- 36 -
Table 4-3 2G3G RF sensitivity indicators............................................................................ - 36 -
Table 4-4 4G RF sensitivity indicators.................................................................................- 37 -
Table 4-5 4G RF transmit power specifications................................................................... - 38 -
Table 4-6 Main set antenna indicator requirements............................................................. - 38 -
Table 4-7 GNSS antenna indicator requirements................................................................. - 39 -
Table 4-8 GSM power consumption.....................................................................................- 40 -
Table 4-9 WCDMA Power Consumption.............................................................................- 40 -
Table 4-10 LTE power consumption.................................................................................... - 40 -

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Table 4-11 TDS-CDMA power consumption.......................................................................- 41 -
Table 4-12 CDMA power consumption............................................................................... - 41 -
Table 5-1 Working storage temperature of the 4G module.................................................. - 42 -
Table 5-2 Electrical characteristics of the CLM920_TD5 MiniPCIE module IO................- 42 -
Table 5-3 Power supply characteristics of the CLM920_TD5 MiniPCIE module.............. - 42 -
Table 5-4 CLM920_TD5 ESD Features...............................................................................- 43 -

CLM920_TD5 LTE Module Hardware Usage Guide
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Chapter 1. Introduction
This document is the wireless solution product CLM920_TD5 Mini PCIE module
hardware interface manual, which is intended to describe the hardware components and
functional characteristics of the module solution, application interface definition and usage
instructions, electrical performance and mechanical characteristics. Combined with this and
other application documents, users can quickly use this module to design wireless products.

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Chapter 2. Module review
2.1 Module introduction
CLM920_TD5 Mini PCIE module is a PCI Express Mini Card 1.2 standard module,
which is an integrated FDD-LTE/TDD-LTE/TD-SCDMA/WCDMA/EVDO/CDMA/EDGE/
GSM network standard and GPS positioning service. Wireless terminal products. The module
is based on Qualcomm MDM9X07 chip development, supports Cat4, uplink and downlink
speeds up to 50Mbps/150Mbps, and fully supports VOLTE and SRLTE, and supports
embedded operating systems such as Windows 7/Windows 8/Windows 10/Android/Linux.
The CLM920_TD5 module can be used in the following situations：
Car Equipment
Wireless POS machine
Wireless advertising, multimedia
Remote monitoring
Smart meter reading
Mobile broadband
automated industry
Other wireless terminals, etc.
2.2 Module characteristics
Table 2-1 Module band list
Network Type
Frequency band
Module
CLM920_TD5
GSM
GSM850
√
GSM900
√
GSM1800
√
GSM1900
√
LTE(FDD)
LTE FDD B1
√
LTE FDD B2
√
LTE FDD B3
√
LTE FDD B4
√
LTE FDD B5
√
LTE FDD B7
√

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LTE FDD B8
√
LTE FDD B17
√
LTE FDD B20
√
LTE FDD B28
√
LTE(TDD)
LTE TDD B38
√
LTE TDD B39
√
LTE TDD B40
√
LTE TDD B41
√
TD-SCDMA
TD-SCDMA B34
√
TD-SCDMA B39
√
WCDMA
BAND 1
√
BAND 2
√
BAND 5
√
BAND 8
√
CDMA2000/EVDO
BC0
optional
GNSS
GLONASS
√
GPS
√
BeiDou/Compass
√
1) The module chip supports Category 4 by default.
2) FDD band B17 and TD-SCDMA B34 cannot be supported at the same time. B17 is
supported by default.
3) The FDD bands B17, B20, and B28 diversity cannot be supported at the same time. By
default, B28 is supported.
4) FDD band B2, B3 diversity can not be supported at the same time, B3 is supported by
default.
Table 2-2 Key Features
Characteristic
Description
Physical characteristics
51mmx30mmx4.1mm
Fixed way
Ground screw hole (2)
Application processor
Single core ARM Cortex-A7 processor, clocked at 1.2GHZ,

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256kB level 2 cache
Operating Voltage
3.3V - 4.2V Typical Voltage 3.7V
Energy saving current
Standby current < 5mA
Application interface
Standard SIM interface, support 3.0V/1.8V, support hot swap
function
USB2.0 (High-Speed)
Hardware reset interface
UART serial interface
PCM/analog voice interface
Power interface
Network status indication interface
General purpose GPIO interface
Antenna connector
Main set antenna connector (MM4829-2702RA4)
Diversity Antenna Connector (MM4829-2702RA4)
GPS antenna connector (MM4829-2702RA4)
Transmit power
LTE:
Class 3 (23dBm±2dB)
UMTS:
Class 3 (24dBm+1/-3dB)
TD-SCDMA:
Class 2 (24dBm+1/-3dB)
CDMA2000：
Class 3 (24dBm+3/-1dB)
GSM/GPRS:
Class 4 (33dBm±2dB) GSM850/GSM900
Class 1 (30dBm±2dB) DCS1800/PCS1900
Data service
GSM/EDGE:
GPRS: DL 85.6 kbps/UL 85.6 kbps
EDGE: DL 236.8 kbps/UL 236.8 kbps
WCDMA:
UMTS R99：DL 384 kbps/UL 384 kbps
DC-HSPA+: DL 42 Mbps/UL 5.76 Mbps
TD-SCDMA:
TD-HSDPA/HSUPA: 2.2Mbps（UL）/2.8Mbps（DL）

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EV-DOr0/DOrA
CDMA 1xEVDOr0: DL 2.4Mbps/UL 153kbps
CDMA 1xEVDOrA: DL 3.1Mbps/UL 1.8Mbps
LTE:
LTE FDD:DL 150Mbps/UL 50Mbps@20M BW cat4
LTE TDD:DL 130Mbps/UL 35Mbps@20M BW cat4
LTE FDD:DL 10Mbps/UL 5Mbps@20M BW cat1
LTE TDD:DL 10Mbps/UL 5Mbps@20M BW cat1
Satellite positioning
GPS/BEIDOU/GLONASS
Protocol：NMEA
Diversity antenna
Support LTE diversity antenna
AT command
Support for standard AT instruction sets (Hayes 3GPP TS
27.007 and 27.005)
SMS business
Support Text and PDU mode
Support point-to-point MO and MT
SMS storage: USIM card / ME (default)
Virtual network card
Support USB virtual network card
Temperature range
Normal operating temperature: –35°C to +75°C
Extreme operating temperature: –40°C to +85°C
Storage temperature: –45°C to +90°C
Module function
distinction
On the label paper, M stands for the main set, D takes the table
diversity, G stands for GPS, and V stands for analog voice.
2.3 Module function
The CLM920_TD5 Mini PCIE module mainly contains the following circuit units:
Baseband processing unit
Power management unit
Memory unit
RF transceiver unit
RF front end unit
GPS RF receiving unit
The functional block diagram of the CLM920_TD5 Mini PCIE module is shown below：

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Figure 2-1 CLM920_TD5 MiniPCIE Module functional block diagram

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Chapter 3. Interface application description
3.1 Chapter overview
This chapter mainly describes the interface definition and application of this module.
Contains the following sections:
52-pin gold finger
Interface definition
Power interface
USB interface
USIM interface
UART interface
WWAN# control interface
PCM/analog voice interface
RF antenna interface
3.2 Module interface
3.2.1 52-pin gold finger
CLM920_TD5 Mini PCIE module uses 52-pin Mini PCIE gold finger as external
interactive interface.
Figure 3-1 Gold finger TOP surface and BOTTOM surface

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Figure 3-2 Detail of the gold finger TOP and BOTTOM AB
3.2.2 Interface definition
CLM920_TD5 Mini PCIE module interface is a standard Mini PCI Express interface.
The module interface is defined as shown in the following table：
Table 3-1 IO parameter definition
Symbol sign
Description
IO
Two-way input and output
PI
Power input
PO
Power Output
AI
Analog input
AO
Analog output
DI
Digital input
DO
Digital output
Table 3-2 Interface definition
Pin
Standard
definition
Module
definition
IO
Functional
description
Remarks
1
WAKE#
MIC+
AI
Audio input +
2
3.3Vaux
VBAT
PI
Power input

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3
COEX1
MIC-
AI
Audio input -
4
GND
GND
Ground
5
COEX2
SPK+/REC+
AO
Analog output +
AT set
headphones
and speakers
6
1.5V
UIM_DET
DI
SIM card hot plug
detection
7
CLKREQ#
SPK-/REC-
AO
Analog output -
AT set
headphones
and speakers
8
UIM_PWR
UIM_PWR
PO
SIM power output
9
GND
GND
Ground
10
UIM_DATA
UIM_DATA
IO
SIM data signal
11
REFCLK-
UART_RX
DI
Serial port receiving
signal
12
UIM_CLK
UIM_CLK
DO
SIM clock signal
13
REFCLK+
UART_TX
DO
Serial port send
signal
14
UIM_RESET
UIM_RESET
DO
SIM reset signal
15
GND
GND
Ground
16
UIM_VPP
NC
17
RESERVED
VDD_EXT
PO
1.8V output power
supply
18
GND
GND
Ground
19
RESERVED
WAKEUP_IN
DI
HOST wake-up
module
1.8V, active
low
20
W_DISABLE#
W_DISABLE#
DI
Turn off RF
communication
active low
21
GND
GND
Ground
22
PERST#
RESET
DI
Reset control
active low
23
PERn0
UART_CTS
DI
Serial port send
clear
24
3.3Vaux
VBAT
PI
Power input

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25
PERp0
UART_RTS
DO
Serial port request to
send
26
GND
GND
Ground
27
GND
GND
Ground
28
1.5V
PWRKEY
PI
Power on signal
Reserved,
default power
on
29
GND
GND
Ground
30
SMB_CLK
NC
31
PETn0
NC
32
SMB_DATA
WAKEUP_OUT
DO
Module wakes up
HOST
33
PETp0
NC
34
GND
GND
Ground
35
GND
GND
Ground
36
USB_D-
USB_DM
IO
USB differential
signal -
37
GND
GND
Ground
38
USB_D+
USB_DP
IO
USB differential
signal +
39
3.3Vaux
VBAT
PI
power input
40
GND
GND
Ground
41
3.3Vaux
VBAT
PI
power input
42
LED_WWAN#
LED_WWAN#
OC
Status light
indication
43
GND
GND
Ground
44
LED_WLAN#
UIM_DET
DI
Hot plug detection
Reserved SIM
hot swap
45
RESERVED
PCM_CLK
DO
PCM clock pulse
46
LED_WPAN#
NC
Reserved
status light
indication
47
RESERVED
PCM_DOUT
DO
PCM sends data

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48
1.5V
NC
49
RESERVED
PCM_DIN
DI
PCM receiving data
50
GND
GND
Ground
51
RESERVED
PCM_SYNC
DO
Frame
synchronization
signal
52
3.3Vaux
VBAT
PI
Power input
The module typically has an IO port level of 1.8V (in addition to the SIM, the SIM card
port level supports 1.8V and 3.0V).
This module defines the RESERVED and NC pins to be left floating and must not be
used.
3.3 Power interface
CLM920_TD5 Mini PCIE module power interface consists of three parts：
VBAT is the working power of the module;
UIM_PWR is the working power supply for the SIM card;
VDD_EXT is 1.8V output power；
3.3.1 Power supply design
CLM920_TD5 Mini PCIE module power interface is as follows：
Table 3-3 Power pin definition
Pin
Name
I/O
Description
Min
Typical
Max
2,24,39,41,52
VBAT
PI
Module power
supply
3.4V
3.7V
4.2V
8
UIM_PWR
PO
SIM power
supply
0
1.8V/2.85V
1.9/2.95V
17
VDD_EXT
PO
Output power
1.8V
4,9,15,18,21,2
6,27,29,34,35,
37,40,43,50
GND
Ground
-
0
-

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The CLM920_TD5 Mini PCIE module uses a single power supply mode. The module
provides 5 power supply pins and 14 ground pins. The VBAT power supply range is 3.3-4.2V,
and it is recommended to use 3.7V/2A power supply. When transmitting data or talking under
HSPA/UTMS/GSM network, the instantaneous high-power transmission will produce a peak
current of more than 2A peak, which will cause a large ripple on the power supply. If the
instantaneous voltage drop causes the VBAT supply voltage to be too low. Or the supply
current is insufficient and the module may shut down or restart. In order to ensure the normal
operation of the module, all power pins and ground pins must be connected and provide
sufficient power supply capability.
Figure 3-3 Burst current supply voltage drop for GSM TDMA network
Under the premise of ensuring that the VBAT power supply is sufficient, two
470uF/6.3V tantalum capacitors can be connected in parallel with the power input, and then
10pF, 33pF, 0.1uF, 1uF ceramic capacitors can be connected.
Figure 3-4 VBAT power supply
3.3.2 Power reference circuit
The actual design of the power circuit can use a switching DC power supply or a linear
LDO power supply to design the VBAT power supply. Both design circuits need to supply
enough current. Specific reference to the following circuit design：

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Figure 3-5 LDO linear power reference circuit
Figure 3-6 DC switching power supply reference circuit
Figure 3-7 PMOS tube control power switch reference circuit
1) To prevent damage to the module caused by surges and overvoltages, it is
recommended to connect a 5.1V/500mW Zener diode in parallel with the VBAT pin of the
module.