YUGE CLM920 TD5 User manual

CLM920_TD5 LTE Module Hardware Manual
Version 1.1
Address:Room 303,Building 6,Lane 88,Yuanchuanggu, Shengda
Tiandi,Shengrong Road,Pudong New Area,Shanghai
HomePage: http://www.yuge-info.com
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Tel: [phone]
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2
Revision
Date
Description
Author
V1.0
20170710
Initial
David
V1.1
20170825
Cheung

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Contents
1 Introduction...................................................................................................................................................... 7
2 Product Overview..............................................................................................................................................7
2.1 General Description................................................................................................................................ 7
2.2 Key Features.............................................................................................................................................. 7
2.3 Module Function...................................................................................................................................... 10
3 Application Interface..................................................................................................................................11
3.1 General Description.............................................................................................................................. 11
3.2 Module Interface.................................................................................................................................... 11
3.2.1 52-pin Goldfinger.......................................................................................................................... 11
3.2.2 Interface definition....................................................................................................................12
3.3 Power Interface...................................................................................................................................... 15
3.3.1 Power Design.................................................................................................................................... 15
3.3.2 Reference Design of Power Supply............................................................................................16
3.3.3 VDD_EXT 1V8 output........................................................................................................................17
3.4 Reset mode................................................................................................................................................ 17
3.4.1 Power-on sequence..........................................................................................................................18
3.4.2 Power off.......................................................................................................................................... 18
3.4.3 Reset control.................................................................................................................................. 18
3.5 USB interface.......................................................................................................................................... 19
3.6 UART interface........................................................................................................................................ 20
3.7 USIM interface........................................................................................................................................ 21
3.7.1 USIM card reference circuit......................................................................................................22
3.7.2 UIM_DET Hot-Plug Reference Design..........................................................................................23
3.8 General purpose GPIO interface........................................................................................................23
3.9 Network Indication Interface............................................................................................................24
3.10 Analog voice interface......................................................................................................................25
3.10.1 Analog Voice Reference Design................................................................................................25
3.10.2 Analog Voice Reference Design................................................................................................25
3.11 PCM audio interface............................................................................................................................ 26
3.12 Antenna Interface................................................................................................................................ 27
4 Overall Technical Indicators................................................................................................................... 29
4.1 Overview of this chapter....................................................................................................................29
4.2 Operating frequency.............................................................................................................................. 29
4.3 Conducted RF Measurements radio frequency..................................................................................30
4.3.1 Test environment............................................................................................................................ 30
4.3.2 Test standards................................................................................................................................ 30
4.4 Conducted receive sensitivity and transmit power................................................................... 31
4.5 Antenna requirements............................................................................................................................ 32
4.6 Power consumption characteristics..................................................................................................33
5 Interface electrical characteristics................................................................................................... 35
5.1 Operating Storage Temperature..........................................................................................................35
5.2 Module IO electrical characteristics............................................................................................35
5.3 Power supply characteristics............................................................................................................35
5.4 Electrostatic characteristics..........................................................................................................36
6 Structural and mechanical properties................................................................................................... 36
6.1 Appearance................................................................................................................................................ 36
6.2 Mini PCI Express connector................................................................................................................36

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6.3 Module fixing method............................................................................................................................ 37

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Figure Index
Figure 2- 1 CLM920_TD5 Mini PCIE Functional Diagram..........................................................................11
Figure 3- 1 TOP and BOTTOM of Goldfinger................................................................................................12
Figure 3- 2 TOP and BOTTOM of Goldfinger Detail A&B......................................................................... 12
Figure 3- 3 GSM TDMA Power Supply Voltage Drop....................................................................................16
Figure 3- 4 VBAT Power Supply......................................................................................................................16
Figure 3- 5 Reference Design of LDO linear power supply................................................................. 16
Figure 3- 6 Reference Design of DC switching power supply............................................................. 17
Figure 3- 7 Reference Design of PMOS tube to control the power switch..................................... 17
Figure 3- 8 Power-on sequence diagram......................................................................................................18
Figure 3- 9 Reset Reference Circuit..........................................................................................................19
Figure 3- 10 RESET sequence diagram..........................................................................................................19
Figure 3- 11 USB design circuit diagram..................................................................................................20
Figure 3- 12 UART serial port design........................................................................................................21
Figure 3- 13 Level conversion circuit......................................................................................................21
Figure 3- 14 USIM design circuit................................................................................................................22
Figure 3- 15 Hot plugging of the USIM card............................................................................................23
Figure 3- 16 WAKEUP_OUT signal wave........................................................................................................24
Figure 3- 17 network indicator circuit diagram....................................................................................24
Figure 3- 18 Analog voice reference circuit..........................................................................................25
Figure 3- 19 External audio codec reference circuit......................................................................... 26
Figure 3- 20 PCM short mode sequence diagram........................................................................................27
Figure 3- 21 RF connector location map....................................................................................................27
Figure 3- 22 RF connector dimensions........................................................................................................28
Figure 3- 23 Recommended Coaxial RF Cable Dimensions....................................................................... 28
Figure 3- 24 Antenna matching circuit......................................................................................................29
Figure 3- 25 Received signal strength with and without diversity antenna............................... 29
Figure 6- 1 CLM920_TD5 appearance..............................................................................................................36
Figure 6- 2 Connector dimensions................................................................................................................37

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Table Index
Table 2- 1 Operating frequency band............................................................................................................7
Table 2- 2 Key Features.................................................................................................................................... 8
Table 3- 1 IO parameter definitions..........................................................................................................12
Table 3- 2 Interface definitions................................................................................................................13
Table 3- 3 Power pin definitions................................................................................................................15
Table 3- 4 Reset Pin Definition..................................................................................................................18
Table 3- 5 Power-on sequence parameters..................................................................................................18
Table 3- 6 RESET Pin Definitions................................................................................................................19
Table 3- 7 USB interface pin definitions................................................................................................20
Table 3- 8 UARTserial signal definitions................................................................................................21
Table 3- 9 USIM Pin definitions..................................................................................................................21
Table 3- 10 SIM Hot-plug detective pins definitions......................................................................... 23
Table 3- 11 General GPIO Pin Definitions................................................................................................23
Table 3- 12 Network LED Pin Definition....................................................................................................24
Table 3- 13 Network indicator status........................................................................................................24
Table 3- 14 Analog voice pin definitions................................................................................................25
Table 3- 15 PCM Pin Definition....................................................................................................................26
Table 3- 16 PCM Parameter.............................................................................................................................. 26
Table 3- 17 RF Connector Parameters..........................................................................................................28
Table 4- 1 RF Frequency Table......................................................................................................................29
Table 4- 2 Test Instruments..........................................................................................................................30
Table 4- 3 2G 3G RF specifications............................................................................................................31
Table 4- 4 4G RF sensitivity index............................................................................................................31
Table 4- 5 4G RF transmission power..........................................................................................................32
Table 4- 6 Main Antenna specifications....................................................................................................32
Table 4- 7 GNSS Antenna specifications....................................................................................................33
Table 4- 8 GSM power consumption................................................................................................................33
Table 4- 9 WCDMA power consumption............................................................................................................34
Table 4- 10 LTE power consumption..............................................................................................................34
Table 4- 11 TDS-CDMA power consumption....................................................................................................34
Table 4- 12 CDMA power consumption............................................................................................................35
Table 5- 1 4G module operation and storage temperature................................................................... 35
Table 5- 2 CLM920_TD5 Mini PCIE Module IO Electrical Characteristics..................................... 35
Table 5- 3 CLM920_TD5 Mini PCIE module operating characteristics............................................... 35
Table 5- 4 CLM920_TD5 ESD Characteristics..............................................................................................36

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1 Introduction
This document is the hardware interface manual of the wireless solution product
CLM920_TD5 Mini PCIE module. It is intended to describe the hardware composition
and functional characteristics of the module solution product, application
interface definition and usage, electrical and mechanical characteristics, etc.,
provide hardware instructions for users’ application development based on the
product.
2 Product Overview
2.1 General Description
CLM920_TD5 Mini PCIE module provides data connectivity on FDD / TDD / TD-SCDMA /
UMTS / EVDO / CDMA / EDGE / GSM networks and inergrated GPS service with PCI Express
Mini Card 1.2 standard interface. The module bases on Qualcomm's MDM9X07, supports
Cat4 which upload/download speed can reach 50Mbps/150Mbps, fully supports VOLTE
and SRLTE and supports emdedded operating system such as Windows 7/Windows
8/Windows 10/Android /Linux/WinCE.
CLM920_TD5 module can be applied in the following applications:
Vehicle System
Wireless POS System
Wireless Advertising, media
Remote Monitor System
Intelligent Meter Reading System
Mobile Broadband
Industrial Automation
Other Wireless Terminal Device
2.2 Key Features
Table 2- 1 Operating frequency band
Network
Band
Product Series
CLM920_TD5
GSM
GSM850

GSM900

GSM1800


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GSM1900

LTE(FDD)
LTE FDD B1

LTE FDD B2

LTE FDD B3

LTE FDD B4

LTE FDD B5

LTE FDD B7

LTE FDD B8

LTE FDD B17

LTE FDD B20

LTE FDD B28

LTE(TDD)
LTE TDD B38

LTE TDD B39

LTE TDD B40

LTE TDD B41

TD-SCDMA
TD-SCDMA B34

TD-SCDMA B39

WCDMA
BAND 1

BAND 2

BAND 5

BAND 8

CDMA2000/EVDO
BC0
optional
GNSS
GLONASS

GPS

BeiDou/Compass

Category 1

1GNSS function is optional.
2The module supports Category 4 as default. The module label will notes CAT
1 when it supports Category 1. CAT1 doesn’t support diversity.
Table 2- 2 Key Features
Feature
Details
Physical
Characteristics
51mmx30mmx4.1mm
Mounting
Grounding screw holes (2)
Application
processor
Single-core ARM Cortex-A7 processor, clocked at
1.2GHZ, 256kB level 2 cache
Power Supply
3.3V - 4.2V Typical supply voltage:3.7V

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Standby Current
< 5mA
Application
Interface
Standard SIM interface, support 3.0V/1.8V,
support hot plug
USB2.0 (High-Speed)
Hardware reset interface
UART serial interface
PCM/Analog voice interface
Power interface
Network status indication interface
GPIO interface
Antenna connector
Main Antenna Connector（MM4829-2702RA4）
Diversity Antenna connectorMM4829-2702RA4）
GPS Antenna connector（MM4829-2702RA4）
Transmitting Power
LTE:
Class 3 (23dBm±2dB)
UMTS:
Class 3 (24dBm+1/-3dB)
TD-SCDMA:
Class 2 (24dBm+1/-3dB)
CDMA2000：
Class 3 (24dBm+3/-1dB)
GSM/GPRS:
Class 4 (33dBm±2dB) GSM850/GSM900
Class 1 (30dBm±2dB) DCS1800/PCS1900
Data services
GSM/EDGE:
GPRS: DL 85.6 kbps/UL 85.6 kbps
EDGE: DL 236.8 kbps/UL 236.8 kbps
WCDMA:
UMTS R99： DL 384 kbps/UL 384 kbps
DC-HSPA+: DL 42 Mbps/UL 5.76 Mbps
TD-SCDMA:
TD-HSDPA/HSUPA: 2.2Mbps（UL）/2.8Mbps（DL）
EV-DOr0/DOrA
CDMA 1xEVDOr0: DL 2.4Mbps/UL 153kbps
CDMA 1xEVDOrA: DL 3.1Mbps/UL 1.8Mbps
LTE:
LTE FDD:DL 150Mbps/UL 50Mbps@20M BW cat4
LTE TDD:DL 130Mbps/UL 35Mbps@20M BW cat4
LTE FDD:DL 10Mbps/UL 5Mbps@20M BW cat1
LTE TDD:DL 10Mbps/UL 5Mbps@20M BW cat1
Satellite
GPS/BEIDOU/GLONASS

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positioning
Protocol：NMEA
Diversity antenna
Supports LTE diversity antenna
AT instruction
Supports standard AT command set（Hayes 3GPP TS
27.007 和 27.005）
SMS
Text and PDU mode
Point to point MO and MT
SMS storage: USIM card/ME by default
Virtual network card
Support USB virtual network card
Temperature Range
Normal operation: –35°C to +75°C
Restricted operation: –40°C to +85°C
Storage temperature: -45°C to +90°C
Module function
distinction
On the label paper M shorts for the main set, D shorts
for diversity, G shorts for GPS, V shorts for analog
voice
2.3 Module Function
CLM920_TD5 Mini PCIE module contains the following circuit elements:
Baseband processing unit
Power management unit
Memory unit
RF transceiver unit
RF front-end unit
GPS RF receiving unit
CLM920_TD5 Mini PCIE module function block diagram is as follows:
MCP
RF FEM
Qualcomm Chip
MMPA
USIM
UART
PCM
USB
GPIO
ADC
Analog voice
ONOFF
RESET
MOUDLE
interface
GNSS RF
BB
RF
Transceiver
19.2MHZ
Main
Antenna
Diversity
Antenna
GNSS
Antenna

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Figure 2- 1 CLM920_TD5 Mini PCIE Functional Diagram
3 Application Interface
3.1 General Description
This chapter mainly describes the application interface of this module. Contains
the following sections:
52-pin Goldfinger
Interface definition
Power interface
USB interface
USIM interface
UART interface
WWAN control interface
PCM/Analog voice interface
RF antenna interface
3.2 Module Interface
3.2.1 52-pin Goldfinger
The CLM920_TD5 Mini PCIE module using 52-pin Mini PCIE Goldfinger as an external
interactive interface.
PMU
VBAT
VDD_EXT

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Figure 3- 1 TOP and BOTTOM of Goldfinger
Figure 3- 2 TOP and BOTTOM of Goldfinger Detail A&B
3.2.2 Interface definition
CLM920_TD5 Mini PCIE module interface is the standard Mini PCI Express interface.
The interface definition of the module is as below:
Table 3- 1 IO parameter definitions
Symbol
Description
IO
Bidirectional input and output

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PI
Power input
PO
Power output
AI
Analog input
AO
Analog output
DI
Digital input
DO
Digital output
Table 3- 2 Interface definitions
Pin
Standard Pin
Definitions
Module pin
definition
IO
Functional
description
Remarks
1
WAKE#
MIC+
AI
Audio input+
2
3.3Vaux
VBAT
PI
Power input
3
COEX1
MIC-
AI
Audio Input-
4
GND
GND
Ground
5
COEX2
SPK+/REC+
AO
Audio output+
set headset or
speaker by AT
6
1.5V
UIM_DET
DI
SIM hot plug
detection
7
CLKREQ#
SPK-/REC-
AO
Audio output-
set headset or
speaker by AT
8
UIM_PWR
UIM_PWR
PO
SIM power
supply
9
GND
GND
Ground
10
UIM_DATA
UIM_DATA
IO
SIM card data
signal
11
REFCLK-
UART_RX
DI
Serial receive
12
UIM_CLK
UIM_CLK
DO
SIM card clock
signal
13
REFCLK+
UART_TX
DO
Serial
transmission
14
UIM_RESET
UIM_RESET
DO
SIM reset
signal
15
GND
GND
Ground
16
UIM_VPP
NC
17
RESERVED
VDD_EXT
PO
1.8V output
18
GND
GND
Ground
19
RESERVED
WAKEUP_IN
DI
HOST wake up
module
1.8V, Active low

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20
W_DISABLE#
W_DISABLE#
DI
turn off RF
Active low
21
GND
GND
Ground
22
PERST#
RESET
DI
Reset control
Active low
23
PERn0
UART_CTS
DI
Serial Port
Send Clear
24
3.3Vaux
VBAT
PI
power input
25
PERp0
UART_RTS
DO
Serial request
to send
26
GND
GND
Ground
27
GND
GND
Ground
28
1.5V
NC
29
GND
GND
Ground
30
SMB_CLK
NC
31
PETn0
NC
32
SMB_DATA
WAKEUP_OUT
DO
module wakes up
the HOST
33
PETp0
NC
34
GND
GND
Ground
35
GND
GND
Ground
36
USB_D-
USB_DM
IO
USB
Differential
Signals -
37
GND
GND
Ground
38
USB_D+
USB_DP
IO
USB
Differential
Signals +
39
3.3Vaux
VBAT
PI
Power input
40
GND
GND
Ground
41
3.3Vaux
VBAT
PI
Power input
42
LED_WWAN#
LED_WWAN#
OC
Status light
indication
43
GND
GND
Ground
44
LED_WLAN#
UIM_DET
DI
SIM hot plug
detection
Reserved
45
RESERVED
PCM_CLK
DO
PCM clock pulse
46
LED_WPAN#
NC
Reserved
47
RESERVED
PCM_DOUT
DO
PCM data output

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48
1.5V
NC
49
RESERVED
PCM_DIN
DI
PCM data input
50
GND
GND
Ground
51
RESERVED
PCM_SYNC
DO
PCM frame sync
52
3.3Vaux
VBAT
PI
Power input
1The module’s general IO port level is 1.8V (except SIM, the SIM card port
level supports 1.8V and 3.0V).
2Shall not use the module’s pins which are defined as RESERVED or NC, they
need to be floated.
3.3 Power Interface
CLM920_TD5 Mini PCIE module power interface consists of two parts:
VBAT for the module power supply;
UIM_PWR for SIM card operation power supply;
VDD_EXT for 1.8V output supply;
3.3.1 Power Design
CLM920_TD5 Mini PCIE module power interface is as follows:
Table 3- 3 Power pin definitions
Pin
Name
I/O
Description
Min
voltage
Typical
voltage
Max
voltage
2,24,39,41
,52
VBAT
PI
Module power
supply
3.4V
3.7V
4.2V
8
UIM_PWR
PO
SIM power
supply
0
1.8V/2.85V
1.9/2.95V
17
VDD_EXT
PO
Output power
1.8V
4,9,15,18,
21,26,27,2
9,34,35,37
,40,43,50
GND
Ground
-
0
-
CLM920_TD5 Mini PCIE module with single power supply mode, the module provides 5-way
power supply pin, 14-way pin. VBAT power supply range of 3.3-4.2V, the proposed
power supply is 3.7V / 2A . The module’s peak current will reach 2.5A when transmit
data or call under HSPA/UTMS/GSM, which resulting in a large ripple on the power.
If instant voltage drop makes the VBAT power too low or the current supply

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insufficient, the module will power off or restart. To ensure that the module works,
all power and ground pins should be connected to use and able to prvide enough power
supply.
Figure 3- 3 GSM TDMA Power Supply Voltage Drop
On the premise of the VBAT can provide enough power, connect two 470uF/6.3V tantalum
capacitors in parallel near to the power, also connect another 10pF, 33pF, 0.1uF,
1uF ceramic capacitors.
Figure 3- 4 VBAT Power Supply
3.3.2 Reference Design of Power Supply
Actual design can use DC switching power supply or LDO linear power supply, both
design circuit needs to provide enough current. Refer to the following design:
Figure 3- 5 Reference Design of LDO linear power supply
VIN
EN
GND
OUT
ADJ
MIC29302WU
4
5
3
1
2
100uF
0.1uF
1uF
220uF
47K
100K
0.1uF
VBAT
EN
DC_5V
470uF
VBAT
470uF
1uF
100nF
10pF
33pF
577us
VBAT
4.615ms
Max
Burst
Ibat
2
1
10
7
8
9
3
12
DC_EN
VIN
20K
SK34
100pF
220uF
1uF
0.1uF
VBAT
RLF7030T-2R2
EN
SS
VI
S
SW
OVP
FB
MIC2253_06

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Figure 3- 6 Reference Design of DC switching power supply
Figure 3- 7 Reference Design of PMOS tube to control the power switch
1In order to prevent the surge and overvoltage damage the module, suggest
that connect a 5.1 V / 500 mw zener diodeon to the module’s VBAT pin in parallel.
2Suggest that use another three ceramic capacitors（33pF ,10pF,100nF）near
to the VBAT pin.
3The minimum working voltage of the module is 3.3V. Due to the peak current
will reach 2.5A when transmit data or call under GSM making a large ripple on the
power, the supply voltage can’t lower than 3.3V.
3.3.3 VDD_EXT 1V8 output
The pin 17 will output 1.8V after CLM920_TD5 Mini PCIE module boots up normally.
Its maximum current load is 50mA. The external master can determine whether the
module works by reading the voltage of the VDD_EXT. The VDD_EXT can also be used
as external power supply, such as level conversion chip, etc.
3.4 Reset mode
CLM920_TD5 Mini PCIE module will work after be gived the correct power supply. Users
can determine whether the module works by reading the voltage of the VDD_EXT.
G
D
S
10K
470nF
100K
10uF
VBAT
PWR_CTRL
DC_IN

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Table 3- 4 Reset Pin Definition
Pin
Name
I/O
High value
Description
22
RESET
DI
1.8V
Module reset control pin, active low
28
PWRKEY
NC
NC
NC
3.4.1 Power-on sequence
Figure 3- 8 Power-on sequence diagram
Table 3- 5 Power-on sequence parameters
Symbol
Description
Min
Typical
Max
Unit
Ton
Low level width of boot
100
500
-
ms
Ton(statu
s)
Boot time(Judge by the
status)
22
-
-
ms
Ton(usb)
Boot time(Judge by the
USB)
-
20
-
ms
Ton(uart)
Boot time(Judge by the
UART)
-
20
-
ms
VIH
PWRKEY high level input
0.6
0.8
1.8
V
VIL
PWRKEY low level input
-0.3
0
0.5
V
3.4.2 Power off
The module without a normal shutdown process when turn it off by cutting off the
VBAT power supply. Only if the module is abnormal and can’t restart by AT, cutting
off the VBAT power supply can be used。
3.4.3 Reset control
CLM920_TD5 Mini PCIE module’s reset pin is 22. Pull this pin low 150-450 ms to
Ton
Ton(status)
Ton(usb)
Active
USB
Active
UART
STATUS
RESET
PWRKEY
VBAT
Ton(uart)

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reset the module.This pin is sensitive to interference ratio, the alignment should
pay attention to protection.
Figure 3- 9 Reset Reference Circuit
Table 3- 6 RESET Pin Definitions
Symbol
Description
Min
Typical
Max
Unit
Treset
Low level pulse width
150
200
450
ms
VIH
RESET high level input
1.17
1.8
2.1
V
VIL
RESET low level input
-0.3
0
0.8
V
RESET sequence：
Figure 3- 10 RESET sequence diagram
CLM920_TD5 Mini PCIE module support used AT command to reset, the AT command is
AT+CFUN=1,1. Detials can check the CLM920_TD5 AT command manual.
3.5 USB interface
CLM920_TD5 Mini PCIE module’s USB interface supports USB2.0 high-speed protocol.
Interface supports pattern from the device, does not support USB charging mode.
USB interface is defined as follows:
VBAT
PWRKEY
VDD_EXT
RESET
PowerOn sequence
On
Reset
Restart
>=150mS
<=450mS
Module Status

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Table 3- 7 USB interface pin definitions
Pin
Signal name
IO
Description
36
USB_DM
IO
USB differential signal -
38
USB_DP
IO
USB differential signal +
4,9,15,18,21,26,27,29,
34,35,37,40,43,50
GND
Ground
Module as a USB device, support USB mechanism of sleep and wake up. The USB reference
design circuit is as follows:
Figure 3- 11 USB design circuit diagram
1USB interface supports High speed(480Mbps) and Full speed(12Mbps) mode.
USB traces designed to strictly follow the USB2.0 protocol requirements, wiring
attention to the data line protection, differential traces, the control impedance
of 90Ω.
2In order to improve the antistatic performance of USB interface, it is
recommended that ESD protection devices should be added to the data lines, the
equivalent capacitance of protection device less than 2pF.
3USB bus power supply voltage provided by the module, without external
provision. Meanwhile, the module can only be used as the slave device of the USB
bus, because the module’s USB interface does not provide external USB bus power.
USB interface supports the following functions:
Software download and upgrade
Data communication
AT Command
GNSS NMEA output
3.6 UART interface
CLM920_TD5 Mini PCIE module provides a set of UART interface, the level is 1.8V.
This interface can be used for AT communication and printing program log
information.
The UART interface supports 4800, 9600, 19200, 38400, 57600, 115200, 230400, 460800
0R
0R
36
38
D-
D+
GND
HOST
USB_DM
USB_DP
GND
MODULE