Zeroplus LAP-321000U-A User manual

The Zeroplus Logic Analyzer
Installation Guide
The Zeroplus Logic Analyzer Installation Guide Page 1
Index
Preface ............................................................................................................. 2
1 Features of the Zeroplus Logic Analyzer ................................................ 3
1.1 Package Contents............................................................................................ 3
1.2 Introduction ...................................................................................................... 5
1.3 Hardware Specifications................................................................................... 8
1.4 System Requirements...................................................................................... 9
1.4.1 Operating System Requirements .......................................................... 9
1.4.2 Hardware System Requirements........................................................... 9
1.5 Device Maintenance and Safety..................................................................... 10
2 Installation................................................................................................ 12
2.1 Software Installation ....................................................................................... 12
2.2 Hardware Installation ..................................................................................... 14
2.3 Tips and Advice.............................................................................................. 16
2.4 Flow of software operation ............................................................................. 18
3 Introduction to Logic Analysis............................................................... 19
3.1 Logic Analysis ................................................................................................ 19
Task 1. Clock Source (Frequency) and RAM Size set up.................... 19
Task 2. Trigger Properties Setup ......................................................... 21
Task 3. Signal/Bus Trigger Edge Setup ............................................... 26
Task 4. Run to Acquire Data ................................................................ 26
3.2 Bus Logic Analysis ......................................................................................... 28

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Preface
This Quick Start Guide is designed to help new and intermediate users navigate and
perform common tasks with the Zeroplus Logic Analyzer. Despite its simple packaging
and interface, the Logic Analyzer is a sophisticated measurement and analysis tool. It is
also a highly sensitive electrical current sensing device. Users must carefully read
instructions and procedures pertaining to installation and operation. Any instrument
connected to the unit should be properly grounded. A pair of anti-static gloves is strongly
recommended when performing a task with the device. To ensure accuracy and
consistency of output data, use of the bundled components is strongly recommended.
User opinions are very important to Zeroplus. Please contact our engineering team
by telephone, fax or email with your questions or feedback. Thank you for choosing
the Zeroplus Logic Analyzer.

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Installation Guide
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1 Features of the Zeroplus Logic Analyzer
In this chapter, users will learn about the package contents, description, hardware
specifications, system requirements, and safety issues of the Zeroplus Logic Analyzer.
Though this chapter is purely informative, we highly recommend reading this carefully to
ensure safety and accuracy when performing any operation with the Zeroplus Logic
Analyzer.
1.1 Package Contents
Verify the package contents before discarding packing materials. The following
components should be included with your product. For assistance, please contact our
nearest distributor.
Table 1-1: Parts list for retail packages
Models LAP-16128U LAP-32128U-A LAP-321000U-A LAP-322000U-A
Logic Analyzer 1 1 1 1
16-Pin Testing
Cable 0 1 1 1
-Pin Testing Cable 2 2 2 2
Probe 20 36 36 36
USB Cable 1 1 1 1
Getting Started
Guide 1 1 1 1
Driver CD** 1 1 1 1
-PinTesting Cable
(White) 1 1 1 1
-Pin Testing Cable
(Black) 1 1 1 1
* This Driver CD consists of a multilingual software interface program, as well as a
multilingual User’s Manual.

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Fig. 1-1: Logic Analyzer
16-Pin x 1
8-Pin x 2
Fig. 1-2: Testing Cables
Fig. 1-3: Probes
(varied depending on models) Fig. 1-4: USB Cable
Fig. 1-5: Getting Started Guide Fig. 1-6: Driver CD
Fig. 1-7: 1-Pin External Clock Wire
(White)
Fig. 1-8: 2-Pin Ground Wire
(Black)

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1.2 Introduction
Zeroplus Logic Analyzer models LAP-16128U, LAP-32128U-A LAP-321000U-A
and LAP-322000U-A all share the same external features as illustrated in the following
figures.
Fig. 1-9: A view of the Zeroplus Logic Analyzer LAP-A Series. see Fig 1-12 for detailed
information on the Signal Connectors.
Fig. 1-10: Side view of the Zeroplus Logic Analyzer, which draws its power
from the USB connection.

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Fig. 1-11: The above illustration demonstrates how the Base Stand Support may be
adjusted. Gently pull the plate away from the analyzer, rotate it 90° and release it.
Fig. 1-12: Rear view of the Zeroplus Logic Analyzer LAP-A Series.
Port A: A0 ~ A7
Port B: B0 ~ B7
Port C: C0 ~ C7
Port D: D0 ~ D7
For the External Clock
connection.
For grounding test
circuits.
For extended modules
or devices not
designated to be
analyzed.
For signal transmission to
active other instruments.

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: List of functional pins in each model.
Models LAP-16128U LAP-32128U-A LAP-321000U-A LAP-322000U-
P
ort A ( A0~A7) X X X X
P
ort B ( B0~B7) X X X X
P
ort C ( C0~B7) X X X
P
ort D ( D0~B7) X X X
R_O X X X X
T_O X X X X
S_O X X X X
CLK X X X X
GND X X X X
VDD X X X X
IOA X X X X
IOB X X X X
IOC X X X X
GND X X X X
Table 1-2: Definitions and Functions of pins for all models.
CLK Clock Connects a given external module to be analyzed.
GND Ground Two pins used for grounding the Logic Analyzer with a
given external module to be analyzed.
Table 1-3: Definitions and Functions of pins for advanced models (1).
R_O Read (Out)
When the Logic Analyzer is about to upload data from
memory to the PC, the R_O will send a Rising Edge
signal of DC3.3V. When the upload is finished, a
Falling Edge signal is sent.
T_O Trigger (Out)
When a trigger condition is established, the T_O will
send a Rising Edge signal of DC3.3V. When memory
is full, a Falling Edge signal is sent.
S_O Start (Out)
When a user initiates a sampling task by clicking the
RUN icon in the window or clicking the START button
on the device, the R_O will send a Rising Edge signal
of DC3.3V. When the Logic Analyzer finishes
uploading, a falling edge signal is sent.

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Table 1-4: Definitions and Functions of pins for advance models (2).
VDD Voltage Drain
(Semiconductor)
Provides +3.3 V for external modules by draining
voltage from the Logic Analyzer.
IOA Ext. I/O Module A Transmits signals from an external model or device
not being tested.
IOB Ext. I/O Module B Same as IOA.
IOC Ext. I/O Module C Same as IOA.
GND Ground Grounds external devices, in sequence
1.3 Hardware Specifications
Table 1-5: Hardware specifications of LAP-A Model.
Items\Type LAP-16128 LAP-32128U-A LAP-321000U-A LAP-322000U
Interface USB 2.0 (1.1)
Operating System 98SE/ME/2000/XP
Power Supply USB 1.1 (USB 2.0 Recommended)
Channels 16 32
Bandwidth 75MHz
Memory 4M Bits
Memory Depth
(Per Channel) 128 Kbits 128 KBits 1 MBits 2 MBits
Internal Clock Rate
(asynchronous) 100 ~ 200 MHz
Max External Clock
(synchronous) Max 100MHz
Trigger Channels 16 Channels 32 Channels
Trigger Condition Edge/Pattern
Pre-Trigger/
Post-Trigger Yes
Trigger Level 1 Level
Trigger Count 1-65535
Max Trigger Page Max 8191
Enable Channel 16 32
Buses Data Yes
Enable Delay Start: Edge and Pattern
End: 1-65535
Compression 16 Channel
Compression 1-255 24 Channel Compression 1-255

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1.4 System Requirements
This section discusses basic operating system and hardware requirements for the
Logic Analyzer. Software and hardware capabilities may vary depending on PC
configuration,. This manual assumes proper installation of a supported operating
system as listed below.
1.4.1 Operating System Requirements
In this sub-section, we share our experiences testing the Zeroplus Logic Analyzer on
the following Microsoft Windows operating systems. Since the Zeroplus Logic Analyzer
requires operating system support of the USB protocol, Windows 95r2 and earlier OS
versions are incompatible.
1) Windows 98, 98 Second Edition - supported
2) Windows ME –supported
3) Windows 2000 Professional, Server Family - supported
4) Windows XP Home, Professional Editions (32-Bit versions) - supported
1.4.2 Hardware System Requirements
zCPU
Windows NT, 98, 98 SE
166 MHz, or above.
Windows 2000, XP
300 MHz, or above (strongly suggest 900 MHz, or above).
We have tested various 32-Bit and 64-Bit CPUs. Overall, we find that all
32-Bit CPUs work very well with Logic Analyzer software. Moreover, we find that
AMD’s 64-Bit CPUs, except Opteron, with a 64-Bit Windows operating system,
work just fine with Logic Analyzer; no significant problems occur.
zMemory
Windows NT, 98, 98 SE
128 MB or above (64 MB minimum).
Windows 2000, XP
256 MB or above (128 MB minimum).
zHard Drive
At least 100 Mb available space.
zUSB
USB 1.1 compatible (recommend USB 2.0).
zDisplay Devices (recommended)
1. 17” monitor with 1024x786 resolution or higher.
2. 8MB SDRAM on Video Card.

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1.5 Device Maintenance and Safety
Follow these instructions for proper operation and storage of the Logic Analyzer.
Table 1-7: General Advice
Cautions xDo not place heavy objects on the Zeroplus Logic Analyzer.
xAvoid hard impacts and rough handling.
xProtect the Logic Analyzer from static discharge.
xDo not disassemble the Zeroplus Logic Analyzer; this will void
the warranty and could affect its operation.
Cleaning xUse a soft, damp cloth with a mild detergent to clean.
xDo not immerse or spray any liquid on the Zeroplus Logic
Analyzer..
xDo not use harsh chemicals or cleaners containing substances
such as benzene, toluene, xylene or acetone.
Table 1-8: Electrical Specifications
Items Minimum Typical Maximum
Working Voltage DC 4.5 V DC 5.0 V DC 5.5 V
Current at Rest 200 mA
Current at Work 400 mA
Power at Rest 1 W
Power at Work 2W
Error in Phase Off* ± 1.5 ns
Vinput of Testing Channels ± DC 30 V
VReference DC -6V DC +6 V
Input Resistance 500K:/10pF
Working Temperature 5°C 70°C
Storage Temperature -40°C 80°C
Table 1-9* refer to the User Manual for error analysis calculation.

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: Operating Environment
xAvoid direct sunlight
xUse in a dust free, non-conductive environment (see Note )
xRelative Humidity: < 80%
xAltitude: < 2000m
xTemperature: 0 ~ 40 degrees C
This is a Class A product which may cause radio interference in a
domestic environment.
WARNING
Note: EN 61010-1:2001 specify degrees of pollution and their
requirements. Logic Analyzer falls under Level 2.
Pollution refers to ‘addition of foreign matter, solid, liquid or
gaseous (ionized gases), that may produce a reduction of
dielectric strength or surface resistivity’.
Pollution Degree 1: No pollution or only dry, non-conductive
pollution occurs. This pollution has no effect.
Pollution Degree 2: Normally only non-conductive pollution
occurs. Occasionally, however, temporary conductivity caused by
condensation must be expected.
Pollution Degree 3: Conductive pollution occurs or dry,
non-conductive pollution occurs which becomes conductive due
to condensation. In such conditions, equipment is normally
protected against exposure to direct sunlight, precipitation and
wind, but neither temperature nor humidity is controlled.
Storage
Environment
Relative Humidity: < 80%
Temperature: 0 ~ 50 Degrees C
Conclusion
After reading this section, users should have a basic grasp of the Logic Analyzer. A
complete understanding of the Safety and Care Recommendations section is a
critical prerequisite of any further operation as presented in the User Manual.

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2 Installation
This chapter describes installation of the Logic Analyzer hardware and software.
Software installation steps must be followed precisely to ensure successful installation.
2.1 Software Installation
In this section, users will learn how to install the software interface and drivers. As
with proper installation of many USB devices, the Logic Analyzer application and driver
software must be installed prior to connection of the hardware. The following steps
illustrate an installation of a Zeroplus LAP-32128U-A Logic Analyzer. The other two
models mentioned in Chapter 1 would follow identical procedures.
Step 1. Insert the driver CD-ROM in the PC CD drive.
Step 2. Execute the installation program. Go to the START menu, click START,
click Run, click Browse, select Setup.exe file in the appropriate model
folder and then click OK. It is recommended that all other programs are
closed while installation proceeds.
Step 3. Choose the desired language.
Step 4. Click Next to proceed with the Install wizard
Step 5. Select “I accept the term in this license agreement, ” and click Next.
Step 6. Enter User and Organization name.
Step 7. Choose the setup type. We recommend Complete for most users.
Step 8. Click Install to confirm settings and begin actual installation.
Step 9. Click Yes to acknowledge the Microsoft Digital Signature message and
continue the installation.
Step 10. Click Finish to complete the installation.
Step 11. Click Yes to restart the PC.

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2.2 Hardware Installation
Hardware installation simply involves connecting the Logic Analyzer to your
computer with the included USB Cable as shown in Figures 2-4 and 2-5.
Fig. 2-1
Fig. 2-2
Fig. 2-3
1.Plug the fixed end of the cables into
the LA (Fig.2-1).
2.Plug the loose ends into the
connectors on the circuit board to be
analyzed (Fig.2-2).
Note: The following sequence must be
observed when connecting the
connectors into the circuit board: A0 =
Brown, A1 = Red, A2=Orange and so on.
3.The circuit board must be grounded to
the Logic Analyzer with the connecting
cables (Fig.2-3).
Step 1 - Plug the thin male end of the USB cable into the laptop or PC.
Step 2 - Plug the square female end into the logic analyzer.

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Fig. 2-4
Fig. 2-5
4.Plug the square end of the USB cable
into the Logic Analyzer (Fig.2-4).
5.Plug the thin end into the computer
(Fig.2-5).
At this point, the computer should be able to detect the Logic Analyzer and finalize the
installation for hardware connection. For further information, refer to the Troubleshooting
and Frequently Asked Questions (FAQ) chapters in the User Manual.
Fig. 2-6: An assembly of Laptop, Logic Analyzer, and a testing board.

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2.3 Tips and Advice
1. When testing a circuit board, make sure that the internal sampling frequency (within
the Logic Analyzer) is at least four times the external board frequency.
2. If the signal connector does not work well with the pins on the test board, try using the
supplied probes.
Fig. 2-7: Probes supplied with the Zeroplus.
Fig. 2-8
Fig. 2-9
3. Usages of probes
3-1. Take the loose end of the cable and
insert it into the clip.
3-2. Compress the probe as shown to
reveal 2 metal prongs (Fig.2-8).
3-3. Place the metal prongs on a metal
connector on the motherboard and
release the fingers so that the
prongs grip the metal connector
(Fig.2-9).

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4. The Logic Analyzer will connect to the Zeroplus server for software updates if an
internet connection is available.
5. Unwanted signals can be filtered out using the Enable or Enable Delay functions.
6. When measuring for a long period, Compression makes memory more efficient.
7. Trigger condition depends on the test board. If triggering does not work well, try
narrowing the trigger conditions and optimize them repeatedly.
8. If a test board has a lower frequency than Logic Analyzer, sample signals according
to the external clock.
9. When clocking by an external clock, filter extra signals with the Enable function.
10. Unused channels may be removed from the Bus/Signal display using Bus/Signal
(Menu) ÎChannel Setup.

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2.4 Flow of software operation

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3 Introduction to Logic Analysis
Chapter 3 gives detailed instructions in performing two basic analysis operations
and five advance analysis applications with the Logic Analyzer. The basic analytical
operations are the Logic Analysis and the Bus Analysis, which are fundamental to all
further applications.
3.1 Logic Analysis
Logic Analysis is meant for a single signal analysis. Section 3.1 gives detailed
instructions on the software’s basic setup.
Basic Software setup of the Logic Analysis
Task 1. Clock Source (Frequency) and RAM Size set up
Step 1. Click icon or Click Sampling Setup from Bus/Signal on the menu bar,
the dialogue as shown in Fig 3-1 will appear.
Fig 3-1 – Clock Source