ZiLOG Z183 EMAC User manual

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User Manual, Revision 1
UM008301-0401
10 Base-T Ethernet Media
Access Controller Add-On
Board for the Z183
Evaluation Platform

UM008301-0401
Z183 EMAC Board
User Manual
This publication is subject to replacement by a later edition. To determine whether a later
edition exists, or to request copies of publications, contact:
ZiLOG Worldwide Headquarters
910 E. Hamilton Avenue
Campbell, CA 95008 USA
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Document Disclaimer
© 2001 by ZiLOG, Inc. All rights reserved. Information in this publication concerning the devices,
applications, or technology described is intended to suggest possible uses and may be superseded. ZiLOG,
INC. DOES NOT ASSUME LIABILITY FOR OR PROVIDE A REPRESENTATION OF ACCURACY OF
THE INFORMATION, DEVICES, OR TECHNOLOGY DESCRIBED IN THIS DOCUMENT. ZiLOG
ALSO DOES NOT ASSUME LIABILITY FOR INTELLECTUAL PROPERTY INFRINGEMENT
RELATED IN ANY MANNER TO USE OF INFORMATION, DEVICES, OR TECHNOLOGY
DESCRIBED HEREIN OR OTHERWISE. Except with the express written approval ZiLOG, use of
information, devices, or technology as critical components of life support systems is not authorized. No
licenses or other rights are conveyed, implicitly or otherwise, by this document under any intellectual property
rights.

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Table of Contents
Introduction ...................................................1
KitContents ...................................................1
ConfiguringtheZ183EvaluationBoard..............................1
InstallingtheEMACBoard........................................5
InterruptCabling.............................................6
InterruptSelection ...........................................7
AddressJumpers ............................................7
SoftwareDevelopment...........................................7
CS8900AAddressMap .......................................7
DeviceDriverandApplicationInterfaceRoutines ...................8
TransmitandReceiveBufferStructure ..........................12

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Introduction
The Z183 Ethernet Media Access Controller (EMAC) board is a compact
9 x 8cm printed circuit board assembly that is designed to be used with the
Z183 evaluation board. It has an RJ-45 jack that allows you to connect to a
standard 10 Base-T hub for testing purposes.
Kit Contents
The Z183 EMAC kit contains the following items. If you did not receive one of
these items, contact your local sales office.
• One EMAC board labeled
10 Base-T interface
•Interrupt wiring cable assembly
•Z183 EMAC Board User Manual
Configuring the Z183 Evaluation Board
ToconfiguretheZ183boardtobeusedwiththeEMACboard,followthese
steps:
1. Power up the Z183 board by connecting the external 9V power supply.
2. Use the serial cable to connect the DB9 serial connector on the Z183 board
to the serial port of your PC.
3. Open the Hyperterminal application on your PC and the Connection
Description window appears.
Note: If you have a DB25 connector on your PC, you must purchase a DB25-DB9 adapter.

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4. Select a name for your connection and click OK.
5. When the Connect To window appears, click Cancel.

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6. In the Hyperterminal window, pull down the FILE menu and select
PROPERTIES.
7. In the ConnectUsing field, find the port that your serial cable is connected to
and select it.

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8. Click the Configure button and configure the screen as shown below. Then
click OK to return to the Hyperterminal window.

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9. In the Hyperterminal application, pull down the CALL menu and select Call
(Windows 98) or Connect (Windows NT). The Hyperterminal window
displays the following information, which indicates that the Z183 board is
working properly.
10.Press the RESET button on the Z183 board to display the text message in
the window shown above. If the text does not appear, repeat the
configuration process.
Installing the EMAC Board
To install the EMAC board, follow these steps:
1. Unpack the EMAC board and the interrupt cable.
2. Hold the EMAC board so that the components are facing upward.
3. Make sure the Z183 board is turned off.
4. Place the EMAC board’s 50-pin J1 socket header directly over the J22 pin
header of the Z183 board. The EMAC board has support studs that allow it
to rest on the desk surface.
5. Press the EMAC board down firmly onto the Z183 board. You may need to
bend the connectors of the red power LED to get the connectors to mate
properly.
6. Use a jumper cable to connect JP3 on the EMAC board to INT1 on the Z183
board. The interrupt cable has a 6-pin socket header that should be plugged
into JP3 on the EMAC board. The other end of the cable is a 10-pin socket
header that must be plugged into J23 on the Z183 board near the RESET
ZiLOG Z80183 Monitor Version 2.8
Z80183

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switch. Use the white Pin 1 dot on the cable to correctly orient the headers
andthenplugitin.
7. Power up the Z183 board.
8. The red LED on the EMAC board glows if the connectors are working
properly. If the LED is not glowing, turn off the power, unplug the EMAC
board, and return to step 2.
9. The EMAC board’s LINK, LAN and BSTATUS LEDs should not be glowing.
If they are glowing, check the connectors that join the two boards.
10. Use a straight-through 10 Base-T UTP cable to connect the CON1 RJ-45
jack to a port on your 10 Base-T hub.
11. Using the Debug Monitor, send an I command to Input I/O byte at 2000h.
When the I/O port 2000h is read, the Ethernet MAC chip on the EMAC
board comes out of hardware reset condition.
12. When the LINK LED glows, the EMAC controller chip (a Cirrus Logic
CS8900A) is detecting link pulses from the hub and the interface is ready. If
the LED is not glowing, make sure your hub is powered up. If you power up
the hub and LINK LED is still not glowing, repeat the installation process.
13.Use the device driver routines in the Software Development section to
integrate your software applications.
Interrupt Cabling
The EMAC board can be used with interrupts if the interrupt cable has been
properly connected.
V
cc
INT2
INT1
INT0
65
21
J23
JP3
Jumper Wire Supplied with
Every 10-Base-T Board

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Interrupt Selection
Select the interrupt for EMAC service by placing the JP4 jumper in the
appropriate position.
JP4: 1-2 /INT0
JP4: 3-4 /INT1
JP4: 5-6 /INT2
Make sure there is only one jumper inserted in the JP4 jumper stack. It is
recommended that you use rising edge trigger mode of interrupts with the
CS8900A. INT0 cannot be used with edge triggering.
Address Jumpers
The EMAC board also has a 3x3 address routing jumper array. These jumpers
should always be in the A15, A14, and A13 position.
Software Development
CS8900A Address Map
The CS8900A EMAC controller chip should be accessed in 16-bit mode at a
base I/O mapped address of 2300H in the EMAC board’s 64K I/O address
space. The board actually uses a 2000H –3FFFH range of I/O address map
even though the Ethernet chip is tightly decoded at 2300H –230FH I/O
locations.
When specifying the “PacketPage”addresses via the on-chip PacketPage
pointer, use the normal addresses specified in the CS8900A manual. Only the
primary “external bus visible”register space is shifted from a default base
address of 300H-30FH to the new 2300H-230FH range.
All buffering required for Ethernet packet transmission and reception is done
on-chip by the CS8900A.
EMAC Hardware Reset
The EMAC hardware employs a latching type of reset logic. When power is
applied or when the RESET button on the EMAC board is pressed, the board
goes into a reset state. The reset gets released when the first/IORD active low
pulse occurs in the 2000H-3FFFH range. This means that the initialization code
for the EMAC driver must make a dummy read at an I/O location in this range.
For example, from Debug Monitor reading an I/O location using a “I”command
at 2000H is adequate.

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Device Driver and Application Interface Routines
extern int Init8900(char *ieeeaddr, void (*rxnotify)(), void (*txnotify)(), uint
*intrvec);
The Ethernet driver is initialized by a calling the Init8900() function.
•ieeeaddr is a 6-byte (or 3-word) array that contains the unique 48-bit MAC
address assigned to the Ethernet add-on adapter.
•void rxnotify (uint i) is a user function that is called at interrupt time to
indicate the arrival of a frame that meets the receive filter criteria you have
set (see SetRxFilter()). The pointer to this function is passed at initialization.
You must code the logic that involves receiving the frame contents into a
buffer using the ReceivePkt function, as well as doing any inbound buffer
chain management that may be required. The argument “i”available to your
code is a bit mask indicating the receive error/conditions applicable to the
frame that you can now retrieve using a ReceivePkt( ) call. The BIT_RXOK
condition bit is set for a good frame with no errors.
•void txnotify (uint i) is a user function that is invoked at interrupt time to
indicate the completion of a previously issued transmit frame operation (see
TransmitPkt( )). The pointer to this user function is passed at initialization.
You can examine the argument “i”as a bitfield that indicates the event bits
pertaining to the transmit done.
This user function may also call TransmitPkt( ) to issue another frame for
transmission.
Note: All code in this function would run at interrupt time. Pay attention to stack usage, shared variables,
event posting, etc.
Note: All code in this function would run at interrupt time. Pay attention to stack usage, shared variables,
event posting, etc.

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•uint *intrvec is a pointer to an interrupt vector table entry as determined by
the Z183 hardware interrupt line that is used to connect to the add-on board
interrupt output, the value programmed into the I and IL registers of the
Z183.
The driver places the address of its interrupt handler into the word that this
argument points to.
Once inside its interrupt service routine, the driver prevents its own Ethernet
add-on board peripheral from issuing further interrupts and re-enables the
general interrupts using an EI instruction. This allows minimum latency on
other real-time interrupts in the Z183 microprocessor programming.
Approximately 15 instructions on entry and a similar amount of instructions
on exit are executed with a DI (general master interrupt disable) instruction.
The transmit and receive function callbacks are issued with all other general
interrupts enabled.
extern void Reset8900(void);
This function resets the Ethernet MAC driver and hardware. Use Init8900( ) to
reactivate the Ethernet MAC hardware and driver. However, this is not a
hardware reset. Issuing this reset has no effect on the RESET button on the
Z183 board. The EMAC board remains addressable and accessible from
software.
Note: The driver is unaware of the exact mechanism that causes its interrupt to be vectored to the
location specified by this pointer. You should check all the associated Z183 register programming,
as is necessary in an application scenario. Refer to the add-on board hardware manual for details
on wiring the interrupt signal between the add-on board and the Z183 board.

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extern int SetRxFilter(int rxflags, char *Hashbits);
This function is used to specify the type of receive frames that are accepted by
the driver.
•rxflags is a bitfield used to set the following bits to 1, as defined in
<ethdr183.h>.
–IAHashA—Specify to accept frames specified by the 64-bit Hashbits
filter.
–PromiscuousA—Specify to accept any frame on the wire.
–RxOKA—Specify to accept only frames with the proper CRC.
–MulticastA—Specify to accept multicast frames.
–IndividualA—Specify to accept frames addressed specifically to this
Ethernet MAC’s unique ieeeaddr.
–BroadcastA—Specify to accept broadcast frames.
–CRCerrorA—Specify to accept frames even with CRC errors.
–RuntA—Specify to accept frames that are less than 64 bytes long.
–ExtradataA—Specify to accept frames larger than 1518 bytes (including
CRC), but hold the first 1,518 bytes only.
•Hashbits is a 64-bit field used to specify to the driver an address mask of
destination addresses against which incoming frames are qualified for
acceptance when the IAHashA receive flag is set.
Each bit in this field represents a unique low order 6-bit value of the
incoming frame’sDstAddr.
The Hashbits pointer points to the lowest byte of the filter specification, i.e.
DstAddr range xxxxx0h to xxxxx7h. Odd addresses with Bit 0 set to 1 are
interpreted as multicast addresses.
Note: The above flags can be specified simultaneously using addition or a bitwise OR.

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int TransmitPkt(EMACFRAME *databuff);
This function is called to transmit a frame that is filled and placed at the pointer
given by databuff. This function is called by the user program to initiate the
transmit frame operation. When a call to this function is made, a user-specified
txnotification interrupt callback is invoked to signal the completion of the frame
transmission. See the Init8900( ) function for more information.
Each subsequent frame from a chain of frames, if implemented as an outbound
queue,canbetransmittedfromwithinthetxnotify function by calling this
function from within a txnotify callback until the queue is empty. You must
re-initiate the transmit interrupt operation if your txnotify interrupt callback
function returns without invoking the TransmitPkt function, which may occur at
the end of transmitting an outbound queue.
int ReceivePkt(EMACFRAME *databuff);
This function retrieves a received frame into the user buffer that databuff points
to. You must ensure that the buffer at databuff contains space for a full-length
frame, which can be a maximum of 1,526 bytes. Normally, this function is used
from within the rxnotify interrupt callback, which is invoked by the driver when
there is a frame available that has passed the current Rx filter criteria.
uint GetCRCErrCount(void);
This function returns the accumulated count of CRC errors on received frames.
This call automatically resets the count to zero.
uint GetRuntErrCount(void);
This function returns the accumulated count of received frames when they are
less than the 64-byte minimum. This call automatically resets the minimum
length error count to zero.
uint GetExcessLengthErrCount(void);
This function returns the accumulated count of received frames that exceeded
the 1,518-byte maximum, including the 14-byte header and four CRC bytes.
This call automatically resets the excess length error count to zero.

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uint GetRxMissCount(void);
This function returns the accumulated count of frames that were missed.
Frames can be missed if there is a shortage of on-chip buffer space when the
frames are not picked up in time to make room for new frames arriving on the
wire. This call automatically resets the Rx missed error count to zero.
uint GetTxColCount(void);
This function returns the accumulated count of transmit collisions when
transmitting frames. This call automatically resets the collision count to zero.
Transmit and Receive Buffer Structure
The driver functions manage the send and receive operations that pointers use
to gain access to buffers provided by the user. These pointers are passed as
arguments/return values in function calls by the user program. The driver does
not assume any queuing or buffer chaining.
User programs, higher level drivers or protocol stacks should manage buffers (if
required) by deriving other forms of buffer definitions suitable for the application.
The driver internally uses the following internal structure:
typedef struct Frm {
usint Flags;
usint Length;
usint DstAddr[3];
usint SrcAddr[3];
usint FrmType; //can be type or length
usint Payload[800]; //max size is 1500 bytes (< 800 words)
} EMACFRAME;
“usint”is defined as unsigned 16 bit integer.
Flags
Flags is NULL or set to one of the valid TxCMD bit value combinations on a
transmit operation request by the user program. In a receive operation, Flags
contains a receive event report provided by the hardware. The flag bits indicate
an error-free receive or CRC, Runt, and excess length errors. See the
ethdr183.h header file for a description of the flag bits.

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Length
For a transmit operation, you must fill the Length of the frame, including DstAddr
and the last byte of data. For a received frame, the Length field contains the
number of bytes received, including DstAddr and four CRC bytes at the end of
frame. You must appropriately adjust the byte count.
DstAddr
For a transmit operation, DstAddr must contain the 48-bit destination EMAC
address that is sent over the wire. DstAddr[0] is the lowest 16 bits of the 48-bit
address. LSB (0) is sent out first. The D0 bit of DstAddr[0] identifies individual/
group addressing, per the 802.x standards.
In a receive operation, this field contains the destination address of the packet
and examining Flags indicates the Rx Filter criteria by which this packet has
been accepted by the MAC.
SrcAddr
Fora transmit operation, the three-word (48-bit) SrcAddr field normally contains
the individual IEEE unique address assigned to the MAC at the time of
initialization or a protocol-dependent address assignment. See the Init8900()
function for more information.
FrmType
FrmType is either a length or type field, as determined by the protocol in
transmit and receive operations.
Payload
This field is the payload part of the frame that carries packet’s data content. The
“data”field may contain other types of packet envelopes with their own headers,
but it isconsidered data by the PHY layer that the driver operates. The data field
should not be more than 1,500 bytes for a transmit or receive operation.

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Figure 1. Z183 EMAC Board Schematic
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VCCVCC
VCC
VCC
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RAMRD
SD0
A7 A1
A11
A13
A4
A15
VCC D2
A18
10BT_RDP
D6 D5
A15 SD8
10BT_RDP
A19
A5 GND
A18 SD14
SD9
A17
10BT_TDP
A0
A5
10BT_TDP
SD11
A19
A3
A13
IORD
SD2
M1 GND
D1
SD6
GND
PHI
A14
A8 VCC
A7
RAMWR
D7
A10
CE_OUT
IOWR
A12
A19
SD1
A12
10BT_TDN
GND
A4
IOWR
D3
A14
10BT_RDN
D3
A6 SD3 A8
D5
RAMWR
10BT_TDN
A13
-A0
PHI A6
AM2
A3
A0
GND
D1 A16
A9
A1
A2
GND
D4
A17
SD10
10BT_RDN
SD4
RESET_HIGH
D0
A10
IORD
A14
A9
D0 RESET D4
A15
INT1
SD12 SD5 SD13
D6 D7
SD7 SD15
A0
GND
INT2 AM0
A17
RAMRD
AM1
A18
INT0
D2
A16
GND
A2
GND
A11
ROMWR ROMRD NMI
RESET
Y1
20Mhz
C7
0.1
611 710 89
D1 RED
21 R5
680
JP1 3X3 MATRIX/2 12 34 56 JP2 3X3 MATRIX/2 12 34 56
R8 680
D3 AMBER
21
D2GREEN
21
CON1 RJ45 1 2 3 4 5 6 7 8
C2 0.1
C1 0.1
C8
100uF/10
C9
0.1uF
C10
0.1uF
C11
0.1uF
C12
0.1uF
R6
4.99K
116 215 314 413
C3 0.1
512
(1-3) (16-14) 1:1
(6-8) (11-9)1:1.414
U4
ST7011 (Pulse/Valor)
1 2 3 4 5 6 7 8 9
10 11 12 13 14 15 16
1 2 3 4 5 6 7 89
10 11 12 13 14 15 16
C4 0.1
U5 22V10
1 2 3 4 5 6 7 8 9
10 11 13
23 22 21 20 19 18 17 16 15 14
I1/CLK I2 I3 I4 I5 I6 I7 I8 I9
I10 I11 I12
O1 O2 O3 O4 O5 O6 O7 O8 O9
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U1 74HCT245
2 3 4 5 6 7 8 9
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B1 B2 B3 B4 B5 B6 B7 B8
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60 59 37 38 39 40 41 42 43 44 45 46 47 48 50 51 52 53 54 58
65 66 67 68 71 72 73 74 27 26 25 24 21 20 19 18
75 63 29 28 34 49 61 62 33 64 36 32 31 30 15 13 11 16 14 12
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87 88 83 84 81 82 79 80 99 78
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93 9 22 56 69 90 85 95 1 86 89 94 96 8 10 23 55 57 70
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SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 SD8 SD9
SD10 SD11 SD12 SD13 SD14 SD15
RESET AEN MEMR
MEMW MEMCS16 REFRESH IOR IOW IOCS16 IOCHRDY SBHE INTRQ0 INTRQ1 INTRQ2 DMARQ0 DMARQ1 DMARQ2 DMACK0 DMACK1 DMACK2 CHIPSEL
TXD+
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D0+
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BSTATUS
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DVDD0 DVDD1 DVDD2 DVDD3
AVDD0 AVDD1 AVDD2
AVSS0 AVSS1 AVSS2 AVSS3 AVSS4
DVSS0 DVSS1 DVSS2 DVSS3 DVSS4 DVSS5
EESK EECS EEDI EEDO ELCS
CSOUT XTAL1 XTAL2
RXD-
RXD+
INTRQ3
JP3 INT_SELECT 12 34 56
J1 EMULATOR
1 3 5 7 9
11 13 15 17 19
2 4 6 8 10 12 14 16 18 20 22 24 26
21 23 25 27 29 31 33
28 30 32 34 36 38 40 42 44 46 48
35 37 39 41 43 45 47 49 50
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ANY ONE INT x TO BE CON NECTED TO
DAUGH TE R BOARD HEADE R ( DBH). OTHER P INS OF DB H NOT USED HERE.
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A11
A13
A4
A15
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A18
10BT_RDP
D6 D5
A15 SD8
10BT_RDP
A19
A5 GND
A18 SD14
SD9
A17
10BT_TDP
A0
A5
10BT_TDP
SD11
A19
A3
A13
IORD
SD2
M1 GND
D1
SD6
GND
PHI
A14
A8 VCC
A7
RAMWR
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CE_OUT
IOWR
A12
A19
SD1
A12
10BT_TDN
GND
A4
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D3
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D3
A6 SD3 A8
D5
RAMWR
10BT_TDN
A13
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A3
A0
GND
D1 A16
A9
A1
A2
GND
D4
A17
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A10
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A15
INT1
SD12 SD5 SD13
D6 D7
SD7 SD15
A0
GND
INT2 AM0
A17
RAMRD
AM1
A18
INT0
D2
A16
GND
A2
GND
A11
ROMWR ROMRD NMI
RESET
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VCCVCC
VCC
VCC
VCC
VCC
VCC
RAMRD
SD0
A7 A1
A11
A13
A4
A15
VCC D2
A18
10BT_RDP
D6 D5
A15 SD8
10BT_RDP
A19
A5 GND
A18 SD14
SD9
A17
10BT_TDP
A0
A5
10BT_TDP
SD11
A19
A3
A13
IORD
SD2
M1 GND
D1
SD6
GND
PHI
A14
A8 VCC
A7
RAMWR
D7
A10
CE_OUT
IOWR
A12
A19
SD1
A12
10BT_TDN
GND
A4
IOWR
D3
A14
10BT_RDN
D3
A6 SD3 A8
D5
RAMWR
10BT_TDN
A13
-A0
PHI A6
AM2
A3
A0
GND
D1 A16
A9
A1
A2
GND
D4
A17
SD10
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SD4
RESET_HIGH
D0
A10
IORD
A14
A9
D0 RESET D4
A15
INT1
SD12 SD5 SD13
D6 D7
SD7 SD15
A0
GND
INT2 AM0
A17
RAMRD
AM1
A18
INT0
D2
A16
GND
A2
GND
A11
ROMWR ROMRD NMI
RESET
Y1
20Mhz
C7
0.1
611 710 89
D1 RED
21 R5
680
JP1 3X3 MATRIX/2 12 34 56 JP2 3X3 MATRIX/2 12 34 56
R8 680
D3 AMBER
21
D2GREEN
21
CON1 RJ45 1 2 3 4 5 6 7 8
C2 0.1
C1 0.1
Y1
20Mhz
C7
0.1
611 710 89
D1 RED
21 R5
680
JP1 3X3 MATRIX/2 12 34 56 JP2 3X3 MATRIX/2 12 34 56
R8 680
D3 AMBER
21
D2GREEN
21
CON1 RJ45 1 2 3 4 5 6 7 8
C2 0.1
C1 0.1
C8
100uF/10
C9
0.1uF
C10
0.1uF
C11
0.1uF
C12
0.1uF
R6
4.99K
116 215 314 413
C3 0.1
512
(1-3) (16-14) 1:1
(6-8) (11-9)1:1.414
U4
ST7011 (Pulse/Valor)
1 2 3 4 5 6 7 8 9
10 11 12 13 14 15 16
1 2 3 4 5 6 7 89
10 11 12 13 14 15 16
C4 0.1
U5 22V10
1 2 3 4 5 6 7
C8
100uF/10
C9
0.1uF
C10
0.1uF
C11
0.1uF
C12
0.1uF
R6
4.99K
116 215 314 413
C3 0.1
512
(1-3) (16-14) 1:1
(6-8) (11-9)1:1.414
U4
ST7011 (Pulse/Valor)
1 2 3 4 5 6 7 8 9
10 11 12 13 14 15 16
1 2 3 4 5 6 7 89
10 11 12 13 14 15 16
C4 0.1
U5 22V10
1 2 3 4 5 6 7 8 9
10 11 13
23 22 21 20 19 18 17 16 15 14
I1/CLK I2 I3 I4 I5 I6 I7 I8 I9
I10 I11 I12
O1 O2 O3 O4 O5 O6 O7 O8 O9
O10
U1 74HCT245
2 3 4 5 6 7 8 9
19
1
18 17 16 15 14 13 12 11
A1 A2 A3 A4 A5 A6 A7 A8 G
DIR
B1 B2 B3 B4 B5 B6 B7 B8
C6 0.1
C5
0.1
R7
680
U2
CS8900A-CQ
60 59 37 38 39 40 41 42 43 44 45 46 47 48 50 51 52 53 54 58
65 66 67 68 71
8 9
10 11 13
23 22 21 20 19 18 17 16 15 14
I1/CLK I2 I3 I4 I5 I6 I7 I8 I9
I10 I11 I12
O1 O2 O3 O4 O5 O6 O7 O8 O9
O10
U1 74HCT245
2 3 4 5 6 7 8 9
19
1
18 17 16 15 14 13 12 11
A1 A2 A3 A4 A5 A6 A7 A8 G
DIR
B1 B2 B3 B4 B5 B6 B7 B8
C6 0.1
C5
0.1
R7
680
U2
CS8900A-CQ
60 59 37 38 39 40 41 42 43 44 45 46 47 48 50 51 52 53 54 58
65 66 67 68 71 72 73 74 27 26 25 24 21 20 19 18
75 63 29 28 34 49 61 62 33 64 36 32 31 30 15 13 11 16 14 12
7
87 88 83 84 81 82 79 80 99 78
100
93 9 22 56 69 90 85 95 1 86 89 94 96 8 10 23 55 57 70
4 3 6 5 2
17 97 98
92 91
35
SA19 SA18 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17
SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 SD8 SD9
SD10 SD11 SD12 SD13 SD14 SD15
RESET AEN MEMR
MEMW MEMCS16 REFRESH IOR IOW IOCS16 IOCHRDY SBHE
72 73 74 27 26 25 24 21 20 19 18
75 63 29 28 34 49 61 62 33 64 36 32 31 30 15 13 11 16 14 12
7
87 88 83 84 81 82 79 80 99 78
100
93 9 22 56 69 90 85 95 1 86 89 94 96 8 10 23 55 57 70
4 3 6 5 2
17 97 98
92 91
35
SA19 SA18 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17
SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 SD8 SD9
SD10 SD11 SD12 SD13 SD14 SD15
RESET AEN MEMR
MEMW MEMCS16 REFRESH IOR IOW IOCS16 IOCHRDY SBHE INTRQ0 INTRQ1 INTRQ2 DMARQ0 DMARQ1 DMARQ2 DMACK0 DMACK1 DMACK2 CHIPSEL
TXD+
TXD-
D0+
D0-
CL+
CL- DI+
DI-
LINKLED
BSTATUS
LANLED
RES
DVDD0 DVDD1 DVDD2 DVDD3
AVDD0 AVDD1 AVDD2
AVSS0 AVSS1 AVSS2 AVSS3 AVSS4
DVSS0 DVSS1 DVSS2 DVSS3 DVSS4 DVSS5
EESK EECS EEDI EEDO ELCS
CSOUT XTAL1 XTAL2
RXD-
RXD+
INTRQ3
JP3 INT_SELECT 12 34 56
J1 EMULATOR
1 3 5 7 9
11 13 15 17 19
2 4 6 8 10 12 14 16 18 20 22 24 26
21 23 25 27 29 31 33
28 30 32 34 36 38 40 42
INTRQ0 INTRQ1 INTRQ2 DMARQ0 DMARQ1 DMARQ2 DMACK0
DMACK1 DMACK2 CHIPSEL
TXD+
TXD-
D0+
D0-
CL+
CL- DI+
DI-
LINKLED
BSTATUS
LANLED
RES
DVDD0 DVDD1 DVDD2 DVDD3
AVDD0 AVDD1 AVDD2
AVSS0 AVSS1 AVSS2 AVSS3 AVSS4
DVSS0 DVSS1 DVSS2 DVSS3 DVSS4 DVSS5
EESK EECS EEDI EEDO ELCS
CSOUT XTAL1 XTAL2
RXD-
RXD+
INTRQ3
JP3 INT_SELECT 12 34 56
J1 EMULATOR
1 3 5 7 9
11 13 15 17 19
2 4 6 8 10 12 14 16 18 20 22 24 26
21 23 25 27 29 31 33
28 30 32 34 36 38 40 42 44 46 48
35 37 39 41 43 45 47 49 50
o o o o o o o o o o
o o o o o o o o o o o o o
o o o o o o o
o o o o o o o o o o o
o o o o o o o oo
U3 74HCT245
2 3 4 5 6 7 8 9
19
1
18 17 16 15 14 13 12 11
A1 A2 A3 A4
A5 A6 A7 A8 G DIR
B1 B2 B3 B4 B5 B6 B7 B8
R4
23
R3
23
R2
100
44 46 48
35 37 39 41 43 45 47 49 50
o o o o o o o o o o
o o o o o o o o o o o o o
o o o o o o o
o o o o o o o o o o o
o o o o o o o oo
U3 74HCT245
2 3 4 5 6 7 8 9
19
1
18 17 16 15 14 13 12 11
A1 A2 A3 A4
A5 A6 A7 A8 G DIR
B1 B2 B3 B4 B5 B6 B7 B8
R4
23
R3
23
R2
100
ANY ONE INT x TO BE CON NECTED TO
DAUGH TE R BOARD HEADE R ( DBH). OTHER P INS OF DB H NOT USED HERE.