Acqiris SA248P User manual

AcqirisSA248P
AcquisitionCard
1channel,14-bit,8GS/s,
DCupto2.5GHzbandwidth
User'sManual

2 Acqiris SA248P User's Manual
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© Acqiris, 2019 - 2020
No part of this manual may be reproduced in any form or by any means (including electronic storage
and retrieval or translation into a foreign language) without prior agreement and written consent from
Acqiris SA as governed by international copyright laws.
Version
June 2021
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SA248P Acquisition Card User's Manual
Acqiris SA248P User's Manual 3
SA248PAcquisitionCardUser'sManual
This help document is intended to provide in-depth information and reference material specific to
your ADC card.
For information about installation and about getting started with your ADC card, please refer to the
Startup Guide which can be downloaded from https://extranet.acqiris.com/ or which is installed with
your software.
Content
SA248P Acquisition Card User's Manual 3
Content 3
Introduction 5
New generation of Signal Acquisition Cards 5
Product description 5
Product configurable options 7
Main Card Features 8
1.1 SA248P front panel features 9
1.2 Channel input specifications 10
1.3 Sampling and data acquisition 12
1.4 Calibration 13
1.5 Trigger 15
Signal Acquisition Modes and Real-Time Processing 17
2.1 Digitizer acquisition mode 18
2.2 Real-time averaging mode (AVG option) 22
2.3 Real-time peak-listing mode (PKL option) 29
Readout Modes 38
3.1 Standard readout modes 38
3.2 Simultaneous acquisition and readout (CST option) 39
3.3 Averager with simultaneous acquisition and readout (AVG & CST) 50
Other Signal Processing Features 53
4.1 Baseline stabilization and digital offset 54
4.2 Sampling rate reduction (binary decimation) 57
4.3 Data inversion 58
4.4 Equalization 59
4.5 Thresholding (Zero-Suppress - ZS1 option) 62
Control and Synchronization 73
5.1 External reference 74

Content
4 Acqiris SA248P User's Manual
5.2 Trigger modes and time-stamps 74
5.3 Trigger output 79
5.4 Multi-purpose inputs and outputs 81
Programming Information 83
6.1 Overview of the AqMD3 Driver 83
6.2 Programming with the IVI-C Driver in various development environments 84
6.3 Migrating from MD2 2.x to MD3 3.x 86
6.4 Initial configuration 87
6.5 Apply setup 88
How To ... ? 89
7.1 How to discover the PXI Instrument? 90
7.2 How to calibrate the card? 91
7.3 How to access repeated capabilities? 93
7.4 How to generate a software trigger? 94
7.5 How to enable or bypass the bandwidth limiter? 95
7.6 How to set the external trigger? 96
7.7 How to perform binary decimation? (depending on firmware) 97
Software utilities 98
8.1 ADC card Verification Utility (AqMD3Verify) 98
FAQ 100
9.1 Q. What is coherent sampling? 100
9.2 Q. How to manage the internal temperature? 100
9.3 Q. What happens if the host processor goes in hibernation mode? 101
General information 102
10.1 Safety notes 102
10.2 Cleaning precautions 104
10.3 Product markings 104
10.4 Electrical &environmental specifications 105
10.5 Related documentation 105

Introduction
Acqiris SA248P User's Manual 5
Introduction
New generation of Signal Acquisition Cards
The Acqiris SA2 is a high-performance 14-bit ADC card platform, performing signal acquisitions
from 1GS/s up to 10GS/s, with excellent signal fidelity across a wide bandwidth. This new card and
module generation with advanced real-time processing capabilities is designed for embedded OEM
applications in a variety of challenging measurements, imaging and processing systems.
Product description
The SA248P ADC card is the 8 GS/s and single channel version of the SA2 product family. This
unique DC-coupled 14-bit digitizer captures waveforms from DC up to 2.5 GHz.

Product description
6 Acqiris SA248P User's Manual
Featuring very long acquisition memory up to 8 GB, the SA248P includes a powerful Xilinx Kintex
UltraScale FPGA offering real-time signal processing capability such as waveform averaging or
peak listing. The PCIe Gen 3 interface enables high data transfer rate and streaming capabilities to
the host computer at up to 6.5 GB/s. This ADC card occupies a single PCIe slot, offering high
performance in a small footprint.
All the ADC cards and modules from the SA2 family implement a proprietary low noise front-end.
With undisputed spurious-free dynamic range (SFDR) and signal noise ratio (SNR) performances in
high frequencies, it is ideal for OEM applications requiring digitizer sampling at wide bandwidth and
very high dynamic range. Moreover, optimized response allows few hundred picoseconds pulse
analysis. Overall performance enables final products to measure deeper, faster and more precisely.
Figure 1.1 - SA248P block diagram

Product configurable options
Acqiris SA248P User's Manual 7
Most of the technical specifications concerning your particular ADC card are covered in this manual,
however for the complete specifications please refer to the SA248P datasheet.
Product configurableoptions
The SA248P comes with several options:
Additional memory:
4 GB (MEA option)
8 GB (MEB option)
ADC Card modes:
Digitizer mode (DGT)
Real-time averaging (AVG option)
Real-time peak listing (PKL option)
Optional features:
Simultaneous acquisition and readout - Streaming records (CST option)
Zero Supress - Thresholding (ZS1 option)
Custom firmware capability (CFW option)
Other internal references:
I/O ports for SA248P: 3 I/Os,1 trigger output (EXC)

Main Card Features
8 Acqiris SA248P User's Manual
Chapter 1
MainCardFeatures
1.1 SA248P front panel features 9
1.2 Channel input specifications 10
1.3 Sampling and data acquisition 12
1.4 Calibration 13
1.5 Trigger 15

1.1 SA248P front panel features
Acqiris SA248P User's Manual 9
1.1 SA248P front panel features
Front panel connectors
Connector Type Description
TRG IN MMCX
female External trigger input, 50 Ω DC terminated, ± 5 V range.
IN 1
SMA
female
Analog signal inputs, DC-coupled and 50 Ω terminated. The input full scale
ranges are selectable:
Voltage 1 V FSR
Recommended maximum operating voltage ±1.2 Vpk
TRGOUT1
MMCX
Product ordered with Single-ended trigger out option
Trigger Out signal (programmable).
50Ω source, LVCMOS 3.3V
CJT
Product ordered with Differential trigger out option
Differential Trigger Out signal (programmable).
Differential 100 Ω source, CML Level
I/O 1, 2, 3
MMCX
User configurable digital Input / Output signal.
DC coupling, LVCMOS 3.3 V.
Output: 50Ω source, Input: +5V max.
REF IN MMCX External reference clock input, AC coupled and 50 Ω terminated.
It can accept a 10MHz or a 100 MHz signal from -3 to +3 dBm.
Table 1.1 - List of SA248P front-panel IOs.
The ADC card can usually work with signal present at the external reference input (REF IN).
However, to ensure the best performance, or if the calibration is found to be unreliable, it is
recommended to remove such signals when working with internal clock.
1The trigger out connector depends on the product version.

1.2 Channel input specifications
10 Acqiris SA248P User's Manual
1.2 Channel input specifications
This section provides information and specifications regarding the input characteristics of the ADC
card.
The SA248P provides one 14-bit DC-coupled channel at the sampling rate of 8 GS/s.
Channel input
The SA248P has the following front end capabilities:
Coupling / Impedance Full Scale Ranges (FSR) Maximum operating voltage Input voltage offset
DC / 50 Ω 1 V ± 1.2 Vpk ± FSR/2
Table 1.2 - Channel input specifications.
It is also possible to optimize the calibration for a specified target voltage. For details, see
Calibration optimized for a target voltage (page 91).
Impedance & coupling
The input channel termination is 50Ω. The input coupling is DC.
Input protection
The input amplifiers are designed to accept signals within the absolute maximum operating voltages
shown in the table.
Bandwidth and rise time
The bandwidth specification indicates the frequency at which an input signal will be attenuated by
3dB (approximately 30% loss of amplitude).
The bandwidth of the SA248P is from DC to 2.5 GHz (typical).
The bandwidth also has an impact on the minimum rise and fall times that can be passed through
the front-end electronics. A pulse with a very sharp edge will be observed to have a minimum rise
time Tmin determined by the front-end electronics. In general a pulse with a given 10-90% rise time
T10-90real will be observed with a lower value given by:
T10-902=T10-90real2+Tmin2
where Tmin(ns) ≈ 0.35/BW(GHz).