Acqiris U5309A User manual

Acqiris U5309A
Acquisition Card
2 or 8 channels, 8-bit, 500 MS/s to 2 GS/s,
DC to 500 GHz bandwidth, with real-time processing
User's Manual

Copyright Statement
© Acqiris, 2017 - 2018
No part of this manual may be reproduced in any form or by any means (including electronic storage and
retrieval or translation into a foreign language) without prior agreement and written consent from Acqiris SA
as governed by international copyright laws.
Version
U5300-90016
July 2018
Contact us
Acqiris Americas
[e-mail]
Acqiris Europe
[e-mail]
Acqiris Asia-Pacific
[e-mail]
Acqiris Japan
[e-mail]
Worldwide contact for support
[e-mail]
Acqiris SA
Chemin des Aulx, 12
1228 Plan-Les-Ouates
Switzerland
www.acqiris.com
2 U5309A User's Manual

Welcome
U5309A User's Manual 3
Welcome
This help document is intended to provide in-depth information and reference material specific to your ADC
Card product. For information on getting started with your ADC Card, please refer to the Startup Guide which
can be downloaded from www.acqiris.com or which is installed with your software.
General information
SafetyNotes(page 77)
Cleaning Precautions(page 79)
Product Markings (page 79)
Content
Introduction 4
U5309A Front Panel Features 6
Channel Input Specifications 7
Data Acquisition 9
Trigger 13
External Clock and Reference 17
Calibration 19
Trigger Output 21
Multi-Purpose Inputs and Outputs 23
Signal Processing Options 25
Programming Information 53

Introduction
Introduction
Depending on the selected option, the U5309A signal acquisition card offers one, two, four or eight 8-bits
channels, with an analog bandwidth of DC to 500 MHz. Featuring a large DDR3 memory for long acquisition
time, the U5309A also includes a Xilinx Virtex-6 FPGA allowing implementation of custom real-time
processing algorithms.
Benefiting from the very high data transfer rates of the PCIe 2.0 eight-lane interface, and occupying a single
slot in a host PC, the U5309A offers high performance in a small footprint, making it an ideal platform for
many commercial, industrial and aerospace & defense embedded systems.
Typical Applications
Pulsed Radar
Analytical time-of-flight
LASER ranging / Emission monitoring
Ultrasonic imaging
Key Features
Sampling rate up to 2 GS/s
2 channels or 8 channels with 8-bit resolution and DC to 500 MHz analog bandwidth
Up to 2 GB of DDR3 on-board memory
Controlled by a Xilinx Virtex-6 FPGA with support for custom real-time processing
4 U5309A User's Manual

Key Features
U5309A User's Manual 5
U5309A -CH2 block diagram
U5309A -CH8 block diagram
Most of the technical specifications concerning your particular ADC card are covered in this manual,
however for the complete specifications please refer to the product's datasheet from www.acqiris.com.

U5309A Front Panel Features
U5309A Front Panel Features
Front Panel Connectors
Connector Type Description
TRGIN MMCX female External trigger signal input, 50Ω
terminated.
Level range is ±5V.
IN 1 to IN 2 1
1 to 8 2
SSMC male Analog signal input.
DC-coupled and 50Ω terminated.
Maximum input voltage ±3.4 V DC (or ±5 V
DC)3.
JTAG Micro USB Providesconnection to the DPU for use with
the U5340A FPGA Development Kit.
TRG OUT MMCX female Trigger Out signal.
I/O 1, 2, 3 MMCX female User configurable Input / Output signal.
3.3 V CMOS and TTLcompatible.
CLK IN MMCX female External clock input.
AC coupled and 50 Ω terminated,
signal level: +5 to +15 dBm.
Please refer to datasheet for details.
REF IN MMCX female External reference clockinput,
AC coupled and 50 Ω terminated.
It can accept a 100MHzsignalfrom -3 to +3
dBm.
Note: It is recommended to first connect the SSMC end of the input cable and tighten using
thetorque wrench (U1092A-WCK) before connecting the SMA end, this minimizes strain on the
connector. A 1 m SSMC to SMA cable is available as an accessory (U1092A-CB3) A 1 m SSMC
to BNC cable is also available (U5300A-100).
1For the 2 channels version (U5309A-CH2 option)
2For the 8 channels version (U5309A-CH8 option)
3For cards delivered after April 2015. The driver automatically adjusts offset accordingly.
6 U5309A User's Manual

Channel Input Specifications
U5309A User's Manual 7
Channel Input Specifications
This section provides information and specifications regarding the input characteristics of the ADC card.
Channel Input
The U5309A offer several options for the number of channel input.
Model Input channel(s)
U5309A-CH1 1 channel available (IN 1)
U5309A-CH2 2 channelsavailable (IN 1 and IN 2)
U5309A-CH4 4 channelsavailable simultaneously
(1 or 2, 3 or 4, 5 or 6, and 7 or 8)
U5309A-CH8 8 channelsavailable simultaneously(from 1 to 8)
The U5309A has the following front end capabilities:
Model Impedance /
Coupling
Bandwidth (nom-
inal) Full Scale Ranges (FSR)
Absolute Max-
imum DC Voltage Offset Adjustment
Range
U5309A-F03**
DC 50 Ω
300 MHz
250 mV, 500 mV, 1 V,
2.5 V, and 5 V
±3.4 V
(or ±5 V DC)*
±0.6 FSR
U5309A-F05** 500 MHz
U5309A-F03-
LVR***
300 MHz
50 mV to 1 V ±3.4 V
(or ±5 V DC)*
±0.5 FSR
U5309A-F05-
LVR***
500 MHz
* For modules delivered after April 2015. The driver automatically adjusts offset accordingly.
** Standard Voltage Range
*** LVR: Low Voltage Range - Devices delivered after April 2015. For more information, please contact
[e-mail]
Impedance & Coupling
The input channel termination is 50Ω. The input coupling is DC.
Input Protection
The input amplifiers are designed to accept signals below the absolute maximum level shown in the table.
Mezzanine Front-end
The front-end electronics are all mounted on a removable mezzanine card. In the event of accidental damage
or as components fatigue over time (e.g. relays in high duty cycle automated testing applications), the

Bandwidth and Rise Time
mezzanine card allows for fast and efficient replacement.
Bandwidth and Rise Time
The bandwidth specification indicates the frequency at which an input signal will be attenuated by 3dB
(approximately 30% loss of amplitude). The bandwidth also has an impact on the minimum rise and fall times
that can be passed through the front-end electronics. A pulse with a very sharp edge will be observed to have
a minimum rise timeTmin determined by the front-end electronics. In general a pulse with a given 10-90% rise
time T10-90real will be observed with a lower value given by:
T10-902=T10-90real2+Tmin2
where Tmin(ns)≈0.35/BW(GHz)
Vertical Resolution
The U5309A ADC Card uses a 8-bit ADC giving 256 levels at each input full scale range.
8 U5309A User's Manual

Data Acquisition
U5309A User's Manual 9
Data Acquisition
The sections below summarize the data acquisition characteristics.
Sampling Rate
The U5309A Acquisition card contains an analog-to-digital conversion (ADC) system that can sample
waveforms, in a real time sampling mode, at rates shown in the table below.
Model Channel Con-
figuration Option Max. Samp- ling Rate
Available
Channels Resolution Acquisition Modes
U5309A CH1/CH2 -SR0 500 MS/s CH1: 1
CH2: 2
8 bits Single or multi-
record
(up to 131'072
records)
-SR1 1 GS/s
-SR2 2 GS/s
CH4/CH8 -SR1 1 GS /s CH4: 4
CH8: 8
The External Clock can be used to vary the sampling rate of the ADC card, see External
Clockand Reference (page 17).
Acquisition Memory
Data from the ADC is stored in on-board acquisition memory. The amount of memory in use for acquisition
can be programmed and is selectable from 1 point to the full amount of acquisition memory available.
Model Option Acquisition memory Max samples/channel
U5309A -CH2 -M01 128 MB 64 MS/ch
-M05 512 MB 256 MS/ch
-M20 2 GB 1 GS/ch
U5309A -CH8 -M01 128 MB 16 MS/ch
-M05 512 MB 64 MS/ch
-M20 2 GB 256 MS/ch
U5309A -CH1 -M01 64 MB 64 MS/ch
-M05 256 MB 256 MS/ch
-M20 1 GB 1 GS/ch
U5309A -CH4 -M01 64 MB 16 MS/ch
-M05 256 MB 64 MS/ch
-M20 1 GB 256 MS/ch

Single and Multi-Record Acquisition Modes
For technical reasons, a certain acquisition memory “overhead” is required for each waveform, reducing the
available memory by a small amount.
The effective maximum memory available for acquisition depends on several
parameters, such as the acquisition mode (single / multi-record), sampling rate, record
size, number of records, trigger delay, etc.... This maximum is determined by the driver
for each specific configuration. The AQMD3_ATTR_MAX_SAMPLES_PER_
CHANNEL attribute in IVI-C or IAqMD3Acquisition.MaxSamplesPerChannel
property in IVI.NET can be used to retrieve the maximum number of samples per
channel that can be acquired for a specific configuration. When using the Soft Front
Panel, the Max Samples per channel parameter is given on the Acquisition panel.
Single and Multi-Record Acquisition Modes
ADC cards acquire waveforms in association with triggers. Each waveform is made of a series of measured
voltage values (sample points) that are made by the ADC at a uniform clock rate.
To maximize sampling rates and utilize memory as efficiently as possible the ADC cards include both single
and multi-record modes. For both of these modes the data of all of the active channels is acquired
synchronously; all of the ADC's are acquiring data at the same time, to within a small fraction of the
maximum sampling rate.
The single acquisition mode is the normal operation of most ADC card products. In this mode an
acquisition consists of a waveform recorded with a single trigger. The user selects the sampling rate and
acquisition memory size and sets the number of records to 1 (default value). For details about the trigger
sources, see .
The ADC cards also feature a multi-record acquisition mode. This mode allows the capture and storage of
consecutive “single” waveforms. Multi-record acquisition mode is useful as it can optimize the ADC card's
sampling rate and memory requirements for applications where only portions of the signal being analyzed are
important. The mode is extremely useful in almost all impulse-response type applications (RADAR, SONAR,
LIDAR, Time-of-Flight, Ultrasonics, Medical and Biomedical Research, etc.).
In multi-record acquisition mode the acquisition memory is divided into a pre-selected number of records.
Waveforms are stored in successive memory records as they arrive. Each waveform requires its own
individual trigger.
10 U5309A User's Manual

Time stamps
U5309A User's Manual 11
Multi-record acquisition mode enables successive events, occurring within a very short time, to be captured
and stored without loss. A very fast trigger rearm time is a crucial feature for multi-record acquisitions.
Thanks to fast trigger rearm U5309A achieves very low “dead time” between the records of a multi-record
acquisition. The “dead time” is the period after the end of an event when the card cannot digitize data for a
new trigger event.
Program examples for Single record or multi-records acquisitions are available:
For IVI-C C:\Program FilesC1\IVI Foundation\IVI\Drivers\AqMD3\Examples\IVI-C
For IVI.NET C:\Program Files1\IVI Foundation\IVI\Drivers\AqMD3\Examples\IVI.NET
Time stamps
The ADC card also measures and stores the arrival time of each trigger using the information from the on
board Trigger Time Interpolator (TTI). See Trigger Time Interpolator and Time stamps(page 14) for details.
Timebase Range
The timebase range defines the time period over which data is being acquired. For example, the U5309A-
M01-SR1 has a standard acquisition memory of 64 MS/ch and maximum sampling rate of 1 GS/s. Therefore,
at the maximum sampling rate, the ADC card can record a signal over a time window of up to 67 ms (approx
67 M points * 1 ns/point).
Binary Decimation
A programmable binary decimation may be used to lower the sample rate by a ratio of 2n,
where nis defined in the range of 1 to 10, depending on the model and configuration (See Table below).
To enable decimation, user should set the sampling rate to required decimated sampling rate.
Model Sampling rate
option
Acquisition
mode
Maximum Decimation
Ratio
Lower supported
sampling rate
CH1/CH2 -SR0 Single record 281.9531 MS/s
Multi-Record 2362.5 MS/s
1Or the alternative drive letter where the Acqiris MD3 Software has been installed on your machine.

Maximum Acquisition Time
Model Sampling rate
option
Acquisition
mode
Maximum Decimation
Ratio
Lower supported
sampling rate
-SR1 Single record 291.9531 MS/s
Multi-Record 2462.5 MS/s
-SR2 Single record 210 1.9531 MS/s
Multi-Record 2562.5 MS/s
CH4/CH8 -SR1 - Not supported N/A
The accuracy of absolute trigger time is guaranteed (as specified in the datasheet)
down to sample rates 1/16 of the highest sample rate (1/32 of the highest sample rate
with interleaving).
Maximum Acquisition Time
There is a limit on the acquisition time / acquisition length in DGT mode depending on the record size, post
trigger delay and binary decimation factor. Above this «limit », the driver returns a PostTrigger overflow.
This limitation is given by the table below, where acquisition time = record size x sampling interval + post-
trigger delay.
Sample rate Max acquisition time (in
seconds)
1.00E+09 68.72
12 U5309A User's Manual

Trigger
U5309A User's Manual 13
Trigger
The trigger settings applied to the ADC card are used to determine at which time the device will stop
acquiring data. The various trigger settings are outlined below.
Trigger Source
The trigger source can be a signal applied to either an Input Channel (digital internal triggering) or on the TRG
IN front panel input connector (external triggering).
The trigger can also be managed through software (Please see Please refer to AqMD3.chm (IVI-C) or
Acqiris.AqMD3.Fx40.chm (IVI.NET) for details).
Trigger Impedance & Coupling
The U5309A has a fixed 50 Ω termination impedance with DC coupling.
Trigger Input Bandwidths
The bandwidth depends on the trigger source.
Channel trigger
The -3 dB bandwidth of the comparator of the channel triggers is the same as the bandwidth of the channel
input. This is option dependent. Please refer to the table in the Channel Input (page 7) section. For input signals
with high frequency components, this means that the signal acquired and displayed doesn’t correspond
exactly to the signal seen from the trigger comparator input. Since, the signal seen on the trigger comparator
can be attenuated, this should be taken into account when selecting channel triggers and specifying the
trigger level.
External trigger
The external trigger input has a bandwidth from DC to 2 GHz.
Trigger Level
The trigger level specifies the voltage at which the selected trigger source will produce a valid trigger. All
trigger circuits have sensitivity levels that must be exceeded in order for reliable triggering to occur.
The external trigger input has a hysteresis of 5% of FSR (Full Scale Range), and FSR is ±5 V, therefore the
ADC card will trigger on signals with a peak-to-peak amplitude > 0.5 V.
The internal channel trigger of the U5309A, is implemented digitally and as such, the level may be configured
via the driver, within the limits shown in the table below. "offset" and "range" refer to the channel's current
Vertical Offset and Vertical Range settings.
Slope Min Max
Positive = offset - range*127/256 + Hysteresis = offset + range*126/256
Negative = offset - range*127/256 = offset + range*126/256 - Hysteresis

Edge Trigger Slope
The hysteresis is configured automatically as a function of the vertical FSR, as follows:
Full Scale Range (Volts) Hysteresis (LSB) Hysteresis (Volts)
5 6 0.12
2.5 6 0.06
1 8 0.03
0.5 8 0.016
0.25 14 0.014
Edge Trigger Slope
The trigger slope defines which one of the two possible transitions will be used to initiate the trigger when it
passes through the specified trigger level. Positive slope indicates that the signal is transitioning from a lower
voltage to a higher voltage. Negative slope indicates the signal is transitioning from a higher voltage to a
lower voltage.
Trigger Time Interpolator and Time stamps
The ADC card also measures and stores the arrival time of each trigger using the information from the on
board Trigger Time Interpolator (TTI). This information is essential for determining the precise relation
between the trigger and the digitized samples of the signal. The TTI resolution determines the resolution of
the trigger time stamps.
Please refer to Trigger section of your product Data sheet for the relevant specifications.
The timestamps counter is started up at the first initialization of the card after a power
up of the system.
The timestamps counter is reset each time the card is re-initialized, with reset flag = 1.
The InitialXTimeSeconds and InitialXTimeFraction parameters returned by the
fetch and read functions are then relative to the last initialization with reset flag = 1 or
the first initialization.
The trigger time interpolator is only applicable to the external trigger input (TRG IN), it
does not operate on the channel trigger of the U5309A.
Trigger precision and resolution
The U5309A trigger time interpolator offers a resolution of 8 ps (nominal) and a precision of 15 ps RMS
(nominal) .
The channel trigger resolution and precision are both equal to 1 sample.
The accuracy of absolute trigger time is guaranteed (as specified in the datasheet)
down to sample rates 1/16 of the highest sample rate (1/32 of the highest sample rate
with interleaving).
14 U5309A User's Manual

Pre- and Post-Trigger Delay
U5309A User's Manual 15
If comparing the initial trigger time T0 measured using the same waveform either used
as channel input trigger or as an external trigger, the T0 position can be slightly different
(especially if the waveform used as trigger has a slow edge).
First, the analog bandwidth can be different for the channel trigger input and the
external trigger input, resulting in a different slope and so a different T0.
Secondly, compared with the channel trigger, the external trigger threshold is not
calibrated. The input channel trigger calibration allows a T0 adjustment both in
threshold and in timing, resulting in a more accurate T0. However, when using the
external trigger, the measured T0 is still precise and theT0 position difference stays
stable.
Using a signal with faster edge as external trigger can reduce this effect.
Pre- and Post-Trigger Delay
To increase trigger flexibility, a pre- or post-trigger delay can be applied to the trigger position.
The amount of pre-trigger delay can be adjusted between 0 and 100% of the acquisition time window (i.e.
sampling interval x number of samples), whereas the post-trigger delay can be adjusted within the time
interval:
from 0 to (232 – 1) * block_size (samples)
where block_size is 16 .
Pre- or post-trigger delays are just different aspects of the same trigger positioning parameter:

Pre- and Post-Trigger Delay
The condition of 100% pre-trigger indicates that all data points are acquired prior to the trigger, i.e. the trig-
ger point is at the end of the acquired waveform.
The condition of 0% pre-trigger (which is identical to a post-trigger of 0%) indicates that all data points are
acquired immediately after the trigger, i.e. the trigger point is at the beginning of the acquired waveform.
The condition of a non-zero post-trigger delay indicates that the data points are acquired after the trigger
occurs, at a time that corresponds to the post-trigger delay, i.e. the trigger point is before the acquired
waveform.
The ADC card hardware accepts pre- and post-trigger adjustments in increments of 16 samples. By definition
post-trigger settings are a positive number and pre-trigger settings are a negative number.
Thus it is only natural that the software drivers treat pre- and post-trigger delays as a single parameter in
seconds that can vary between:
– NbrSamples * SamplingInterval (100% pre-trigger)
and +maxPostTrigSamples * SamplingInterval (max post-trigger).
You can refer to section How to set the external trigger? (page 66) for additionnal infomation.
16 U5309A User's Manual

External Clock and Reference
U5309A User's Manual 17
External Clock and Reference
For applications for which the user wants to replace the internal clock of the acquisition card and drive the
ADC with an external source, either an external clock or an external reference signal can be used. The clock
or reference signal can be entered into the ADC card by the dedicated REF IN and CLK IN connectors.
External Clock (CLK IN)
The External Clock may be used to vary the sampling rate of the ADC card. If selected for the ADC card, it
must be continuously present to operate correctly. The input is AC coupled.
Parameter Value
CH2 CH8
FrequencyRange 1.8 GHzto 2.2 GHz 3.6 GHzto 4.4 GHz
Amplitude +5 to +15 dBm
Threshold 0 V
Note that the sample rate will depend on the model option, as shown in the table below:
Channel Con-
figuration Option Sample rate
CH2 -SR0 = External clock frequency / 4
-SR1 = External clock frequency / 2
-SR2 = External clock frequency
CH8 -SR0 N/A
-SR1 = External clock frequency / 4
-SR2 N/A
External Reference (REFIN)
For applications that require greater timing precision and long-term stability than is obtainable from the
internal clock, a 100 MHz Reference signal can be used.
The External Reference is nominally at 100 MHz. However, frequencies in a range will be accepted. If your
input is not at exactly the specified value, you must remember to compensate for the difference in your
application since the ADC card and the driver have no way to know about such deviations.
The input is 50 Ω terminated and AC coupled.
Parameter Value Tolerance
Nominal Frequency 100 MHz ±100 kHz

External Reference (REFIN)
Parameter Value Tolerance
Signal level -3 dBm to +3 dBm
Impedance 50 Ω
Coupling AC
If synchronization between several ADC cards is required, the reference signal should be applied to all of
them.
18 U5309A User's Manual

Calibration
U5309A User's Manual 19
Calibration
The U5309A is factory calibrated ans shipped with a calibration certificate.
The internal calibration refers to the adjustment of ADC card internal parameters, corresponding to user
selected parameters and required before starting acquisition.
Internal Calibration
The internal calibration (or self-calibration) measures and adjusts the internal timing, gain and offset
parameters between the ADCs and against a precise reference.
The ADC card includes a high precision voltage source and a 16-bit DAC, used to perform the input voltage
and offset calibration.
The supplied software drivers include self-calibration function which can be executed upon user request. The
ADC cards are never calibrated in an “automatic” way, (i.e. as a consequence of another operation). This
ensures programmers have full control of all calibration operations performed through software in order to
maintain proper event synchronization within automated test applications.
For accurate time and voltage measurements it is recommended to perform a
calibration once the module has attained a stable operating temperature (usually
reached after 20 minutes of ADC card operation after power on).
A full internal calibration of a ADC card can be time consuming because of the many possible configuration
states. Therefore, the self-calibration is performed only for the current configuration state, and is mandatory
before making any acquisition. Indeed the AqMD3 driver prevents an acquisition from being performed unless
a self-calibration has first been completed. Note that some configuration changes do not require a new self-
calibration. To avoid unnecessary self-calibrations, the IAqMD3Calibration.IsRequired IVI.NETproperty or
the AQMD3_ATTR_CALIBRATION_IS_REQUIRED IVI-C attribute should be queried.
ADC card can usually work with signals present at the channel input, trigger input.
However, to ensure the best performance, or if the calibration is found to be unreliable
(as shown by a calibration failure status), it is recommended to remove such signals.
Similarly, when working with internal clock, it is recommended to remove external
reference and external clock inputs during calibration to avoid parasitic effects.
Smart-calibration
The smart calibration implemented in MD3 drivers allows to save time by automatically saving and restoring
calibration information from any self-calibration performed since the beginning of the session. When the
acquisition parameters are changed, no re-calibration of the instrument is necessary if a self-calibration has
already been performed with the same acquisition conditions (i.e. the same set of parameters), unless the
clock mode parameters are changed.
Indeed, any change in the clock mode parameters (i.e. External clock frequency, Clock source or Reference
mode parameters), induces a restart of the clocks which requires a new self-calibration.
For details, see Parameter change requiring a new self calibration (page 59)

Factory Calibration
Factory Calibration
Factory calibration is the process of measuring the actual performance of an device-under-test (DUT) using
lab instruments that have significantly better performance than the DUT. Lab instrument performance must
be traceable to the International System (SI) Units via a national metrology institute (NIST, NPL, NRC, PTB,
CENAM, INMETRO, BIPM, etc.)
The measured performance is then compared to published datasheet specifications. For each factory
calibration, Acqiris tests the performance corresponding to all datasheet specifications, for every installed
option. If needed, the DUT is adjusted and re-qualified ; ensuring it is in line with full specifications.
Our ADC cards are calibrated at factory during the production phase. There is no need to systematically
calibrate each year.
First, the cards include a self-calibration function providing a good degree of confidence that your instrument
is operating within its specifications on a day-to-day basis, and triggering an error message if out of
calibration relative to the internal calibration signal.
Secondly, our cards are warranted to stay within specification over the standard 3-year warranty. They
usually stay within specification much longer and we rarely have to effectively recalibrate the cards.
Lastly, a onetime calibration can be ordered in case customer detects a deviation in the measure of its final
product that appears to be caused by the ADC card. The onetime calibration consists in processing the card
through production test to determine if it is still within specification:
If yes, the card is returned with the certificate of calibration which certifies it is within specification.
If not, the required calibration is performed, and another production test is done to provide the cer-
tificate of calibration.
If repair is required, and the card is out of warranty, a repair quote will be provided.
For more information, or to request for a calibration, please contact technical support [e-mail].
20 U5309A User's Manual