Acqiris U5310A User manual

Acqiris U5310A
Acquisition Card
2 channels, 10-bit, from 5 to 10 GS/s,
DC up to 2.5 GHz bandwidth, with real-time processing
User's Manual

2 U5310A User's Manual
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© Acqiris, 2017 - 2019
No part of this manual may be reproduced in any form or by any means (including electronic storage
and retrieval or translation into a foreign language) without prior agreement and written consent from
Acqiris SA as governed by international copyright laws.
Version
July 2019
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U5310A Acquisition Card User's Manual
U5310A User's Manual 3
U5310A Acquisition Card User's Manual
This help document is intended to provide in-depth information and reference material specific to your
ADC Card.
For information about installation and about getting started with your ADC Card, please refer to the
Startup Guide which can be downloaded from https://extranet.acqiris.com/ or which is installed with
your software.
Content
U5310A Acquisition Card User's Manual 3
Content 3
Introduction 5
Overview 5
Product description 5
Main ADC Card Features 7
1.1 U5310A front panel features 8
1.2 Channel Input Specifications 9
1.3 Sampling and Data Acquisition 11
1.4 Trigger 12
1.5 Calibration 14
Real-Time Processing Options 16
2.1 Easy firmware switch 16
2.2 Digitizer firmware (DGT option) 17
2.3 Real-time averaging (AVG option) 20
Readout modes 30
3.1 Standard readout modes 30
3.2 Continuous Simultaneous acquisition and readout, with trigger (CST option) 31
Other Signal Processing Features 39
4.1 Sampling rate reduction (binary decimation) 40
4.2 Equalization 41
Control and Synchronization 48
5.1 External clock and reference 49
5.2 Trigger modes and time-stamps 50
5.3 Trigger output 53
5.4 Multi-purpose inputs and outputs 56
Programming Information 58
6.1 Overview of the AqMD3 Driver 58

Content
4 U5310A User's Manual
6.2 Programming with the IVI-C Driver in various development environments 59
6.3 Migrating from MD2 2.x to MD3 3.x 61
6.4 Initial configuration 62
6.5 Apply setup 63
How To ... ? 64
7.1 How to discover the PXI Instrument? 65
7.2 How to calibrate the card? 66
7.3 How to configure and read data on two channels? 70
7.4 How to access repeated capabilities? 71
7.5 How to generate a software trigger? 72
7.6 How to perform time-interleaving acquisitions? 73
7.7 How to enable or bypass the bandwidth limiter? 74
7.8 How to set the external trigger? 75
7.9 How to perform binary decimation? (depending on firmware) 76
7.10 How to perform partial readout? 77
7.11 How to load a new firmware? 80
7.12 How to switch from normal mode acquisition (Multi-record) to averager mode? 81
Software utilities 82
8.1 ADC card Verification Utility (AqMD3Verify) 82
FAQ 84
9.1 Q. What is coherent sampling? 84
9.2 Q. How to manage the internal temperature? 84
9.3 Q. What are the differences between the various data streaming firmware options supported
by high-speed ADC cards ? 85
9.4 Q. What happens if the host processor goes in hibernation mode? 86
General information 87
10.1 Safety notes 87
10.2 Cleaning precautions 89
10.3 Product markings 89
10.4 Electrical &environmental specifications 90
10.5 Related documentation 90
10.6 Full product family 91

Introduction
U5310A User's Manual 5
Introduction
Overview
The U5310A is a true two channel PCIe, DC coupled 10-bit signal acquisition card providing sample
rates up to 10 GS/s with 2.5 GHz bandwidth.
The U5310A PCIe ADC card is particularly suited for embedded OEM applications requiring digitizer
sampling at wide bandwidth and moderate dynamic range. Overall performance enables customer's
final products to more precisely measure time of flight for a variety of end system applications.
Product description
The U5310A ADC card occupies a single full-length PCIe slot of the host PC. Featuring sample rates
of up to 5 GS/s per channel, up to 10 GS/s in interleaved mode (-INToption), along with an analog
bandwidth of up to 2.5 GHz and DDR3 acquisition memory options up to 4 GB, the U5310A includes a
Xilinx Virtex-6 FPGA for real-time processing.
The U5310A-CH1 version allows to acquire signal on a single channel at 5 GS/s.
The standard digitizer firmware included allows signal acquisition to the on-board memory and
subsequent transfer to the host PC via its PCI Express 2.0 eight lanes connection.
At the heart of the U5310A is a data processing unit (DPU) based on the powerful Xilinx Virtex-6
FPGA. This DPU is responsible for controlling the module functionality, data flow and real-time signal
processing. This powerful feature allows data reduction and storage to be carried out at the ADC card
level, minimizing transfer volumes and speeding-up analysis.

Product description
6 U5310A User's Manual
Figure 1.1 - U5310A, dual channel version block diagram.
Most of the technical specifications concerning your particular ADC card are covered in this manual,
however for the complete specifications please refer to the product's from www.acqiris.com.

Main ADC Card Features
U5310A User's Manual 7
Chapter 1
Main ADC Card Features
1.1 U5310A front panel features 8
1.2 Channel Input Specifications 9
1.3 Sampling and Data Acquisition 11
1.4 Trigger 12
1.5 Calibration 14

1.1 U5310A front panel features
8 U5310A User's Manual
1.1 U5310A front panel features
Front panel connectors
Please note that analog Input IN 1 and IN 2 have a maximum voltage limitation of ±1.5
Vmax while using the default 1V full scale range (±0.5 Vmax if using 0.25V FSR).
Connector Type Description
TRG IN MMCX
female External trigger input, 50 Ω DC terminated, ±5 V range.
IN 1, 2 SMA
female
Analog signal inputs, DC-coupled and 50 Ω terminated.
The input full scale ranges are selectable:
Range Maximum Input
0.25 V ±0.5 Vmax
1 V ±1.5 Vmax
JTAG Micro
USB Providesconnection to the DPU for specific reprogramming.
TRGOUT MMCX
female Trigger Out signal. User selectable from several functions.
I/O 1, 2, 3 MMCX
female
User configurable Input / Output signal. 3.3 V CMOS and
TTLcompatible.
CLK IN MMCX
female
External clock input. AC coupled and 50 Ω terminated, signal level: +5
to +15 dBm. (Please refer to U5310A datasheet for supported fre-
quency values).
REF IN MMCX
female
External reference clockinput, AC coupled and 50 Ω terminated. It can
accept a 100MHzsignal from -3 to +3 dBm.
Table 1.1 - List of U5310A front-panel IOs.
The ADC card can usually work with signals present at the external reference and clock inputs
(REF IN and CLK IN). However, to ensure the best performance, or if the calibration is found to be
unreliable, it is recommended to remove such signals when working with internal clock.

1.2 Channel Input Specifications
U5310A User's Manual 9
1.2 Channel Input Specifications
This section provides information and specifications regarding the input characteristics of the ADC
card.
Two channel versions exist for this 10-bit DC-coupled ADC card:
The U5310A-CH2 provides two 5 GS/s channels. The two channels may be combined to form
an interleaved channel at 10 GS/s (U5310A-INT option).
The U5310A-CH1 provides a single 5 GS/s channel1.
Channel Input
The U5310A has the following front end capabilities:
Coupling / Impedance Full Scale Ranges (FSR) Maximum operating voltage Input voltage offset
DC / 50 Ω
250 mV ± 0.5 V ± FSR
1 V ± 1.5 V ± FSR
Table 1.2 - Channel input specifications.
It is also possible to optimize the calibration for a specified target voltage. For details, see
Calibration optimized for a target voltage (page 66).
Impedance & Coupling
The input channel termination is 50Ω. The input coupling is DC.
Input Protection
The input amplifiers are designed to accept signals below the absolute maximum level shown in the
table.
Mezzanine Front-end
The front-end electronics are all mounted on a removable mezzanine card. In the event of accidental
damage or as components fatigue over time (e.g. relays in high duty cycle automated testing
applications), the mezzanine card allows for fast and efficient replacement.
1It is not possible with the -CH1 version to interleave channels and double the sampling rate. Only 5 GS/s is supported.

1.2 Channel Input Specifications
10 U5310A User's Manual
Bandwidth and Rise Time
The bandwidth specification indicates the frequency at which an input signal will be attenuated by 3dB
(approximately 30 % loss of amplitude).
The U5310A ADC card offers a 2 GHz bandwidth limiter -also see How to enable or bypass the
bandwidth limiter? (page 74).
The bandwidth also has an impact on the minimum rise and fall times that can be passed through the
front-end electronics. A pulse with a very sharp edge will be observed to have a minimum rise timeTmin
determined by the front-end electronics. In general a pulse with a given 10-90% rise time T10-90real will
be observed with a lower value given by:
T10-902=T10-90real2+Tmin2
where Tmin(ns)≈0.35/BW(GHz).
Using Bandwidth Limiter
U5310A ADC cards offer a 2 GHz bandwidth limiter capability (Specified with default mode
"Equalization Off").
Also see Programing section >How to enable or bypass the bandwidth limiter? (page 74).
When using the bandwidth limiter, it is recommended to use the default equalization mode
(Equalization off).
Vertical Resolution
The U5310A ADC Card uses 10-bit ADCs giving 1024 levels at each input full scale range.