Analog Devices UG-469 User manual

Evaluation Board User Guide
UG-469
One Technology Way •P. O. Box 9106 •Norwood, MA 02062-9106, U.S.A. •Tel: [phone] •Fax: [phone] •www.analog.com
Evaluating the AD5144 Digital Potentiometer
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.Rev. 0 | Page 1 of 20
FEATURES
Full featured evaluation board in conjunction with low
voltage digiPOT motherboard (EVAL-MB-LV-SDZ)
Various test circuits
Various ac/dc input signals
PC control via a separately purchased system demonstration
platform (SDP-B or SDP-S)
PC software for control
PACKAGE CONTENTS
EVAL-AD5144DBZ board
EVAL-MB-LV-SDZ motherboard
CD that includes
Self-installing software that allows users to control the
board and exercise all functions of the device
Electronic version of the AD5144 data sheet
Electronic version of the UG-469 user guide
GENERAL DESCRIPTION
This user guide describes the evaluation board for evaluating the
AD5144—a quad-channel, 256-position, nonvolatile memory,
digital potentiometer. With versatile programmability, the AD5144
allows multiple modes of operation, including read/write access
in the RDAC and EEMEM registers, increment/decrement of
resistance, resistance changes in ±6 dB scales, wiper setting read-
back, and extra EEMEM for storing user-defined information,
such as memory data for other components or a lookup table.
The AD5144 supports a dual-supply ±2.25 V to ±2.75 V operation
and a single-supply 2.3 V to 5.5 V operation, making the device
suitable for battery-powered applications and many other appli-
cations. In addition, the AD5144 can be configured as a versatile
I2C or SPI serial interface. The E VA L-AD5144DBZ can operate
in single-supply or dual-supply mode and incorporates an internal
power supply from the USB.
Complete specifications for the AD5144 part can be found in the
AD5144 data sheet, which is available from Analog Devices, Inc.,
and should be consulted in conjunction with this user guide
when using the evaluation board.
EVAL-AD5144DBZ WITH MOTHERBOARD AND SDP-S
11006-001
Figure 1. Digital Picture of Evaluation Board with Low Voltage DigiPOT Motherboard and System Demonstration Platform

UG-469 Evaluation Board User Guide
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TABLE OF CONTENTS
Features .............................................................................................. 1
Package Contents .............................................................................. 1
General Description ......................................................................... 1
E VA L-AD5144DBZ with Motherboard and SDP-S..................... 1
Revision History ............................................................................... 2
Evaluation Board Hardware ............................................................ 3
Power Supplies .............................................................................. 3
Digital Interface ............................................................................ 3
Test Circuits................................................................................... 4
Evaluation Board Software...............................................................8
Installing the Software ..................................................................8
Software Operation .................................................................... 10
Evaluation Board Schematics and Artwork................................ 11
Motherboard ............................................................................... 11
Daughter Board .......................................................................... 15
Ordering Information.................................................................... 18
Bill of Materials........................................................................... 18
REVISION HISTORY
11/12—Revision 0: Initial Version

Evaluation Board User Guide UG-469
Rev. 0 | Page 3 of 20
EVALUATION BOARD HARDWARE
POWER SUPPLIES
The EVAL-MB-LV-SDZ motherboard supports using single and
dual power supplies.
The E VA L -AD5144DBZ evaluation board can be powered either
from the SDP port or externally by the J1 and J2 connectors, as
described in Table 1.
All supplies are decoupled to ground using 10 µF tantalum and
0.1 µF ceramic capacitors.
Table 1. Maximum and Minimum Voltages of the Connectors
Connector No. Label Voltage
J1-1 VDD Analog positive power supply, VDD.
Single supply from 2.3 V to 5.5 V.
Dual supply from 2.25 V to 2.75 V.
J1-2 AGND Analog ground.
J1-3
VSS
Analog negative power supply, V
SS
.
Dual supply from −2.25 V to −2.75 V.
J2-1 VLOGIC Digital supply, from 1.8 V to VDD.
J2-2 DGND Digital ground.
Link Options
Several link and switch options are incorporated in the E VA L -
MB-LV-SDZ motherboard and should be set up before using
the board. Table 2 describes the positions of the links to control
the evaluation board via the SDP board using a PC. The
functions of these link options are described in detail in Table 3
through Table 6.
Table 2. Link Options Setup for SDP Control (Default)
Link No. Option
A5 +3V3
A11 3.3 V
A12 AGND
DIGITAL INTERFACE
The E VA L -AD5144DBZ can be configured as an I2C or SPI
digital interface, depending on the position in the A1 jumper.
If the part is configured in I2C mode, the ADDR0 and ADDR1
jumpers select the I2C address.
Table 3. Link Functions
Link No. Power Supply Options
A5 VLOGIC This link selects one of the following as the digital supply:
+3V3 (3.3 V from SDP).
VLOGIC EXT (external supply from the J2 connector).
A11 VDD This link selects one of the following as the positive power supply:
+5 V (5 V from SDP).
3V3 (3.3 V from SDP).
VDD (external supply from the J1 connector).
A12 VSS This link selects one of the following as the negative power supply:
AGND.
EXTVSS (external supply from the J1 connector).

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TEST CIRCUITS
The E VA L -AD5144DBZ and E VA L -MB-LV-SDZ incorporate
several test circuits to evaluate the performance of the AD5144.
DAC
The digiPOT can be operated as a digital-to-analog converter
(DAC), as shown in Figure 2. Table 4 describes the options
available for the voltage references.
The output voltage is defined in Equation 1.
256
)( RDAC1 VVV
B
A
OUT
×−=
(1)
where:
RDAC1 is the code loaded in the RDAC1 register.
VAis the voltage applied to the A terminal (A9 link).
VBis the voltage applied to the B terminal (A10 link).
However, by using the R34 and R35 external resistors, the user
can reduce the voltage of the voltage references. In this case, use
the A1 and B1 test points to measure the voltage applied to the
A and B terminals and to recalculate VAand VBin Equation 1.
Table 4. DAC Voltage References
Terminal
Link
Options
Description
A1 A9 AC+ Connects Terminal A1 to VDD/2
VDD Connects Terminal A1 to VDD
W1
BUF-W1
Connects Terminal W1 to an
output buffer
B1 A10 BIAS Connects Terminal B1 to VDD/2
VSS Connects Terminal B1 to VSS
AGND
Connects Terminal B1 to
analog ground
11006-002
VOUT1
R34
R35
A1
W1
RDAC1
A1
B1 W1
VDD
V
DD
AC+
V
DD
2
V
DD
2
AGND
BIAS
B1
VSS
V
SS
BUF-W1
Figure 2. DAC

Evaluation Board User Guide UG-469
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AC Signal Attenuation
The RDAC can be used to attenuate an ac signal, which must be
provided externally using the AC_INPUT connector, as shown
in Figure 3.
Depending on the voltage supply rails and the dc offset voltage
of the ac signal, various configurations can be used as described
in Table 5.
The signal attenuation is defined in Equation 2.







+
×=
AB
W
WB1
R
RR
nAttenuatio log
20)dB(
(2)
where:
RWis the wiper resistance.
RAB is the end-to-end resistance value.
RWB1 is the resistor between the W1 and B1 terminals.
Table 5. AC Signal Attenuation Link Options
Voltage
Supply
Maximum
AC Signal
Amplitude Link Options Conditions
Single VDD A9 AC+ No dc offset voltage;
the ac signal is
outside the voltage
supply rails due to
the dc offset voltage;
or the dc offset
voltage ≠ VDD/2.1
AC All other conditions.
A10 BIAS Use in conjunction
with the AC+ link.
GND All other conditions.
Dual VDD/VSS A9 AC+ The ac signal is
outside the voltage
supply rails due to
the dc offset voltage;
the dc offset
voltage ≠ 0 V.1
AC All other conditions.
A10 GND Use in conjunction
with the AC+ link.
VSS All other conditions.
1Recommended to ensure optimal total harmonic distortion (THD) performance.
AGND
BIAS
VSS
V
SS
V
DD
2
VOUT1
R34
R35
A1
W1
RDAC1
A1
B1 W1
AC
AC+
B1
BUF-W1
AC_INPUT
1kHz
HPF
V
DD
2
11006-003
Figure 3. AC Signal Attenuator

UG-469 Evaluation Board User Guide
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Signal Amplifier
The RDAC can be operated as an inverting or noninverting
signal amplifier supporting linear or pseudologarithmic gains.
Table 6 shows the available configurations.
The noninverting amplifier with linear gain is shown in Figure 4,
and the gain is defined in Equation 3.
AW2
WB2
R
R
G+
=1
(3)
where:
RWB2 is the code loaded for the RWB2 resistance.
RAW 2 is the code loaded for the RAW2 resistance.
11006-004
VOUT2
VIN
RDAC2
R42
C1
10nF
W2
B2
A2 B2
W2
R41
1.7kΩ
A2
R43
Figure 4. Linear Noninverting Amplifier
R43 and R42 can be used to set the maximum and minimum
gain limits.
The noninverting amplifier with pseudologarithmic gain is
shown in Figure 5, and the gain is defined in Equation 4.
RDAC2
RDAC2
G− += 256 1
(4)
where:
RDAC2 is the code loaded in the RDAC2.
VOUT2
VIN
RDAC2
R42
C1
10nF
W2
B2
A2 B2
W2
R41
1.7kΩ
A2
R43
11006-005
Figure 5. Pseudologarithmic Noninverting Amplifier
R43 and R42 can be used to set the maximum and minimum
gain limits.
The inverting amplifier with linear gain is shown in Figure 6,
and the gain is defined in Equation 5.
Note that the input signal, VIN, must be negative.
AW2
WB2
R
R
G−=
(5)
where:
RWB2 is the code loaded for the RWB2 resistance.
RAW 2 is the code loaded for the RAW2 resistance.
11006-006
VOUT2
V
IN
RDAC2
R42
C1
10nF
W2
B2
W2
A2 B2
R41
1.7kΩ
R43 A2
Figure 6. Linear Inverting Amplifier
R43 and R42 can be used to set the maximum and minimum
gain limits.
The inverting amplifier with pseudologarithmic gain is shown
in Figure 7, and the gain is defined in Equation 6.
2256
2
RDAC
RDAC
G− −=
(6)
where:
RDAC2 is the code loaded in the RDAC2.
11006-007
VOUT2
V
IN
RDAC2
R42
C1
10nF
W2
B2
W2
A2 B2
R41
1.7kΩ
R43 A2
Figure 7. Pseudologarithmic Inverting Amplifier
R43 and R42 can be used to set the maximum and minimum
gain limits.
Output Buffers
RDAC3 and RDAC4 can be connected to an output buffer as
shown Figure 8 and Figure 9.
VOUT3
RDAC3
A3
B3 BUF_3
A3
B3
W3
W3
11006-008
Figure 8. RDAC3
VOUT4
RDAC4
A4
B4 BUF_4
A4
B4
W4
W4
11006-009
Figure 9. RDAC4

Evaluation Board User Guide UG-469
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Table 6. Amplifier Selection Link Options
Amplifier Gain
Linear Setting
Gain Mode Enabled Link Label
Noninverting Linear Yes A7 LIN
A6 N-INV
A8
N-INV
Pseudologarithmic No A7 LOG
A6
N-INV
A8 N-INV
Inverting Linear Yes A7 LIN
A6 INV
A8 INV
Pseudologarithmic No A7 LOG
A6
INV
A8 INV

UG-469 Evaluation Board User Guide
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EVALUATION BOARD SOFTWARE
INSTALLING THE SOFTWARE
The E VA L -AD5144DBZ kit includes a CD containing the
evaluation board software. The software is compatible with
Windows® XP, Windows Vista, and Windows 7 (both 32 bits
and 64 bits).
Install the software before connecting the SDP board to the USB
port of the PC to ensure that the SDP board is recognized when
it is connected to the PC.
To install the software,
1. Start the Windows operating system and insert the CD into
the CD-ROM drive.
2. The installation software opens automatically. If it does not
open automatically, run the setup.exe file from the CD.
3. After the installation is complete, power up the evaluation
board as described in the Power Supplies section.
4. Connect the E VA L-AD5144DBZ and E VA L -MB-LV-SDZ
to the SDP board, and then connect the SDP board to the
PC using the USB cable included with the SDP board.
5. When the software detects the evaluation board, follow the
instructions that appear to finalize the installation.
To run the program, do the following:
1. Click Start > All Programs > Analog Devices > AD5144
> AD5144 Eval Board. To uninstall the program, click
Start > Control Panel > Add or Remove Programs >
AD5144 Eval Board.
2. If the SDP board is not connected to the USB port when
the software is launched, a connectivity error displays (see
Figure 10). Simply connect the evaluation board to the
USB port of the PC, wait a few seconds, click Rescan, and
follow the instructions.
11006-010
Figure 10. Pop-Up Window Error
The main window of the E VA L -AD5144DBZ software then
opens, as shown in Figure 11.

Evaluation Board User Guide UG-469
Rev. 0 | Page 9 of 20
11006-022
Figure 11. EVAL-AD5144DBZ Software Main Window

UG-469 Evaluation Board User Guide
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SOFTWARE OPERATION
The main window of the E VA L -AD5144DBZ software has two
tabs, Visual Mode and Manual Control.
Visual Mode
The Visual Mode tab is divided into the following sections:
ALL CHANNELS COMMANDS, INDIVIDUAL CHANNEL
COMMANDS, and a block diagram that contains boxes for
changing the control register values and buttons and for controlling
the hardware pins.
The ALL CHANNELS COMMANDS section allows you to
send quick commands directly to the AD5144.
The INDIVIDUAL CHANNEL COMMANDS section allows
you to send quick commands to only specific channels of
the AD5144.
The block diagram allows you to update the control register
status. Each register value can be easily updated by changing the
value in its respective block within the diagram. In addition,
buttons are available that allow you to change the level of some
hardware pins.
Manual Mode
The Manual Mode tab, as shown in Figure 12, allows you to
customize an I2C data-word by manually switching the scroll
bars from 0 to 1 or from 1 to 0, as desired, and then clicking
SEND DATA.
11006-023
Figure 12. Manual Mode

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EVALUATION BOARD SCHEMATICS AND ARTWORK
MOTHERBOARD
11006-012
Figure 13. SDP Connector and Power Supply

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11006-013
Figure 14. Schematic of Test Circuits

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11006-014
Figure 15. Schematic of Connectors to Daughter Board

UG-469 Evaluation Board User Guide
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11006-015
Figure 16. Component Side View of Motherboard
11006-016
Figure 17. Component Placement Drawing of Motherboard
11006-017
Figure 18. Layer 2 Side PCB Drawing of Motherboard

Evaluation Board User Guide UG-469
Rev. 0 | Page 15 of 20
DAUGHTER BOARD
11006-018
VDD
VLOGIC
C4 C3
0.1uF10uF
0.1uF10uF
+
C2 C1
+
RESET
WP
LRDAC
DIS
INDEP
VDD
VSS
DGND
AGND
VLOGIC
VSS
VDD
DGND
VLOGICADDR0
BA
0
ADDR0
1 0 1DGND
VLOGICADDR1
BA
ADDR1
W1 VDD
VSS
WP
RESET
LRDAC
SDA|DIN
SCL|SCLK
ADDR1|SDO
ADDR0|SYNC
GND
VLOGIC
DIS
B1
A1 W2
B2
A2 W3
B3
A3 W4
B4
A4
W1
B1
A1
W2
B2
A2
W3
B3
A3
W4
B4
A4
U1 AD5142
2 3 4 9
10 11
5 6 7
12 13 14
15 16 18 17 19 22 21 23 24 20 1 8
J1-1 J1-2 J1-3 J1-4 J1-5 J1-6 J1-8 J1-7
ADDR0 ADDR1 SDA
J3-1
J3-2
J3-3
J3-4
J3-5
J2-1 J2-3 J2-5 J2-7
J2-11
J2-9
J2-2 J2-4 J2-6 J2-8 J2-12 J2-10
A1 W1 B1 A2 B2 W2
A3
W3
B3 A4 B4
W4
J4-1
J4-2
J4-3
J4-4
J4-5
SCL SYNC SDO SCLK SDI
SDA|DIN SDA
DIN
SCL|SCLK
12 13
14 10 11 6 5 3 2 16
9 7 4 8
SCL SCLK
VLOGIC
ADDR1|SDO
ADDR0|SYNC
EN IN
1
A1
A B
15
ADDR1 SDO
S3B S3A S2B S2A S1B S1A
D4 D3 D2 D1
S4B S4A
DGND
GND VDD
U2
ADG774
DGND
DGND
VLOGIC
I2C SPI
DIS
ADDR0 SYNC
VSS
WP
RESET
LRDAC
SDA|DIN SCL|SCLK
ADDR1|SDO
ADDR0|SYNC
DGND
VLOGIC DIS
Figure 19. Schematic of Daughter Board

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11006-019
Figure 20. Component Side View of Daughter Board
11006-020
Figure 21. Component Placement Drawing of Daughter Board

Evaluation Board User Guide UG-469
Rev. 0 | Page 17 of 20
11006-021
Figure 22. Layer 2 Side PCB Drawing of Daughter Board

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ORDERING INFORMATION
BILL OF MATERIALS
Table 7. Motherboard
Qty Reference Designator Description Supplier1/Part Number
3 BUF-3, BUF-4, BUF-W1 2-pin (0.1" pitch) header and shorting shunt FEC 1022247 and 150411
3 A6, A7, A8 3-pin SIL header and shorting link FEC 1022248 and 150410
5 A5, A9, A10, A11, A12 6-pin (3 × 2), 0.1" header and shorting block FEC 672014 and 150411 (36-pin strip)
1 J1 3-pin terminal block (5 mm pitch) FEC 151790
2 J7, J8 4-pin SIL header FEC 1098035
1 J4 Receptacle, 0.6 mm, 120-way Digi-Key H1219-ND
1 J10 8-pin in-line header; 100 mil centers FEC 1098038
1 J5 12-pin (2 × 6), 0.1" pitch header FEC 1098051
2 J2, J3 2-pin terminal block (5 mm pitch) FEC 151789
17
R1, R3, R6, R7, R8, R9, R10, R11, R12,
R13, R20, R22, R23, R34, R35, R42,
R43
SMD resistor, 0 Ω, 0.01, 0603
FEC 9331662
1 R2 SMD resistor, 2.2 kΩ, 0.01, 0603 FEC 1750676
1 R41 SMD resistor, 1.7 kΩ, 1% ,0603 FEC 1170811
1 R21 Resistor, surge, 1.6 Ω, 1%, 0603 FEC 1627674
1 R38 SMD resistor, 2.7 kΩ, 1%, 0603 FEC 1750678
1 R14 SMD resistor, 100 Ω, 1%, 0603 FEC 9330364
1 R4 SMD resistor, 1 kΩ, 0.01, 0603 FEC 9330380
3 R5, R25, R26 SMD resistor, 100 kΩ, 1%, 0603 FEC 9330402
5 R15, R16, R17, R18, R19 SMD resistor, 33 kΩ, 1%, 0603 FEC 9331034
1 C1 SMD capacitor, 100 nF, 10%, 0805 FEC 1650863
8 C4, C9, C10, C11, C12, C17, C19, C21 SMD capacitor, 0.1 µF, ±10%, 0603 FEC 1759122
4 C2, C6, C7, C14 SMD capacitor, 0.1 µF, ±10%, 0603 FEC 3019482
2 C8, C13 SMD capacitor, 10 µF, ±10% FEC 197130
4 C18, C20, C22, C5 Capacitor, 10 µF, ±20% FEC 1190107
2 C3, C15 Capacitor, 470 nF, ±10%, 0603 FEC 1414037
1
C16
Capacitor, 4.7 nF, ±10%, 0603
FEC 1414642
1 C34 Capacitor, 4.7 nF, ±20% FEC 1432350
1 L2 Inductor, SMD, 600Z FEC 9526862
1 D1 Green SMD LED FEC 5790852
1 U1 Two-port level translating bus switch ADG3247BCPZ
1
U2
Dual op amp
AD8652ARZ
1 U3 Precision low dropout voltage regulator ADP3303ARZ-3.3
1 U4 Operational amplifier AD8618ARZ
1 U5 I2C serial EEPROM 64k 2.5 V MSOP-8 FEC 1331335
18 LRDAC, RESET, SYNC, WP, A1, A2,
A3, A4, AGND, B1, VOUT_C1,
VOUT_C2, VOUT3, VOUT4, W1, W2,
W3, W4
Terminal, PCB, black, PK100, test point FEC 8731128
5 +3.3V , +5V, EXT_VDD, VLOGIC,
EXT_VSS
Terminal, PCB, red, PK100, test point FEC 8731144
1FEC refers to Farnell Electronic Component Distributors; Digi-Key refers to Digi-Key Corporation.

Evaluation Board User Guide UG-469
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Table 8. Daughter Board
Qty Reference Designator Description Supplier1/Part Number
1 U1 256-position digital potentiometer AD5144BCPZ10
1 U2 Low voltage quad SPDT switch ADG774BRQZ
3 A1, ADDR0, ADDR1 3-pin SIL header and shorting link FEC 1022248 and 150410
2 C2, C4 6.3 V tantalum capacitor (Case A), 10 µF, ±20% FEC 1190107
2 C1, C3 50 V, X7R ceramic capacitor, 0.1 µF, ±10% FEC 1759122
1 J1 Header, 2.54 mm, PCB, 1 × 8-way FEC 1766172
1 J2 12-pin (2 × 6), 0.1" pitch header FEC 1804099
2 J3, J4 5-pin SIL header FEC 1929016
1FEC refers to Farnell Electronic Component Distributors.

UG-469 Evaluation Board User Guide
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NOTES
I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors).
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
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By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions
set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you
have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is m
ade by and between you (“Customer”) and Analog Devices, Inc.
(“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal,
temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided
for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional
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UG11006-0-11/12(0)