Anritsu MT8820A User manual

Document No.: M-W1940BE-3.0
Measurement Solutions
ANRITSU CORPORATION
To ensure that this equipment is used safely, impor-
tant safety items are explained in the MT8820A Op-
eration Manual. This document explains important
service items related to service. Read both the op-
eration manual and this document, and keep both
with the MT8820A.
MT8820A
Radio Communication Analyzer
Service Manual
Third Edition

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Safety Symbols
To prevent the risk of personal injury or loss related to equipment malfunction, Anritsu Corporation uses the following
safety symbols to indicate safety-related information. Insure that you clearly understand the meanings of the sym-
bols BEFORE using the equipment.
Some or all of the following five symbols may not be used on all Anritsu equipment. In addition, there may be other
labels attached to products which are not shown in the diagrams in this manual.
Symbols used in manual
This indicates a very dangerous procedure that could result in serious injury or
death if not performed properly.
This indicates a hazardous procedure that could result in serious injury or death if
not performed properly.
This indicates a hazardous procedure or danger that could result in light-to-severe
injury, or loss related to equipment malfunction, if proper precautions are not taken.
Safety Symbols Used on Equipment and in Manual
The following safety symbols are used inside or on the equipment near operation locations to provide information
about safety items and operation precautions. Insure that you clearly understand the meanings of the symbols
and take the necessary precautions BEFORE using the equipment.
This indicates a prohibited operation. The prohibited operation is indicated sym-
bolically in or near the barred circle.
This indicates an obligatory safety precaution. The obligatory operation is indicat-
ed symbolically in or near the circle.
This indicates warning or caution. The contents are indicated symbolically in or
near the triangle.
This indicates a note. The contents are described in the box.
These indicate that the marked part should be recycled.
MT8820A
Radio Communication Analyzer
Service Manual
20 August 2001 (First Edition)
20 March 2002 (Third Edition)
Copyright © 2001-2002, ANRITSU CORPORATION.
All rights reserved. No part of this manual may be reproduced without the prior written permission of the
publisher.
The contents of this manual may be changed without prior notice.
Printed in Japan
DANGER
WARNING
CAUTION

For Safety
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For safety, do not open the equipment covers.
If repair is required, contact the sales representative, branch office, or
agent at the telephone number and address given in this document or in
the equipment operation manual.
Although not recommended by Anritsu Corporation, if it is really impera-
tive to open the covers for emergency repair, take great care not to touch
any dangerous parts.
Always request repair by a trained engineer who understands the haz-
ards.
Anritsu Corporation will not accept liability for any injuries sustained as a
result of opening the equipment covers.
CAUTION
Before changing the fuses, ALWAYS remove the power cord from the
poweroutlet and replace the blown fuses. ALWAYS use new T6.3A
fuses.
T6.3A indicates a time-lag fuse.
6.3A or F6.3A indicate a normal fusing type fuse.
There is risk of receiving a fatal electric shock if the fuses are replaced
with the power cord connected.
Changing Fuse

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Trademark
MS, Microsoft, MS-DOS, Windows and Visual Basic are registered
trademarks of Microsoft Corporation.
IBM and AT are registered trademarks of International Business Machi-
nes Corporation.

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About This Manual
The MT8820A Radio Communication Analyzer Service Manual describes
how to locate a faulty module of MT8820A in trouble and repair it by mod-
ule replacement. It does not mention repairing the faulty module itself.
This manual is prepared for service men of Anritsu or its agencies who
have completed the necessary training courses and have complete under-
standing about the danger of fire or electric shock.

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.
Table of Contents
For Safety ................................................... iii
About This Manual ....................................... I
Section 1 General...................................... 1-1
Section 2 Circuit Description ................... 2-1
2.1 Outline........................................................................... 2-2
2.2 Circuit Description of Each Unit .................................... 2-15
Section 3 Troubleshooting ....................... 3-1
3.1 Outline........................................................................... 3-2
3.2 Service Kits ................................................................... 3-2
3.3 Instruments Required for Troubleshooting ................... 3-5
3.4 Circuit Reference .......................................................... 3-6
3.5 Overall Troubleshooting................................................ 3-7
Section 4
Adjustment and Compensation.....
4-1
4.1 Outline........................................................................... 4-2
4.2 Instruments Required for Adjustment
and Compensation........................................................ 4-3
4.3 Change Parts on A01 MAIN CPU UNIT ....................... 4-4
4.4 Carrier Leak Adjustment ............................................... 4-5
4.5 Output Level and Input Frequency Character
Compensation............................................................... 4-8
4.6 FM Deviation Adjustment.............................................. 4-9
Section 5 Mechanical Configuration ......... 5-1
5.1 Outline........................................................................... 5-2
5.2 Cabinet and Shield Case Assembly ............................. 5-3
5.3 Main Unit Removal........................................................ 5-5
5.4 Built-in Option Unit ........................................................ 5-9
5.5 Parts Lists ..................................................................... 5-11

Section
SectionSection
Section 1
11
1 General
GeneralGeneral
General
1-
1-1-
1-1
11
1
This service manual explains how to maintain the MT8820A Radio Com-
munication Analyzer. Section 1 describes the configuration of this man-
ual.
Section 1 General
Describes the service manual configuration.
Section 2 Circuit Description
Describes the MT8820A circuit operations and the role of each unit
using block diagrams.
Section 3 Troubleshooting
Explains how to locate faulty parts when a problem has occurred in
the MT8820A.
Section 4 Adjustment And Compensation
Describes the adjustment and compensation procedures to be carried
out after troubleshooting.
Section 5 Mechanical Configuration
Presents the parts list used for troubleshooting or parts replacement
and explains how to remove the parts.

Section 1
Section 1Section 1
Section 1 General
GeneralGeneral
General
1-
1-1-
1-2
22
2.
..
.

Section
SectionSection
Section 2 Circuit Description
2 Circuit Description2 Circuit Description
2 Circuit Description
2-
2-2-
2-1
11
1
2.1 Outline ....................................................................... 2-2
2.1.1 Outline of Circuitry......................................... 2-2
2.1.2 Power Line Description ................................. 2-9
2.1.3 Signal Lines Description................................ 2-10
2.2 Circuit Description of Each Unit................................. 2-15
2.2.1 A01 Main CPU Unit ....................................... 2-15
2.2.2 A41, A42 WCDMA COM Unit........................ 2-18
2.2.3 A51, A52 WCDMA BB Unit ........................... 2-21
2.2.4 A61, A62 MEAS DSP Unit............................. 2-23
2.2.5 A02 DAC/ADC Unit ....................................... 2-27
2.2.6 A71, A72 RF Unit .......................................... 2-30
2.2.7 A7101, A7201 Input LPF ............................... 2-33
2.2.8 A7102, A7202 Output AMP........................... 2-33
2.2.9 A7103, A7203 RF.......................................... 2-33
2.2.10 A7104, A7204 IF ........................................... 2-33
2.2.11 A81, A82 Local Unit....................................... 2-34
2.2.12 A04 Reference Unit ....................................... 2-39
2.2.13 A05 Mother Board ......................................... 2-43
2.2.14 A07 Panel Control Unit.................................. 2-44
2.2.15 Power Supply Unit......................................... 2-47
2.2.16 A21, A22 TDMA COM Unit............................ 2-48
2.2.17 A03 AUDIO Unit ............................................ 2-53

Section 2 Circuit Description
Section 2 Circuit DescriptionSection 2 Circuit Description
Section 2 Circuit Description
2-
2-2-
2-2
22
2
2.1 Outline
This section explains the unit configuration of the MT8820A and the block
diagram for each unit.
2.1.1 Outline of Circuitry
Table 2-1 gives the unit outline and Figure 2-1 shows the overall block
diagram.
Table 2-1 Outline of Circuitry
A No. Name Description
A01 MAIN CPU •The main CPU unit provides functions to
control the entire system such as MMI and
hardware control.
•The main CPU unit mounts two processors:
PPC750 CPU and TI-C5420 DSP.
•The PPC750 CPU is for MMI and hardware
control and TI 5420 DSP is for analog
hardware control.
A21
A22
TDMA COM •The TDMA COM unit performs the TDMA-
system Layer 1 to 3 processing.
•This unit mounts one MPU and four DSP to
correspond to various communication
systems by replacing the software.
A31
A32
CDMA2K COM •(Development scheduled)
A41
A42
WCDMA COM •In collaboration with the A51/A52 WCDMA
BB unit, provides the WCDMA call
processing function.
•Performs WCDMA Layer 2 and 3 processing,
Layer 1 frame CODEC processing, coding
processing, etc.
A51
A52
WCDMA BB •Spreader
Performs spreading processing for downlink
transmission data from the A41/A42
WCDMA COM unit.
•Despreader
Performs IQ demodulation and despreading
processing for uplink IF signal and transmits
the results to the WCDMA COM unit.
A61
A62
MEAS DSP •Acquires the AD-sampled signal to be
measured, analyzes it according to the MAIN
CPU instructions and sends the results to the
MAIN CPU.

2.1
2.12.1
2.1 Outline
OutlineOutline
Outline
2-
2-2-
2-3
33
3
Table 2-1 Outline of Circuitry (Continued)
A No. Name Description
A02 DAC / ADC •The DAC/ADC board provides two I/O routes
for downlink and uplink signals.
•Digital to analog conversion of downlink
baseband signal.
•Analog to digital conversion of uplink IF
signal.
A03 AUDIO •The AUDIO unit provides the output and
analysis functions of AF signal.
•This unit provides the Voice Codec function to
enable the voice communication using a
handset.
A71
A72
RF •The A71/A72 RF unit consists of the SG and
SPA sections.
•The A71/A72 RF unit consists of the S-
ATT/SW section and four PC boards: INPUT
LPF, OUTPUT AMP, RF and IF.
•SG section
RF signal generator for reception measurement
and call processing.
From the 800 MHz reference signal from A04
REFERENCE and two local signals from
A81/82 LOCAL (SG_REF and SG_Sample),
generates an RF signal of the desired frequency
and outputs it after the following modulation:
1. Orthogonal modulation with I/Q signal from
the A02 DAC/ADC unit.
2. With burst signal from the A02 DAC/ADC
unit, performs pulse (burst) modulation on
the RF output.
3. Performs FM modulation on RF frequency
(by the A81/A82 LOCAL unit).
4. Provides electronic step ATT for changing
level without hits.
•SPA section
Receiver for transmission measurement and call
processing. On reception of the 800 MHz signal
from the A04 REFERENCE and two LOCAL
signals from A81/82 LOCAL (SPA_REF and
SPA_Sample), receives a signal that depends
on the set frequency and outputs the converted
IF frequency. There are two IF outputs: SPA
IF1 for transmission measurement (22.5 MHz)
and DEM_IF1 for call processing (5 MHz or less,
depending on the system).

Section 2 Circuit Description
Section 2 Circuit DescriptionSection 2 Circuit Description
Section 2 Circuit Description
2-
2-2-
2-4
44
4
Table 2-1 Outline of Circuitry (Continued)
A No. Name Description
A7101
A7201
INPUT LPF •Low-pass filter for the SPA RF input section.
The signal from the RF S-ATT for SPA is
output to the 1st Mixer through LPF.
A7102
A7202
OUTPUT AMP •Amplifies the RF output signal from the 1st
Mixer on the SG side and sends it to the RF
S-ATT on the SG side.
•Detects the output level for Cal ALC.
A7103
A7203
RF •High-frequency part consisting of the SPA/SG
1st and 2nd Mixers, 1st LOCAL/YTO
/Sampler and 2nd LOCAL/PLL.
A7104
A7204
IF •Low-frequency part consisting of the SPA 2nd
IF section and up, SG BB/2nd IF section,
SPA/SG YTO PLL/YTO Driver section and
whole RF UNIT controller.
––– S-ATT/SW •RF S-ATT for SG and RF S-ATT for SPA.
•Each with an RF switch to directly connect
SG output and SPA input for level Cal.
Moreover, S-ATT for SG has an RF switch to
directly send SG output to the AUX Out
terminal.
A81
A82
LOCAL UNIT •Based on the 800 MHz signal from the A04
REFERENCE unit, the A81/A82 LOCAL unit
generates signals for YTO PLL depending on
the output/reception frequency of the RF unit
SPA/SG section and outputs them to the RF
unit. Two LOCAL signals are output for
SPA and SG:
•YTOPLL reference signal (29 MHz ±α)
(SG_REF, SPA_REF)
•YTOPLL sampling signal (200 MHz ±β)
(SG_Sample, SPA_Sample)

2.1
2.12.1
2.1 Outline
OutlineOutline
Outline
2-
2-2-
2-5
55
5
Table 2-1 Outline of Circuitry (Continued)
A No. Name Description
A04 REFERENCE •Contains 10 MHz reference crystal oscillator.
•Generates 100 MHz signal synchronized with
the 10 MHz oscillator signal that is the
reference clock, and then sends the 800 MHz
signal (100 MHz multiplied by 8) to the RF
and LOCAL units.
•When 10 MHz or 13 MHz external reference
signal is input, generates 800 MHz signal by
multiplying by 8 the 100 MHz signal
synchronized with these signals as reference
clocks.
•Outputs 10 MHz signals, generated by
dividing 100 MHz signal by 10, to the BB and
DAC/ADC units.
A05 MOTHER
BOARD
•Supplies the power to the units.
•Connects signals among the units.
•Connects analog signals among the analog
units.
•Mounts PCI bridge for slot expansion.
•P1 and P2 buses meeting C-PCI Standard
and user-defined bus.
•Thirteen C-PCI Standard slots.
•Two RF unit connection slots.
•Two local unit connection slots.
•One reference unit connection slot.
•One power supply unit connection slot
•One panel control unit connection slot.
•External I/O connectors for GPIB-1/2, RS-
232C-1/2, Call Proc I/O-1/2, 10BaseT-1/2,
100BaseT, Serial BUS-1/2, Event Trigger IN-
1/2 and Event Trigger OUT-1/2 on the rear
panel
•External I/O connectors for PC card, USB-1/2,
Hand Set-1/2, AF IN-1/2 and AF OUT-1/2 on
the front panel.
•Mounts two connectors for 100BaseT internal
connection and three cooling fan power
supply connectors.
–– BRIDGE •32-bit PCI bridge.

Section 2 Circuit Description
Section 2 Circuit DescriptionSection 2 Circuit Description
Section 2 Circuit Description
2-
2-2-
2-6
66
6
Table 2-1 Outline of Circuitry (Continued)
A No. Name Description
A07 PANEL
CONTROL
•Generates key-code data and interrupts
depending on key entries.
•Generates rotary knob rotation count and
interrupts.
•LED ON/OFF control function set from the
main CPU.
•Buzzer control function set from main CPU.
•LCD brightness control function set from the
main CPU.
•LCB backlight ON/OFF control function set
from the main CPU.
•Power supply to LCD inverter.
•Secondary power condition storage function
for primary power OFF due to power failure,
etc.
•Power ON/OFF control function.
–– KEY PANEL •Notifies the panel control of pressing of the
front panel rubber key.
–– POWER UNIT •The power supply unit provides twelve
secondary power outputs: +3.3 V, +5.0 V
(Digital), ±5.0 V (Analog), +5.0 V (for four
USBs), ±12 V, +24 V and standby +12 V (S).
•All power outputs for the units and
connectors output through the A05 mother
board.

2.1
2.12.1
2.1 Outline
OutlineOutline
Outline
2-
2-2-
2-7
77
7
Fig. 2-1 Overall Block Diagram
To COM CPUs for Phone 2
From COM CPUs for Phone 2
From COM CPUs for Phone 2 To 2 nd Meas DSP (Opt)
A02 DAC/ADC
A03 AUDIO
A61 Meas DSP
A51 WCDMA BB
Spreader
Despreader
A41 WCDMA COM
Frame
coder
WCDMA
COM CPU
Frame
Decoder
Timing
Generator
A31 CDMA2k COM CCOMOM
Qualcomm
Chip
Cdma2000
COM CPU
Timing
Generator
Vocoder DSP 1
A21 TDMA COM Frame
Coder
& mod
Frame
Decoder
& Demod
TDMA/AMPS
COM CPU
Timing
Generator
D/A
AF input 2 / Handset 2
10 MHz/13 MHz Std Input
Digital I,Q
PCI BUS
A01 Main CPU
Main CPU
HW
Controller
A71 RF AD/DA control (Serial Data)
A72 RF AD/DA control (Serial Data)
A07
Panel Control
＋
D/A
Inter
polator 1
A04 REFRENCE
800 MHz/10 MHz
Reference
Generator
AF input 1 / Handset 1
AF output 1 / Handset 1
AF DSP 1
Tone Generator
(Audio Analysis)
A/D D/A
＋
AF output 2 / Handset 2
D/A
FM control
FM control to TDMA COM2
SG1FSK control
Demod IF
A
nalo
g
IF
A/D
Clock
Gen 1
Analog I,Q
Analog I,Q
Analog IF
Di
g
ital I
,
QDecimation
Filter 1
Wave
Memory 1
DSP1
Decimation
Filter 2
Wave
Memory 2
DSP2
D/A
Inter
polator 2
A/D
A/D
Clock
Gen 2
Demod IF
Digital IF
Digital IF
Di
g
ital I
,
Q
A/D
A
/D
800 MHz
To RF&LOCAL
10 MHz
To BB&
DAC/ADC
A71 RF
SG1
SPA1
ATT
ATT
S1 S2
S3
A
ux Out
From
REFERENCE
800 MHz
A81 LOCAL
DDS
(SG)
PLL
PLL
DDS
(SPA) 1/4
1/2
FM
SG
REF
SPA
REF
SPA SG
A82 LOCAL (Opt)
DDS
(SG)
PLLPLL
DDS
(SPA) 1/4
1/2
FM
SG
SPA
SPA SAMP SG SAMP
A72 RF(Opt.)
SG1
SPA1
ATT
ATT
S1 S2
S3
A
ux Out
From
REFERENCE
800 MHz
Main1
In/Out
Main2
In/Out
A/D Vocoder DSP 2
AF DSP 2
Tone Generator
(Audio Analysis)

Section 2 Circuit Description
Section 2 Circuit DescriptionSection 2 Circuit Description
Section 2 Circuit Description
2-
2-2-
2-8
88
8

2.1
2.12.1
2.1 Outline
OutlineOutline
Outline
2-
2-2-
2-9
99
9
2.1.2 Power Line Description
The power supply unit provides twelve secondary power outputs: +3.3 V,
+5.0 V (Digital), ±5.0 V (Analog), +5.0 V (four USBs), ±12 V, +24 V and
standby +12 V (S).
All power for the units and connectors are output through the A05 mother
board.
Table 2-2 gives the power line voltages and their destinations.
Table 2-2 Power Lines
Output Power Lines
Supplied UNIT +3.3 +5 (D) +5 (A) –5 (A) USB5V +12 –12 +24 +12 (S)
A01
MAIN {{ {{
A21, A22
TDMA COM {{ { {{
A41, A42
WCDMA COM {{ ∆∆∆
A51, A52
WCDMA BB {{{{
A61, A62
MEAS DSP {{ {{
A02
DAC/ADC {{{{ { ∆
A03
AUDIO {∆{{ {{
A7103, A7203
RF {{ {{{
A81, A82
LOCAL {{ {{
A04
REFERENCE {{{
A05
MOTHER BOARD {{{{{{{{{
A06
BRIDGE {{
A07
PANEL CONTROL {{ { {
A09
KEY PANEL
USB-1/2 {
Call Proc I/O-1/2 {
FAN {
{: Power supplied and used
∆: Power supplied but not used

Section
SectionSection
Section 2
22
2 Circuit Description
Circuit DescriptionCircuit Description
Circuit Description
2-
2-2-
2-10
1010
10
2.1.3 Signal Lines Description
Figure 2-2 shows the signal lines that go through the A05 mother board.

2.1
2.12.1
2.1 Outline
OutlineOutline
Outline
2-
2-2-
2-11
1111
11
Fig. 2-2 Signal Line Diagram
PCI 1 PCI 2 PCI 3 PCI 4 PCI 5 PCI 6 PCI 7 PCI 8 PCI 9 PCI 10 PCI 11 PCI 12 PCI 13
RF1 RF2 Local1 Local2 Main
CPU
TDMA
COM1
Cdma2K
COM1
WCDMA
COM1
WCDMA
BB1
Meas
DSP1
DAC/ADC Meas
DSP2
WCDMA
BB2
WCDMA
COM2
Cdma2K
COM2
TDMA
COM2
AUDIO
SG Ref (1)
SPA Ref (1)
Analog IQ (2) + RF Gate (1) = 3
FM Control 1 (1)
Down Link (7)
RF sel (2)+ IQ mode (1) + Digital IQ (10) + IQ order (2) + Clock (1) + SMF cont (3) + RF Gate (1) = 20
Down Link (7)
SG Ref (1)
SPA Ref (1)
FM Control 2 (1)
Serial Control Data (8)
Serial Control Data (8)
BB control (23)
Timing Signal (5)
CPCI BUS
Bridge
Analog IQ (2) + RF Gate (1) =3
IQ Enable to Each COM (6)
SPA Digital IF (24) + Clock (1) + Range Over (1) = 26
BB Trig (1)
Timing Signal (5)
Start 1 (1)
Start 2 (1)
Trig 1 to HW controller (1)
Trig 2 to HW controller (1)
Meas Trig to Meas DSP 1 (1)
Meas Trig to Meas DSP 2 (1)
FSK
(
1
)
RF sel (2)+ IQ mode (1) +Digital IQ (10) + IQ order (2) + Clock (1) + SMF cont (3) + RF Gate (1) = 20
FSK
(
1
)
Demod IF (1)
Up Link (7)
Demod IF (1)
Up Link (7)
SPA Digital IF (24) + Clock (1) + Range Over (1) = 26
BB control (23)
BB Trig (1)
50Ω 50Ω
Super Frame Timing (6)
Meas Timing to Meas DSP 1 (1)
( HW_E_Trig 1 )
Meas Timing to Meas DSP 2 (1)
( HW_E_Trig 2 )
Source
2-State Source (i.e. Active / Hi-z )
Destination
2-State Destination (i.e. Connected /Hi-z)
WIDE1_IQ Enable Only WIDE2_IQ Enable Only
BB_OSCLK (1)
BB_OSCLK (1)
CPCI BUS

Section 2 Circuit Description
Section 2 Circuit DescriptionSection 2 Circuit Description
Section 2 Circuit Description
2-
2-2-
2-12
1212
12
Fig. 2-2 Signal Line Diagram (Continued)
PCI 1 PCI 2 PCI 3 PCI 4 PCI 5 PCI 6 PCI 7 PCI 8 PCI 9 PCI 10 PCI 11 PCI 12 PCI 13
RF1 RF2 Local1 Local2 Main
CPU
TDMA
COM1
Cdma2K
COM1
WCDMA
COM1
WCDMA
BB1
Meas
DSP1
DAC/ADC Meas
DSP2
WCDMA
BB2
WCDMA
COM2
Cdma2k
COM2
TDMA
COM2
AUDIO
DSUB15
Call Proc.
I/O-1
BER Data Input (1)
BER Clock Input (1)
BER Data Output (1)
BER Clock Output (1)
Frame Trig Output (1)
Sync Input (1)
Sync Output (1)
Spare (7)
DSUB15
Call Proc.
I/O-2
BER Data Input (1)
BER Clock Input (1)
BER Data Output (1)
BER Clock Output (1)
Frame Trig Output (1)
Sync Input (1)
Sync Output (1)
Spare (7)
10BaseT 1
10BaseT (4)
10BaseT (4)
USB (2)
USB (2)
10BaseT 2
USB 1
USB 2
RS232C (8)
RS232C 1
RS232C 2
RS232C (8)
GPIB 1
GPIB 2
GPIB (16 = Dio 0 to 8,DAV,NRFD,NDAC,ATN,REN,IFC,SRQ,EOI)
GPIB (16 = Dio 0 to 8,DAV,NRFD,NDAC,ATN,REN,IFC,SRQ,EOI)
A07
Panel Control
Panel Key Interface (19)
PCMCIA
Type II
PCMCIA (64)
USB (2)
USB (2)
USB 1
USB 2
100BaseTX
10BaseT
100BaseTX/10BaseT (8)