ARM Express uATX V2M-P1 Product manual

Copyright © 2009-2014, ARM. All rights reserved.
ARM DUI 0447J (ID052914)
ARM®Motherboard Express µATX
V2M-P1
Technical Reference Manual

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ID052914 Non-Confidential
ARM Motherboard Express µATX
Technical Reference Manual
Copyright © 2009-2014, ARM. All rights reserved.
Release Information
Proprietary Notice
Words and logos marked with ®or ™are registered trademarks or trademarks of ARM in the EU and other countries,
except as otherwise stated below in this proprietary notice. Other brands and names mentioned herein may be the
trademarks of their respective owners.
Neither the whole nor any part of the information contained in, or the product described in, this document may be
adapted or reproduced in any material form except with the prior written permission of the copyright holder.
The product described in this document is subject to continuous developments and improvements. All particulars of the
product and its use contained in this document are given by ARM in good faith. However, all warranties implied or
expressed, including but not limited to implied warranties of merchantability, or fitness for purpose, are excluded.
This document is intended only to assist the reader in the use of the product. ARM shall not be liable for any loss or
damage arising from the use of any information in this document, or any error or omission in such information, or any
incorrect use of the product.
Where the term ARM is used it means “ARM or any of its subsidiaries as appropriate”.
Confidentiality Status
This document is Non-Confidential. The right to use, copy and disclose this document may be subject to license
restrictions in accordance with the terms of the agreement entered into by ARM and the party that ARM delivered this
document to.
Product Status
The information in this document is final, that is for a developed product.
Web Address
http://www.arm.com
Change History
Date Issue Confidentiality Change
27 November 2009 A Non-Confidential First release for V2M-P1
26 March 2010 B Non-Confidential Second release for V2M-P1
27 August 2010 C Non-Confidential Third release for V2M-P1
15 October 2010 D Non-Confidential Fourth release for V2M-P1
28 March 2011 E Non-Confidential Fifth release for V2M-P1
22 June 2012 F Non-Confidential Sixth release for V2M-P1
12 October 2012 G Non-Confidential Seventh release for V2M-P1
31 March 2013 H Non-Confidential Eighth release for V2M-P1
12 August 2013 I Non-Confidential Ninth release for V2M-P1
26 May 2014 J Non-Confidential Tenth release for V2M-P1

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Conformance Notices
This section contains conformance notices.
Federal Communications Commission Notice
This device is test equipment and consequently is exempt from part 15 of the FCC Rules under section 15.103 (c).
CE Declaration of Conformity
The system should be powered down when not in use.
The Motherboard Express µATX generates, uses, and can radiate radio frequency energy and may cause harmful
interference to radio communications. However, there is no guarantee that interference will not occur in a particular
installation. If this equipment causes harmful interference to radio or television reception, which can be determined by
turning the equipment off or on, you are encouraged to try to correct the interference by one or more of the following
measures:
• ensure attached cables do not lie across the card
• reorient the receiving antenna
• increase the distance between the equipment and the receiver
• connect the equipment into an outlet on a circuit different from that to which the receiver is connected
• consult the dealer or an experienced radio/TV technician for help.
Note
It is recommended that wherever possible shielded interface cables be used.

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Contents
ARM Motherboard Express µATX Technical
Reference Manual
Preface
About this book .......................................................................................................... vii
Feedback .................................................................................................................... xi
Chapter 1 Introduction
1.1 About the Motherboard Express µATX .................................................................... 1-2
1.2 Precautions .............................................................................................................. 1-5
Chapter 2 Hardware Description
2.1 Motherboard architecture and buses ....................................................................... 2-2
2.2 Power up, on/off and reset signals .......................................................................... 2-6
2.3 Clock architecture .................................................................................................... 2-9
2.4 Power ..................................................................................................................... 2-11
2.5 Peripherals and interfaces on the motherboard ..................................................... 2-12
2.6 Interrupt signals ..................................................................................................... 2-18
2.7 DMA signals ........................................................................................................... 2-20
2.8 JTAG and test connectors ..................................................................................... 2-21
Chapter 3 Configuration
3.1 Configuration environment ....................................................................................... 3-2
Chapter 4 Programmers Model
4.1 About this programmers model ................................................................................ 4-2
4.2 Memory maps .......................................................................................................... 4-3
4.3 Register summary .................................................................................................... 4-8
4.4 Register descriptions ............................................................................................. 4-10

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4.5 IO Peripherals and interfaces ................................................................................ 4-26
Appendix A Signal Descriptions
A.1 Audio CODEC interface ........................................................................................... A-2
A.2 UART interface ........................................................................................................ A-3
Appendix B Specifications
B.1 Timing specifications ............................................................................................... B-2
B.2 Electrical Specification ............................................................................................. B-7
Appendix C Revisions

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Preface
This Technical Reference Manual (TRM) is for the Motherboard Express µATX. It contains the
following sections:
•About this book on page vii
•Feedback on page xi.

Preface
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About this book
This book describes how to set up and use the Motherboard Express µAdvanced Technology
Extended (ATX).
The Motherboard Express µATX is part of the Versatile™Express family of boards that includes
the ARM®CoreTile Express and ARM®LogicTile Express daughterboards.
Product revision status
The rnpnidentifier indicates the revision status of the product described in this book, where:
rnIdentifies the major revision of the product.
pnIdentifies the minor revision or modification status of the product.
Intended audience
This document is written for experienced hardware and software developers to aid the
development of ARM-based products using the Motherboard Express µATX board as part of a
development system. It does not describe how to build new daughterboards for use with this
motherboard.
Using this book
This book is organized into the following chapters:
Chapter 1 Introduction
Read this for an overview of the motherboard.
Chapter 2 Hardware Description
Read this for a description of the hardware present on the motherboard.
Chapter 3 Configuration
Read this for a description of the configuration process.
Chapter 4 Programmers Model
Read this for a description of the peripheral registers on the motherboard.
Appendix A Signal Descriptions
Read this for a description of motherboard signals.
Appendix B Specifications
Read this for a description of the technical specifications for the motherboard.
Appendix C Revisions
Read this for a description of the technical changes between released issues of this
book.
Glossary
The ARM Glossary is a list of terms used in ARM documentation, together with definitions for
those terms. The ARM Glossary does not contain terms that are industry standard unless the
ARM meaning differs from the generally accepted meaning.
See ARM Glossary,
http://infocenter.arm.com/help/topic/com.arm.doc.aeg0014-/index.html
.

Preface
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Typographical Conventions
Conventions that this book can use are described in:
•Typographical
•Timing diagrams
•Signals on page ix.
Typographical
The typographical conventions are:
italic Highlights important notes, introduces special terminology, denotes
internal cross-references, and citations.
bold Highlights interface elements, such as menu names. Denotes signal
names. Also used for terms in descriptive lists, where appropriate.
monospace
Denotes text that you can enter at the keyboard, such as commands, file
and program names, and source code.
monospace
Denotes a permitted abbreviation for a command or option. You can enter
the underlined text instead of the full command or option name.
monospace
italic
Denotes arguments to monospace text where the argument is to be
replaced by a specific value.
monospace
bold
Denotes language keywords when used outside example code.
< and > Enclose replaceable terms for assembler syntax where they appear in code
or code fragments. For example:
MRC p15, 0 <Rd>, <CRn>, <CRm>, <Opcode_2>
Timing diagrams
The figure named Key to timing diagram conventions explains the components used in timing
diagrams. Variations, when they occur, have clear labels. You must not assume any timing
information that is not explicit in the diagrams.
Shaded bus and signal areas are undefined, so the bus or signal can assume any value within the
shaded area at that time. The actual level is unimportant and does not affect normal operation.
Key to timing diagram conventions
Clock
HIGH to LOW
Transient
HIGH/LOW to HIGH
Bus stable
Bus to high impedance
Bus change
High impedance to stable bus

Preface
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Timing diagrams sometimes show single-bit signals as HIGH and LOW at the same time and
they look similar to the bus change shown in Key to timing diagram conventions on page viii.
If a timing diagram shows a single-bit signal in this way then its value does not affect the
accompanying description.
Signals
The signal conventions are:
Signal level The level of an asserted signal depends on whether the signal is
active-HIGH or active-LOW. Asserted means:
• HIGH for active-HIGH signals.
• LOW for active-LOW signals.
Lower-case n At the start or end of a signal name denotes an active-LOW signal.
Additional reading
This section lists publications by ARM and by third parties.
See Infocenter,
http://infocenter.arm.com
, for access to ARM documentation.
See on ARM,
http://onarm.com
, for embedded software development resources including the
Cortex®Microcontroller Software Interface Standard (CMSIS).
ARM publications
This book contains information that is specific to this product.
The following publications are open access documents that provide information about ARM
Systems IP peripherals and controllers used in the motherboard:
•ARM®PrimeCell PS2 Keyboard/Mouse Interface (PL050) Technical Reference Manual
(ARM DDI 0143)
•ARM®PrimeCell Color LCD Controller (PL111) Technical Reference Manual
(ARM DDI 0293)
•ARM®PrimeCell Multimedia Card Interface (PL180) Technical Reference Manual
(ARM DDI 0172)
•ARM®PrimeCell Advanced Audio CODEC Interface (PL041) Technical Reference
Manual
(ARM DDI 0173)
•ARM®PrimeCell UART (PL011) Technical Reference Manual (ARM DDI 0183)
•ARM®PrimeCell Real Time Clock (PL031) Technical Reference Manual
(ARM DDI 0224)
•ARM®PrimeCell System Controller (SP810) Technical Reference Manual
(ARM DDI 0254)
•ARM®Dual-Timer Module (SP804) Technical Reference Manual (ARM DDI 0271)
•ARM®Watchdog Module (SP805) Technical Reference Manual (ARM DDI 0270).

Preface
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The following publications provide information about related ARM products and toolkits:
•ARM®CoreTile Express A9x4 Technical Reference Manual (ARM DUI 0448)
•ARM®CoreTile Express A5x2 Technical Reference Manual (ARM DUI 0541)
•ARM®CoreTile Express A15x2 Technical Reference Manual (ARM DUI 0604)
•ARM®CoreTile Express A15x2 A7x3 Technical Reference Manual (ARM DDI 0503)
•ARM®LogicTile Express 3MG Technical Reference Manual (ARM DUI 0449)
•ARM®LogicTile Express 13MG Technical Reference Manual (ARM DUI 0556)
•ARM®LogicTile Express 20MG Technical Reference Manual (ARM DDI 0498)
•ARM®Versatile™Express Configuration Technical Reference Manual (ARM DDI 0496)
•ARM®Versatile™Express Boot Monitor Reference Manual (ARM DUI 0465)
•RealView Debugger User Guide (ARM DUI 0153)
•RealView ICE and RealView Trace User Guide (ARM DUI 0155)
•RealView Compilation Tools Developer Guide (ARM DUI 0203)
•RealView Compilation Tools Compilers and Libraries Guide (ARM DUI 0205)
•RealView Compilation Tools Linker and Utilities Guide (ARM DUI 0206)
Other publications
This section lists relevant documents published by third parties:
•IEEE Standard Test Access Port and Boundary Scan Architecture (IEEE Std. 1149.1)
•PCI-Express External Cable 1.0 Specification
•VESA DDC Specification. Version 3.0
•ISP1761 Hi-Speed Universal Serial Bus On-The-Go controller data sheet
•National Semiconductor LM4549 data sheet.

Preface
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Feedback
ARM welcomes feedback on this product and its documentation.
Feedback on this product
If you have any comments or suggestions about this product, contact your supplier and give:
• The product name.
• The product revision or version.
• An explanation with as much information as you can provide. Include symptoms and
diagnostic procedures if appropriate.
Feedback on content
If you have comments on content then send an e-mail to
. Give:
• the title
• the number, ARM DUI 0447J
• the page numbers to which your comments apply
• a concise explanation of your comments.
ARM also welcomes general suggestions for additions and improvements.

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Chapter 1
Introduction
This chapter introduces the Motherboard Express µATX. It contains the following sections:
•About the Motherboard Express µATX on page 1-2
•Precautions on page 1-5.

Introduction
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1.1 About the Motherboard Express µATX
The Motherboard Express µATX is the basis for a highly integrated software and hardware
development system based on the ARM SMP architecture.
The motherboard provides the following features:
• Peripherals for multimedia or networking environments.
• All motherboard peripherals and functions are accessed through a static memory bus to
simplify access from daughterboards.
• High-performance PCI-Express slots for expansion cards.
• Consistent memory maps with different CoreTile daughterboards simplify software
development and porting.
• Automatic detection and configuration of attached CoreTile Express and LogicTile
Express daughterboards.
• Automatic shutdown for over-temperature or power supply failure.
• System is unable to power up if the daughterboards cannot be configured.
• Power sequencing of system.
• Supports drag and drop file update of configuration files.
• Uses either a 12V power-supply unit or an external ATX power supply.
• Supports LogicTile and CoreTile daughterboards to provide custom peripherals, or early
access to ARM core or cluster designs, or production test chips. Supports test chips with
an IO voltage range of 0.8-3.3 volts.
Figure 1-1 on page 1-3 shows the layout of the motherboard with the JTAG cable to the CoreTile
Express JTAG connector and the enclosure power cable to the ATX connector.

Introduction
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Figure 1-1 Motherboard layout
PCI Express slots
User LEDs
ATX PSU connector
(with plug from
enclosure connector)
CoreTile Express
daughterboard
LogicTile Express
daughterboard
Micro SDCard
(configuration
memory)
D0
OTGON
USB2ON
USB3ON
5VOK
3.3VOK
SB
D7
ILA
Battery
(MCC
RTCC)
Back panel connectors
Manufacturing
Test
Debug JTAG
(to Core Tile Express)
USB status
LEDs
Test (ILA)
Voltage status
LEDs
Case fan
(12V)

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1.1.1 Back panel connectors
Figure 1-2 shows the ATX rear panel that provides:
• Power supply connector.
• Keyboard and mouse interface, PS/2.
• Ethernet interface.
• Two USB 2.0 ports.
• One USB OTG port.
• USB-B device connector for loading configuration files.
• Audio interface, containing analog microphone-in, line-in, and line-out.
• Four RS232 serial ports.
• Video interface, DVI-I supports analog and digital, and digital audio.
• JTAG connector, to CoreTile Express JTAG connector.
• Configuration, ON/OFF/Soft Reset and Hardware Reset
• SD/MMC memory card interface connector.
• Status LEDs for ready, power on, and USB-B activity.
• Compact Flash connector.
•
Figure 1-2 ATX back panel
Note
There are two reset buttons:
ON/OFF/Soft Reset
This is colored red and is a system power ON/OFF and Software Reset push
button.
Hardware RESET
This is colored black and is a Hardware Reset push button.
You can use both push buttons to put the system into Standby State, but only the ON/OFF
button can power up the system. For more information, see Power up, on/off and reset
signals on page 2-6.
ARM JTAG
debug
(to Core Tile)
Audio
line in
Audio
line out
Audio
microphone
DVI-I/VGA
UART 0
UART 1
UART 2
UART 3
10/100
Ethernet
USB-A (2)
USB-A (3)
PS2
Mouse
PS2
Keyboard
Power
(to external
12V power
supply)
Compact
Flash slot
OTG
(USB 1)
SD card
slot
ON/OFF/
Soft Reset
Hardware
RESET
Boot option
switches
USB-B configuration
Flash Drive
(to PC)
USB-B
activity LED
Power on
LED
Ready
LED
Case
fan
SW[0] SW[1]

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1.2 Precautions
This section contains safety information and advice on how to avoid damage to the
motherboard.
1.2.1 Ensuring safety
The motherboard is powered from an ATX power supply unit within the ATX enclosure.
Warning
To avoid a safety hazard:
• To use the motherboard in its supplied plastic enclosure, only use the supplied 12V power
supply unit to provide power to the connector on the enclosure.
• To use an ATX power supply, remove the top cover from the enclosure and use an ATX
power supply to provide power to the motherboard ATX connector. This option is
typically used to provide access to the PCI-Express sites.
1.2.2 Preventing damage
The motherboard is intended for use in a laboratory or engineering development environment.
If removed from its enclosure, the board becomes more sensitive to electrostatic discharges and
generates increased electromagnetic emissions. Removing the board from the enclosure also
results in flexing that fractures the printed-circuit board connections to the components.
Caution
To avoid damage, observe the following precautions:
• Never subject the board to high electrostatic potentials.
• Always wear a grounding strap when touching the board in or away from its enclosure.
• Avoid touching the component pins or any other metallic element.
• Always power down the board when connecting daughterboards, memory expansion
boards, or making external connections.
• Do not remove the board from its enclosure.
Caution
Do not use near equipment that is:
• Sensitive to electromagnetic emissions, for example medical equipment.
• A transmitter of electromagnetic emissions.

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Chapter 2
Hardware Description
This chapter describes the hardware on the Motherboard Express µATX. It contains the
following sections:
•Motherboard architecture and buses on page 2-2
•Power up, on/off and reset signals on page 2-6
•Clock architecture on page 2-9
•Power on page 2-11
•Peripherals and interfaces on the motherboard on page 2-12
•Interrupt signals on page 2-18
•DMA signals on page 2-20
•JTAG and test connectors on page 2-21.

Hardware Description
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2.1 Motherboard architecture and buses
Figure 2-1 shows a motherboard with attached Tile Express and LogicTile Express
daughterboards.
Figure 2-1 System architecture block diagram
The major system components and interfaces that the motherboard provides are:
• A dedicated Motherboard Configuration Controller (MCC) configures the motherboard
and all attached daughterboards.
• IO FPGA that uses a static memory interface to access standard peripherals.
• Multiplex FPGA that selects the source for the audio and video signals to the DVI
connector.
• Two daughterboard slots, one for a CoreTile Express board and one for LogicTile Express
board.
CoreTile Express
(daughterboard site 1)
LogicTile Express
(daughterboard site 2)
HDRY HDRX
Motherboard Express μATX
HDRY1 HDRX1 HDRY2HDRX2
HDRX HDRY
SB
MMB
SMB
Motherboard IO FPGA
SB
Test chip
Daughterboard
Configuration
Controller
Motherboard
Configuration
Controller
(MCC)
CB CB
HSB (M)
HSB (S)
HSB (M)
HSB (S) PCIe
Multiplexer
FPGA
PCI-Express
Switch
FPGA
PCIe
Slots
DVI
USB Configuration
flash memory
(USBMSD)
ZBT
memory
DDR2
memory
SMB1 SMB2
MMB1
MMB2
PCIe1
PCIe2
(configuration) Peripheral connectors
(LAN, USB, OTG, UARTs, CF,
SD/MMC, KMI, AACI)
Video
SRAM LAN USB
NOR
flash
SB
MMB
SMB
PCIe
CB
User
SRAM
Daughterboard
Configuration
Controller

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• High-speed bus interconnect between daughterboards with support for Low-Voltage
Differential Signalling (LVDS).
• Bus interfaces between motherboard and daughterboards for PCIe, Static Memory,
MultiMedia, and System Bus, interrupts.
• Power circuitry with (VIO) voltage from 0.8V-3.3V to enable interfacing with a wide
range of devices.
• Four PCI Express Gen 1 slots, each supporting four lanes.
• MMC/SD card slot.
• Compact Flash slot.
• Four UARTs.
• Three USB interfaces providing one OTG slave and two standard USB 2.0 host ports.
• DVI connector with analogue and digital video support at 1080p, I2S, SPDIF digital audio
support for HDMI.
• Ethernet interface.
• PS2 Keyboard and Mouse.
• AC97 Audio CODEC with Audio in, Audio out, and MIC in.
• USB-B configuration port that accesses the motherboard configuration flash memory and
emulates it as a USB Mass Storage Device (USBMSD).
•ON/OFF/Soft Reset and Hardware RESET push buttons and Power and Status LEDs.
• 2 x 64MB of user NOR Flash.
• 32MB of user SRAM.
• 8MB of local Video SRAM.

Hardware Description
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2.1.1 Motherboard buses
The motherboard architecture uses the following buses:
•Configuration Bus
•Static Memory Bus
•System Bus
•MultiMedia Bus
•High-Speed Bus on page 2-5
•PCIe Bus on page 2-5.
Figure 2-1 on page 2-2 shows how these buses interconnect.
Configuration Bus
The Motherboard Configuration Controller (MCC) and Daughterboard Configuration
Controller use the Configuration Bus (CB) to determine the functionality and capabilities of the
daughterboards before powering up and releasing the resets. This minimizes the chance of
damage to the boards. The CB controls the power and reset sequence. It also updates the FPGA
images and software on the daughterboards.
Static Memory Bus
The underlying architecture uses the Static Memory Bus (SMB) for all peripheral and memory
accesses from the daughterboards to the motherboard. A Static Memory Controller in the
daughterboard outputs chip select signals to access memory and peripherals on the
motherboard. The memory controller determines the base address for each chip select. See IO
Peripherals and interfaces on page 4-26.
Note
• Site 2 has limited access to the motherboard.
• Site 2 can only access the motherboard using chip select nCS7, peripherals, and nCS3,
Video SRAM only.
System Bus
The System Bus connects interrupts and DMAs:
• From the motherboard peripherals to the daughterboards.
• Between the daughterboards.
MultiMedia Bus
The MultiMedia Bus (MMB) enables the motherboard or either daughterboard to drive audio
and video data to the DVI connector. A dedicated FPGA manages multiplexing the sources and
driving the outputs to the HDMI transmitter.
The motherboard supports:
• Video with 25 to 165MHz pixel clock, DTV 480p to 1080p, or PC 640x480 to 1600x1200,
VGA to UXGA
• Audio S/PDIF interface with 2 channels at 192kHz or I2S interface with eight channels at
96kHz.
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