ARM Musca-S1 Product manual

Arm® Musca-S1 Test Chip and Board
Technical Reference Manual
Copyright © 2019, 2020 Arm Limited or its affiliates. All rights reserved.
101835_0000_01_en

Arm® Musca-S1 Test Chip and Board
Technical Reference Manual
Copyright © 2019, 2020 Arm Limited or its affiliates. All rights reserved.
Release Information
Document History
Issue Date Confidentiality Change
0000-00 02 December 2019 Non-Confidential First issue
0000-01 18 May 2020 Non-Confidential Second issue
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(LES-PRE-20349)
Arm® Musca-S1 Test Chip and Board
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Confidentiality Status
This document is Non-Confidential. The right to use, copy and disclose this document may be subject to license restrictions in
accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to.
Unrestricted Access is an Arm internal classification.
Product Status
The information in this document is Final, that is for a developed product.
Web Address
www.arm.com
Conformance Notices
This section contains conformance notices.
Federal Communications Commission Notice
This device is test equipment and consequently is exempt from part 15 of the FCC Rules under section 15.103 (c).
CE Conformity
The Waste Electrical and Electronic Equipment (WEEE) marking, that is, the crossed out wheelie-bin figure, indicates that this
product must not be disposed of with general waste within the European Union. To prevent possible harm to the environment from
uncontrolled waste disposal, the user is required to recycle the product responsibly to promote reuse of material resources. To
comply with EU law, you must dispose of the product in one of the following ways:
• Return it to the distributer where it was purchased. The distributer is required to arrange free collection when requested.
• Recycle it using local WEEE recycling facilities. These facilities are now very common and might provide free collection.
• If purchased directly from Arm, Arm provides free collection. Please e-mail [email protected] for instructions.
The CE Declaration of Conformity for this product is available on request.
The system should be powered down when not in use.
It is recommended that ESD precautions be taken when handling this product.
The product generates, uses, and can radiate radio frequency energy and may cause harmful interference to radio communications.
There is no guarantee that interference will not occur in a particular installation. If this equipment causes harmful interference to
radio or television reception, which can be determined by turning the equipment off or on, you are encouraged to try to correct the
interference by one or more of the following measures:
• Ensure attached cables do not lie across any sensitive equipment.
• Reorient the receiving antenna.
• Increase the distance between the equipment and the receiver.
• Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
• Consult the dealer or an experienced radio/TV technician for help.
Note
It is recommended that wherever possible shielded interface cables be used.
Arm® Musca-S1 Test Chip and Board
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Contents
Arm® Musca-S1 Test Chip and Board Technical
Reference Manual
Preface
About this book ...................................................... ...................................................... 7
Feedback .................................................................................................................... 10
Chapter 1 Introduction
1.1 Precautions .............................................................................................................. 1-12
1.2 About the Musca-S1 test chip and board ................................................................ 1-13
1.3 The Musca-S1 development board at a glance ........................... ........................... 1-14
1.4 Getting started .................................................... .................................................... 1-16
Chapter 2 Hardware description
2.1 Board hardware ................................................... ................................................... 2-18
2.2 Musca-S1 test chip .................................................................................................. 2-20
2.3 Software, firmware, board, and tools setup .............................. .............................. 2-25
2.4 User components and status LEDs .................................... .................................... 2-27
2.5 Clocks ...................................................................................................................... 2-28
2.6 CryptoCell™-312 and One Time Programmable security system .............. .............. 2-32
2.7 Resets and powerup ................................................................................................ 2-33
2.8 Power ...................................................................................................................... 2-34
2.9 I2C interfaces and sensors ...................................................................................... 2-37
2.10 Arduino Expansion Shield interface .................................... .................................... 2-38
2.11 Boot memory ..................................................... ..................................................... 2-40
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2.12 DAPLink controller ................................................. ................................................. 2-41
2.13 Debug ...................................................................................................................... 2-42
Chapter 3 Programmers model
3.1 About this programmers model ....................................... ....................................... 3-44
3.2 Memory maps .......................................................................................................... 3-45
3.3 Processor elements ................................................ ................................................ 3-54
3.4 Base element ..................................................... ..................................................... 3-61
3.5 System control element ............................................. ............................................. 3-97
3.6 SSE-200 subsystem debug system ................................... ................................... 3-103
3.7 Real Time Clock .................................................................................................... 3-107
3.8 General-purpose timer ............................................. ............................................. 3-108
3.9 PVT sensor registers .............................................. .............................................. 3-113
3.10 CryptoCell™-312 and One-Time Programmable (OTP) secure memory locations 3-121
3.11 Serial Configuration Control registers .................................................................... 3-122
3.12 UART control registers .......................................................................................... 3-171
3.13 GPIO control registers ............................................. ............................................. 3-174
3.14 Third-party IP .................................................... .................................................... 3-176
Appendix A Signal descriptions
A.1 Arduino Expansion Shield connectors ............................ ............................ Appx-A-178
A.2 Debug connector ............................................ ............................................ Appx-A-181
A.3 USB connector .............................................. .............................................. Appx-A-182
Appendix B Hardware bug software workaround
B.1 S1 Secure and Non-secure privilege registers hardware bug .......... .......... Appx-B-184
Appendix C PVT sensors
C.1 PVT sensors ................................................................................................ Appx-C-187
Appendix D IP configuration
D.1 IP configuration ............................................................................................ Appx-D-190
Appendix E Specifications
E.1 Electrical specifications ................................................................................ Appx-E-192
Appendix F Revisions
F.1 Revisions .................................................. .................................................. Appx-F-194
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reserved.
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Non-Confidential

Preface
This preface introduces the Arm® Musca-S1 Test Chip and Board Technical Reference Manual.
It contains the following:
•About this book on page 7.
•Feedback on page 10.
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reserved.
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Non-Confidential

About this book
This book describes the Arm® Musca‑S1 test chip and board.
Intended audience
This book is written for experienced hardware and software developers to enable low-power, secure
Internet of Things (IoT) endpoint development using the Musca‑S1 test chip and board.
Using this book
This book is organized into the following chapters:
Chapter 1 Introduction
This chapter introduces the Musca‑S1 test chip and Musca‑S1 development board.
Chapter 2 Hardware description
This chapter describes the Musca‑S1 test chip and Musca‑S1 development board.
Chapter 3 Programmers model
This chapter describes the programmers model of the Musca‑S1 test chip and board.
Appendix A Signal descriptions
This appendix describes the signals that are present at the board interface connectors.
Appendix B Hardware bug software workaround
This appendix describes a software workaround for hardware bugs in Secure and Non‑secure
privilege registers.
Appendix C PVT sensors
This appendix describes the Process, Voltage, and Temperature (PVT) sensors on the Musca‑S1
test chip.
Appendix D IP configuration
This appendix describes the IP configuration of the Musca‑S1 test chip.
Appendix E Specifications
This appendix contains electrical specifications of the Musca‑S1 development board.
Appendix F Revisions
This appendix describes the technical changes between released issues of this book.
Glossary
The Arm® Glossary is a list of terms used in Arm documentation, together with definitions for those
terms. The Arm Glossary does not contain terms that are industry standard unless the Arm meaning
differs from the generally accepted meaning.
See the Arm® Glossary for more information.
Typographic conventions
italic
Introduces special terminology, denotes cross-references, and citations.
bold
Highlights interface elements, such as menu names. Denotes signal names. Also used for terms
in descriptive lists, where appropriate.
monospace
Denotes text that you can enter at the keyboard, such as commands, file and program names,
and source code.
Preface
About this book
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monospace
Denotes a permitted abbreviation for a command or option. You can enter the underlined text
instead of the full command or option name.
monospace italic
Denotes arguments to monospace text where the argument is to be replaced by a specific value.
monospace bold
Denotes language keywords when used outside example code.
<and>
Encloses replaceable terms for assembler syntax where they appear in code or code fragments.
For example:
MRC p15, 0, <Rd>, <CRn>, <CRm>, <Opcode_2>
SMALL CAPITALS
Used in body text for a few terms that have specific technical meanings, that are defined in the
Arm® Glossary. For example, IMPLEMENTATION DEFINED, IMPLEMENTATION SPECIFIC, UNKNOWN, and
UNPREDICTABLE.
Timing diagrams
The following figure explains the components used in timing diagrams. Variations, when they occur,
have clear labels. You must not assume any timing information that is not explicit in the diagrams.
Shaded bus and signal areas are undefined, so the bus or signal can assume any value within the shaded
area at that time. The actual level is unimportant and does not affect normal operation.
Clock
HIGH to LOW
Transient
HIGH/LOW to HIGH
Bus stable
Bus to high impedance
Bus change
High impedance to stable bus
Figure 1 Key to timing diagram conventions
Signals
The signal conventions are:
Signal level
The level of an asserted signal depends on whether the signal is active-HIGH or active-LOW.
Asserted means:
• HIGH for active-HIGH signals.
• LOW for active-LOW signals.
Lowercase n
At the start or end of a signal name, n denotes an active-LOW signal.
Additional reading
This book contains information that is specific to this product. See the following documents for other
relevant information.
Preface
About this book
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reserved.
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Arm publications
•Arm® Musca ‑ S1 Test Chip and Board Technical Overview (101756)
•Arm® CoreLink™ SSE ‑ 200 Subsystem for Embedded Technical Overview (r1p0) (101123).
•Arm® CoreLink™ SSE ‑ 200 Subsystem for Embedded Technical Reference Manual (r1p0)
(101104).
•Arm® CoreLink™ SIE ‑ 200 System IP for Embedded Technical Reference Manual (DDI 0571).
•Arm® Cortex® ‑ M System Design Kit Technical Reference Manual (DDI 0479).
•Arm® Cortex® ‑ M33 Processor Technical Reference Manual (r0p2) (100230).
•PrimeCell UART (PL011) Technical Reference Manual (DDI 0183).
•Arm® PrimeCell Real Time Clock (PL031) Technical Reference Manual (DDI 0224).
•CoreSight™ Components Technical Reference Manual (Arm DDI 0314).
•Arm® DS-5 Arm DSTREAM User Guide (Arm DUI 0481).
•Arm® DS-5 Using the Debug Hardware Configuration Utilities (Arm DUI 0498).
The following confidential books are only available to licensees or require registration with
Arm.
•Arm® CryptoCell ‑ 312 Technical Reference Manual (r1p0) (100774).
•Arm® v7 ‑ M Architecture Reference Manual (Arm DDI 0403).
•Arm® v8 ‑ M Architecture Reference Manual (Arm DDI 0553)
•Arm® AMBA® 5 AHB Protocol Specification (Arm IHI 0033).
•Arm® AMBA® APB Protocol Specification Version 2.0 (Arm IHI 0024).
Preface
About this book
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reserved.
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Feedback
Feedback on this product
If you have any comments or suggestions about this product, contact your supplier and give:
• The product name.
• The product revision or version.
• An explanation with as much information as you can provide. Include symptoms and diagnostic
procedures if appropriate.
Feedback on content
If you have comments on content then send an e-mail to [email protected]. Give:
• The title Arm Musca-S1 Test Chip and Board Technical Reference Manual.
• The number 101835_0000_01_en.
• If applicable, the page number(s) to which your comments refer.
• A concise explanation of your comments.
Arm also welcomes general suggestions for additions and improvements.
Note
Arm tests the PDF only in Adobe Acrobat and Acrobat Reader, and cannot guarantee the quality of the
represented document when used with any other PDF reader.
Preface
Feedback
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Chapter 1
Introduction
This chapter introduces the Musca‑S1 test chip and Musca‑S1 development board.
It contains the following sections:
•1.1 Precautions on page 1-12.
•1.2 About the Musca-S1 test chip and board on page 1-13.
•1.3 The Musca ‑ S1 development board at a glance on page 1-14.
•1.4 Getting started on page 1-16.
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1.1 Precautions
This section describes precautions that ensure safety and prevent damage to your Musca‑S1 development
board.
This section contains the following subsections:
•1.1.1 Ensuring safety on page 1-12.
•1.1.2 Operating temperature on page 1-12.
•1.1.3 Preventing damage on page 1-12.
1.1.1 Ensuring safety
The Musca‑S1 development board operates at 5V supplied through the DAPLink 5V USB connector.
warn
Do not use the Musca‑S1 development board near equipment that is sensitive to electromagnetic
emissions, for example, medical equipment.
1.1.2 Operating temperature
The Musca‑S1 development board has been tested in the temperature range 15°C‑30°C.
1.1.3 Preventing damage
The Musca‑S1 development board is intended for use within a laboratory or engineering development
environment.
Caution
To avoid damage to the Musca‑S1 development board, observe the following precautions:
• Never subject the board to high electrostatic potentials. Observe ElectroStatic Discharge (ESD)
precautions when handling any board.
• Always wear a grounding strap when handling the board.
• Only hold the board by the edges.
• Avoid touching the component pins or any other metallic element.
• Do not fit an Arduino Expansion Shield while the Musca‑S1 development board is powered up.
1 Introduction
1.1 Precautions
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1.2 About the Musca-S1 test chip and board
The Musca‑S1 development board provides access to the Musca‑S1 test chip.
Musca-S1 test chip and board
The Musca‑S1 test chip demonstrates the foundation of single-chip secure Internet of Things (IoT)
endpoints. The architecture integrates the recommendations of Platform Security Architecture (PSA)
using the same subsystem as Musca-A (Arm CoreLink SSE‑200 Subsystem for Embedded) but with the
addition of:
• Dual on-chip eMRAM and SRAM.
• Secure memory subsystems.
• PSA Level 1 and Functional API certification.
The Musca‑S1 test chip implements a SSE-200 subsystem (r1p0) in Samsung Foundry 28nm, Fully
Depleted Silicon on Insulator process (28FDS). The implementation is ready to be used to form the core
processing element of energy-efficiency mainstream IoT devices with secure PSA Root-of-Trust (RoT).
Musca-S1 can also be used to prototype secure boot, on-chip storage execution and network device
management through Trusted Firmware-M (TF-M), Arm Mbed™ OS, and Arm Pelion™ IoT platform
integration.
The Musca‑S1 development platform is bootable from on-chip eMRAM or off-chip QSPI (on-board
Flash.
Major components and systems
The Musca‑S1 development board provides the following main features:
• Musca‑S1 test chip that includes, but is not limited to, the following:
— CoreLink SSE‑200 subsystem that contains two Arm Cortex‑M33 (r0p2) processors.
— 2MB on-chip eMRAM.
— 2MB on-chip Code SRAM.
— Peripheral and Arduino Expansion Shield interfaces.
• On-board DAPLink that provides the following access:
— Serial Wire or JTAG Debug Port (SWJ-DP).
— USB Mass Storage Device (USBMSD) for uploading new firmware.
— USB serial port. The UART to the DAPLink does not support hardware flow control.
— Remote reset.
• On-board:
— 3-axis orientation and motion sensor (gyro sensor).
— Temperature sensor/ADC/DAC.
— Quad Serial Peripheral Interface (QSPI) 32MB boot flash.
• P-JTAG processor debug and SWD header.
• User RGB LED, status LEDs, user reset, and On/Off push buttons.
• The board is powered from USB 5V power or Li-ion rechargeable battery backup, battery not
supplied, selectable by a jumper link.
• Headers for Arduino Expansion Shield to support development of custom designs:
— 16 3V3 or 1V8 GPIO.
— UART.
— SPI.
— I2C.
— I2S three-channel, master only.
— 3-channel Pulse Width Modulation (PWM).
— 6-channel analog interface from the on-board combined ADC, DAC, and GPIO.
1 Introduction
1.2 About the Musca-S1 test chip and board
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1.3 The Musca-S1 development board at a glance
The following figure shows the physical layout of the upper face of the Musca‑S1 development board.
Figure 1-1 Musca-S1 development board
Note
The figure shows the functions that are multiplexed onto the Musca‑S1 test chip I/O and which are
available on the Arduino Expansion Shield.
See the following for more information:
•2.2.2 Test chip multiplexed I/O on page 2-23
•3.11.1 IOMUX registers on page 3-122
The following table describes the Musca‑S1 development board components.
Table 1-1 Board components
Component Comment
Musca‑S1 test chip Samsung Foundry 28FDS eMRAM-enabled Internet of Things (IoT) test chip.
Boot selector slider switch eMRAM or QSPI
Expansion Shield analog I/O connector 1V8 or 3V3 I/O. Selected by jumper link J12.
1 Introduction
1.3 The Musca-S1 development board at a glance
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Table 1-1 Board components (continued)
Component Comment
Expansion Shield power and voltage reference
connector
-
Jumper link. Expansion Shield I/O voltage
selector J12.
1V8 or 3V3. Default 3V3.
Jumper link. Expansion Shield power supply
selector J19.
Battery or USB. Default USB. Use with jumper link J18.
Jumper link. Board power supply selector J18. Battery or USB. Use with jumper link J19. Default USB.
1V0 supply test point Musca‑S1 test chip core power supply.
ISP push button DAPLink update To update DAPLink.
On/Off push button (PBON) Labeled PBON on board
Cortex‑M33 system reset and CoreSight
component rest (nSRST)
Labeled nRST on board
ON LED Green system LED. Board power supplies are active.
Next to nRST button.
CHRG LED Orange system LED. Li-ion battery charging in progress.
Next to ON LED.
DAP LED Blue system LED. DAP activity.
Next to CHRG LED.
COM LED Green system LED. USB UART activity.
Next to DAP LED.
PWR LED Orange system LED. Power is connected.
Next to COM LED.
RGB user LED Jumper 2 connects red to GPIO[2] and to Expansion Shield digital I/O connector
1 (17).
Jumper 3 connects green to GPIO[3] and to Expansion Shield digital I/O
connector 1 (17).
Jumper 4 connects blue to GPIO[4]v and to Expansion Shield digital I/O
connector 1 (17).
Next to PWR LED.
CoreSight debug connector SWJ-DP
USB mini B connector -
Expansion Shield digital I/O connector Jumper J12 selects 1V8 or 3V3.
1 Introduction
1.3 The Musca-S1 development board at a glance
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1.4 Getting started
The Musca‑S1 development board is controlled from a USB port that supports UART, Mass Storage
Device (MSD), and CoreSight debug connection methods.
The board is factory-programmed with the DAPLink firmware and binary QSPI image to enable bootup.
Powering up into the operating state
The minimum actions to boot the development board are as follows:
1. Set the boot select switch to QSPI.
2. Connect a USB cable to the board.
3. Press the PBON button.
4. Connect a serial terminal to the USB UART. The serial port settings must be:
• 115.2kBaud.
• 8N1.
• No hardware or software flow control.
To load a new user image, drag and drop the new image onto the drive labeled MUSCA_S.
1 Introduction
1.4 Getting started
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Chapter 2
Hardware description
This chapter describes the Musca‑S1 test chip and Musca‑S1 development board.
It contains the following sections:
•2.1 Board hardware on page 2-18.
•2.2 Musca-S1 test chip on page 2-20.
•2.3 Software, firmware, board, and tools setup on page 2-25.
•2.4 User components and status LEDs on page 2-27.
•2.5 Clocks on page 2-28.
•2.6 CryptoCell™-312 and One Time Programmable security system on page 2-32.
•2.7 Resets and powerup on page 2-33.
•2.8 Power on page 2-34.
•2.9 I2C interfaces and sensors on page 2-37.
•2.10 Arduino Expansion Shield interface on page 2-38.
•2.11 Boot memory on page 2-40.
•2.12 DAPLink controller on page 2-41.
•2.13 Debug on page 2-42.
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2.1 Board hardware
The hardware infrastructure of the Musca‑S1 development board provides access to the Musca‑S1 test
chip and supports Shield expansion.
Overview of the Musca-S1 development board hardware
The test chip interfaces connect directly between the test chip and the peripheral devices on the board,
and between test chip and the Shield headers.
The following figure shows the hardware infrastructure of the Musca‑S1 development board.
Musca-S1 board
Musca-S1 test chip
CoreLink
SSE-200
AHB
APB
SWJ-DP
UART
I2C
SPI
UART
I2S
PWM
GPIO[4:2]
User
LEDs
SCC
QSPI
I2C
Gyro
ADC
DAC
Temp
GPIO
DAPLink
controller
QSPI
32MB QSPI
Resets
AN[5:0]
PSUs
nSRST
User
push
buttons
USB
ISP
PBON
JTAG
debug
connector
GPIO
Mux
Expansion
Shield
eMRAM
2MB
GPIO[15:0]
3V3-1V8
3V3-1V8
1V8-3V3
SRAM
2MB
Figure 2-1 Hardware infrastructure of the Musca-S1 development board
Musca-S1 development board components and systems
The development board contains the following components and systems:
• One Musca‑S1 test chip with CoreLink SSE-200 Subsystem for Embedded (r1p0). The SSE-200
subsystem includes, but is not limited to, the following:
— CPU0: One Cortex‑M33 (r0p2) processor. Floating-point unit (FPU), DSP, no coprocessor.
— CPU1: One Cortex‑M33 (r0p2) processor. FPU, DSP, no coprocessor. Clock system enables
operation at ×N speed of CPU0 processor. Body-bias enabled transistors for low-power mode.
— One 2KB instruction cache and one 2KB data cache for each processor.
— 4 × 128KB SRAM. One 128KB bank, SRAM3, functions as Tightly ‑ Coupled Memory (TCM),
Tightly‑Coupled to CPU1 and operates at CPU1 clock speed.
2 Hardware description
2.1 Board hardware
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— CryptoCell™-312 (r1p0) with 1Kbyte One Time Programming (OTP) emulated using simple
registers that are reset by powerup only.
— Timer, Watchdog peripherals, and system control.
The following on-chip blocks are outside the SSE-200 subsystem.
— 2MB Code SRAM.
— 2×1MB eMRAM.
— Clock system. Input clock sources from development board.
• Arduino Shield expansion with on-board level converters and a jumper link to enable the Shield
voltage to be either the SoC voltage, 1V8, or 3V3. Enables custom designs by providing the
following interfaces:
— UART/USART.
— I2S, three-channel, master only.
— SPI.
— I2C.
— PWM.
— 6-channel analog interface from the on-board combined ADC, DAC, and GPIO.
— 16 1V8 or 3V3 GPIO.
— 1Hz clock.
• On-board DAPLink that enables the following functionality over USB:
— Serial Wire Debug (SWD).
— USB Mass Storage Device (USBMSD) for uploading new firmware.
— USB serial port. The UART to the DAPLink does not support hardware flow control.
— Remote reset.
• On-board gyro sensor:
— MMA7660FC 3-axis orientation and motion detection sensor.
— I2C interface to test chip.
• On-board combined ADC/DAC/temperature sensor:
— AD5593.
— 6-channel 3V3 ADC/DAC/GPIO interface to Arduino Shield.
— Temperature indicator.
• Programmable boot select:
— 32MB On-board QSPI boot flash.
— 2×1MB on-chip boot eMRAM.
— 2MB on-chip code SRAM, after being preloaded with execution code.
— Both Secure and Non‑secure access.
• Debug connector that provides access to:
— P-JTAG processor debug.
— Serial Wire Debug (SWD).
• User push-button:
— PBON On/Off push-button.
— nSRST: Cortex-M33 system reset and CoreSight component reset.
— ISP: Updates DAPLink firmware.
• RGB LED. Jumper connectors provide optional connections between the Arduino Expansion header
and the Musca‑S1 test chip:
— Red LED connected to GPIO[2] pin, optional PWM0.
— Green LED connected to GPIO[3] pin, optional PWM1.
— Blue LED connected to GPIO[4] pin, optional PWM2.
• Status LEDs.
• 5V USB or battery power, selectable by slider switch:
— DAPLink 5V USB connector.
— CLN 523450, Lithium Ion, 3.7V, 950mAh (not supplied).
Related information
1.3 The Musca ‑ S1 development board at a glance on page 1-14
2 Hardware description
2.1 Board hardware
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reserved.
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2.2 Musca-S1 test chip
The Musca‑S1 test chip is based on the SSE‑200 subsystem which features two Cortex‑M33 processors.
This section contains the following subsections:
•2.2.1 Overview of the Musca-S1 test chip on page 2-20.
•2.2.2 Test chip multiplexed I/O on page 2-23.
2.2.1 Overview of the Musca-S1 test chip
The SSE-200 subsystem is version r1p0 and the Cortex-M33 processors are version r0p2.
The test chip also implements a memory subsystem, external device interfaces, a clock generator, and
Serial Configuration Control (SCC) registers for setting default powerup values.
See the Arm® CoreLink™ SSE
‑ 200 Subsystem for Embedded Technical Reference Manual (r1p0) for more
information on the SSE-200 subsystem:
The following figure shows a high-level view of the architecture of the Musca‑S1 test chip.
2 Hardware description
2.2 Musca-S1 test chip
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reserved.
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