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DECA User Manual
1
www.terasic.com
May 22, 2015

DECA User Manual
1
www.terasic.com
May 22, 2015
CONTENTS
Chapter 1 DECA Development Kit.............................................................. 3
1.1 Package Contents .......................................................................................................................3
1.2 DECA System CD......................................................................................................................4
1.3 Getting Help...............................................................................................................................4
Chapter 2 Introduction of the DECA Board.................................................... 5
2.1 Layout and Components.............................................................................................................5
2.2 Block Diagram of the DECA Board...........................................................................................7
Chapter 3 Using the DECA Board............................................................... 10
3.1 Configuration of MAX 10 FPGAon DECA............................................................................10
3.2 Board Status Elements..............................................................................................................16
3.3 Clock Circuitry.........................................................................................................................17
3.4 Peripherals Connected to the FPGA.........................................................................................18
Chapter 4 DECA System Builder ................................................................ 44
4.1 Introduction..............................................................................................................................44
4.2 General Design Flow................................................................................................................44
4.3 Using DECA System Builder...................................................................................................45
Chapter 5 RTL Example Codes .................................................................. 51
5.1 Breathing LED .........................................................................................................................51
5.2 User IO and CLOCK................................................................................................................53
5.3 Humidity and Temperature Measure........................................................................................56
5.4 Power Monitor..........................................................................................................................58
5.5 Proximity/Ambient Light Sensor .............................................................................................61
5.6 G-Sensor...................................................................................................................................63

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5.7 Line-In ADC.............................................................................................................................65
5.8 HDMI TX.................................................................................................................................68
Chapter 6 NIOS Based Example Codes ..................................................... 73
6.1 CapSense Button......................................................................................................................73
6.2 Temperature Sensor..................................................................................................................76
6.3 Power Monitor..........................................................................................................................78
6.4 Humidity/Temperature Sensor .................................................................................................80
6.5 G-Sensor...................................................................................................................................82
6.6 SMAADC................................................................................................................................84
6.7 DDR3 SDRAM Test by Nios II................................................................................................87
Chapter 7 Advanced NIOS Based Example Codes ..................................... 91
7.1 HDMI Video/Audio TX ...........................................................................................................91
7.2 Gesture Light Sensor................................................................................................................96
7.3 Ethernet Socket server............................................................................................................100
7.4 Micro SD Card file system read.............................................................................................108
7.5 Audio......................................................................................................................................112
7.6 USB Port Interface.................................................................................................................114
Chapter 8 Programming the Configuration Flash Memory........................... 120
8.1 Internal Configuration............................................................................................................120
8.2 Factory Default Dual Boot Image..........................................................................................122
8.3 Using Dual Compressed Images ............................................................................................122
Chapter 9 Appendix ................................................................................... 133
9.1 Revision History.....................................................................................................................133
9.2 Copyright Statement...............................................................................................................133

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May 22, 2015
Chapter 1
DECA Development Kit
The DECA Development Kit presents a robust hardware design platform built around the Altera
MAX 10 FPGA, which is the industry’s first single chip, non-volatile programmable logic devices
(PLDs) to integrate the optimal set of system components. Users can now leverage the power of
tremendous re-configurability paired with a high-performance, low-power FPGA system. Providing
internally stored dual images with self-configuration, comprehensive design protection features,
integrated ADCs and hardware to implement the Nios II 32-bit microcontroller IP, MAX10 devices
are ideal solution for system management, I/O expansion, communication control planes, industrial,
automotive and consumer applications. The DECA development board is equipped with high-speed
DDR3 memory, video and audio capabilities, Ethernet networking, and much more that promise
many exciting applications.
The DECA Development Kit contains all the tools needed to use the board in conjunction with a
computer that runs the Microsoft Windows XP or later.
1
1. .1 1 P Pa ac ck ka ag ge e C Co on nt te en nt ts s
Figure 1-1 shows a photograph of the DECA package.
Figure 1-1 The DECA package contents

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The DECA package includes:
The DECA development board
DECA Quick Start Guide
Two USB cables (Type A to Mini-B) for USB control and FPGA programming and control
Wifi-ble Module
AR0833 8.0M Camera Module
5V DC power adapter
1
1. .2 2 D DE EC CA A S Sy ys st te em m C CD D
The DECA System CD contains all the documents and supporting materials associated with DECA,
including the user manual, system builder, reference designs, and device datasheets. Users can
download this system CD from the link: http://cd-deca.terasic.com.
1
1. .3 3 G Ge et tt ti in ng g H He el lp p
Here are the addresses where you can get help if you encounter any problems:
Altera Corporation
101 Innovation Drive San Jose, California, 95134 USA
Email: [email protected]
Terasic Technologies
9F., No.176, Sec.2, Gongdao 5th Rd, East Dist, Hsinchu City, 30070. Taiwan
Email: [email protected]
Tel.: [phone]
Website: deca.terasic.com

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Chapter 2
Introduction of the DECA Board
2
2. .1 1 L La ay yo ou ut t a an nd d C Co om mp po on ne en nt ts s
Figure 2-1 shows a photograph of the board. It depicts the layout of the board and indicates the
location of the connectors and key components.
Figure 2-1 DECA development board (top view)

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Figure 2-2 DECA development board (bottom view)
The DECA board has many features that allow users to implement a wide range of designed circuits,
from simple circuits to various multimedia projects.
The following hardware is provided on the board:
Altera MAX® 10 10M50DAF484C6G device
USB-Blaster II onboard for programming; JTAG Mode
512MB DDR3 SDRAM (16-bit data bus)
64MB QSPI Flash
Micro SD card socket
Two CapSense buttons
Two push-buttons
Two slide switches
Eight blue user LEDs
Three 50MHz clock sources from the clock generator
24-bit CD-quality audio CODEC with line-in, line-out jacks
HDMI TX, incorporates HDM v1.4 features, including 3D video supporting
One 10/100 Mbps Ethernet PHY with RJ45 connector
One USB 2.0 PHY with mini-USB type AB connector
One MIPI connector interface supports camera module application
One proximity/ambient lighter sensor
One humidity and temperature sensor
One temperature sensor
One accelerometer
Two MAX 10 FPGAADC SMA inputs

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Two 46-pin BBB expansion headers with 7 analog inputs connected to MAX10 ADC and 69
digital IOs
2
2. .2 2 B Bl lo oc ck k D Di ia ag gr ra am m o of f t th he e D DE EC CA A B Bo oa ar rd d
Figure 2-3 is the block diagram of the board. All the connections are established through the MAX
10 FPGA device to provide maximum flexibility for users. Users can configure the FPGA to
implement any system design.
Figure 2-3 Block diagram of DECA

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F
FP PG GA A D De ev vi ic ce e
MAX 10 10M50DAF484C6G Device
Integrated dual ADCs, eachADC supports 1 dedicated analog input and 8 dual function pins
50K programmable logic elements
1,638 Kbits embedded memory
5,888 Kbits user flash memory
4 fractional PLLs
C
Co on nf fi ig gu ur ra at ti io on n a an nd d D De eb bu ug g
Onboard USB-Blaster II (mini USB type B connector)
M
Me em mo or ry y D De ev vi ic ce e
512MB DDR3 SDRAM (16-bit data bus)
64MB QSPI Flash
Micro SD card socket
C
Co om mm mu un ni ic ca at ti io on n
10/100 Mbps Ethernet PHY with RJ45 connector
USB 2.0 PHY with mini-USB type AB connector
C
Co on nn ne ec ct to or rs s
Two 46-pin BBB expansion headers
Two MAX 10 FPGAADC SMA inputs
D
Di is sp pl la ay y
HDMI TX, incorporates HDM v1.4 features, including 3D video supporting
A
Au ud di io o
24-bit CD-quality audio CODEC with line-in, line-out jacks
V
Vi id de eo o I In np pu ut t
MIPI connector interface supports camera module application
A
An na al lo og g

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Two MAX 10 FPGAADC SMA inputs
Seven MAX 10 FPGAADC inputs from one 46-pin BBB expansion header
S
Sw wi it tc ch he es s, , B Bu ut tt to on ns s, , a an nd d I In nd di ic ca at to or rs s
2 push-buttons
2 slide switches
8 blue user LEDs
S
Se en ns so or rs s
One proximity/ambient lighter sensor
One humidity and temperature sensor
One temperature sensor
One accelerometer
P
Po ow we er r
5V DC input