Artila M-X6ULL-B Installation instructions

M-X6ULL-B
Linux-Ready Cortex-A7
System on Module
Hardware Guide
Version: 1.01
2021 Sep.

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Trademarks
The Artila logo is a registered trademark of Artila I c. All other trademarks or
registered marks i this ma ual belo g to their respective ma ufacturers.
Disclaimer
I formatio i this docume t is subject to cha ge without otice a d does ot
represe t a commitme t o the part of Artila.
Artila provides this docume t as is, without warra ty of a y ki d, either expressed
or implied, i cludi g, but ot limited to, its particular purpose. Artila reserves the
right to make improveme ts a d/or cha ges to this ma ual, or to the products
a d/or the programs described i this ma ual, at a y time.
I formatio provided i this ma ual is i te ded to be accurate a d reliable.
However, Artila assumes o respo sibility for its use, or for a y i fri geme ts o
the rights of third parties that may result from its use.
This product might i clude u i te tio al tech ical or typographical errors.
Cha ges are periodically made to the i formatio herei to correct such errors,
a d these cha ges are i corporated i to ew editio s of the publicatio .

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Document Amendment History
Revision Date Remark
V 1.0 2021 Ja I itial
V1.01 2021 Sep. CN18 defi itio

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Ta le of Contents
1. Introduction .................................................................................................. 6
1.1 Features .............................................................................................. 6
1.2 Specificatio s (Hardware) .................................................................... 6
1.3 Specificatio s (Software) ..................................................................... 8
1.4 Packi g List ......................................................................................... 10
1.5 Optio al ............................................................................................... 10
2. i.MX-6ULL: Arm Cortex-A7 MPU.................................................................. 11
2.1 NXP i.MX 6ULL Block Diagram ........................................................... 11
2.2 NXP i.MX-6ULL Features .................................................................... 12
3. Layout & Dimensions................................................................................... 13
3.1 Outlook ................................................................................................ 13
3.2 Dime sio s .......................................................................................... 14
4. Block Diagram .............................................................................................. 15
5. Pin Assignment and Definitions.................................................................. 16
5.1 Co ector I formatio ......................................................................... 16
5.2 Matchi g Co ector I formatio (M-X6ULL-B starter kit) ..................... 16
5.3 Co ector a d PIN defi itio ............................................................... 17
5.3.1 Co ector (CN1) ................................................................................. 17
5.3.2 Co ector (CN2) ................................................................................. 18
5.3.3 Co ector (CN3) ................................................................................. 19
5.3.4 Co ector (J1): Co sole port ............................................................... 20
5.3.5 Co ector (J2): Exter al Battery Co ectio ....................................... 20
5.3.6 Co ector (JP1): Boot Selectio .......................................................... 21
6. Starter Kit (M-X6ULL-B) ............................................................................... 22
6.1 Features .............................................................................................. 22
6.2 Layout ................................................................................................. 23
6.3 Co ector a d Pi Defi itio ............................................................... 24
6.3.1 Co ector (CN1 ~ CN3) ...................................................................... 24
6.3.2 Co ector (CN4): GPIO ....................................................................... 25
6.3.3 Co ector (CN6): LCD / TTL ............................................................... 26
6.3.4 Co ector (CN7): LCD / TTL & Touch ................................................. 27
6.3.5 Co ector (CN8): LCD backlight +12Vdc ............................................ 28
6.3.6 Co ector (CN9): LCD backlight +5Vdc .............................................. 28
6.3.7 Co ector (CN10): Touch Se sor........................................................ 29
6.3.8 Co ector (CN11): LCD / LVDS .......................................................... 30
6.3.9 Co ector (CN16): RS-232.................................................................. 31
6.3.10 Co ector (CN17: RS-232) & (CN18: UART) ...................................... 31

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6.3.11 Co ector (J5): RS-485 ....................................................................... 32
6.3.12 Co ector (Co sole)............................................................................ 32
6.4 Jumper Setti g .................................................................................... 33
6.4.1 Jumper (JP1): LCD PWM Voltage Selectio ........................................ 33
6.4.2 Jumper (JP2): LCD Backlight Voltage Selectio .................................. 33
6.4.3 Jumper (JP3&JP4): Audio out Selectio .............................................. 34
7. Initial Operation ............................................................................................ 35
7.1 Usi g Default Li ux file system ............................................................ 35
7.2 I stall Software Package ..................................................................... 35

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1. Introduction
M-X6ULL-B is highly i tegrated, compact, low power co sumptio , the Li ux-Ready
arm Cortex-A7 System-o -Module.
It provides a ideal buildi g block that easily i tegrates with a wide ra ge of target
markets, such as i dustrial co trol, automatio gateway a d other applicatio s.
Li ux Ker el 5.4.x with Boot Loader & File system is pre-i stalled i the flash disk of
M-X6ULL-B a d ma y powerful utility programs are also i cluded. M-X6ULL-B is
ready to drop i your desig to save your time i software porti g a d hardware
debug.
1.1 Features
 NXP i.MX6ULL, a si gle arm Cortex-A7 core, 800MHz I dustrial grade Processor,
 512MB DDR3/LvDDR3 SDRAM
 16GB eMMC Flash
 Li ux Ker el 5.4.x with Boot Loader & File system
 24bits RGB display i terface, 4-wired resistive touch i terface
 1 x 10/100Mbps Ether et i terface with MAC/PHY a d tra sformer
 O e USB 2.0 Hi-speed (480Mbps) Host Ports a d O e USB Clie t port
 Four UARTs
 I
2
C / I
2
S
 15 Programmable Digital I/O Port (GPIO)
 O e Serial Peripheral I terface (SPI) Ports
 Compact size: 50 x 80mm
 Si gle +3.3VDC Power-i
1.2 Specifications (Hardware)
 CPU / Memory
 CPU: NXP i.MX6ULL
 Featuri g NXP’s adva ced si gle ARM Cortex®-A7 core
 Operates at speeds: 800MHz
 SDRAM: 512MB DDR3/LvDDR3 SDRAM
 Flash: 16G eMMC
 Network
 1x 10/100Mbps Ether et with PHY
 Sig al: EXT+, EXT-, ERX+, ERX-
 Protectio : 1.5 KV Mag etic isolated

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 USB Port
 1x USB 2.0 Hi speed (480Mbps) Host
Sig al: USB Host Data+, USB Host Data-
 1 x USB 2.0 Clie t
Device: DDP (data+), DDM (data-), UDIO (I/O)
 UART
 4x U iversal Asy chro ous Receiver a d Tra smitter (UART)
 UART 1~4: TXD, RXD, RTS, CTS (Software co figurable RS-232/485 mode)
 Sig al level: 3.3VDC
 Baud Rate: Up to 921.6 Kbps
 Parity: No e, Eve , Odd, Mark, Space
 Data Bits: 5, 6, 7, 8
 Stop Bits: 1, 1.5, 2
 Flow Co trol: RTS/CTS, XON/XOFF, No e
 RS-485 Bi-Directio Co trol Sig al: RTS for UART1~4
 Programma le DIO (GPIO)
 15Pi s Ge eral Purpose I/O ca be programmable as digital i put or output
 Sig al Level: TTL Compatible
 Digital I put:
- Low level: 0V mi / +0.99V max
- High level: +2.31V mi / +3.3V max
 Digital Output:
- Low level: +0.15V max @ 1mA
- High level: +3.15V mi @ 1mA
 SPI (Serial Peripheral Interface)
 O e SPI port
 Three wires sig als: MISO, MOSI a d CLK
 Sig al: MISO, MOSI, CLK, SD data 0~3
 De ug Port
 Sig al: Co ector: J1 (4-pi s Wafer)
 Power
 I put: +3.3VDC
 Co sumptio : 0.75W

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 Predefine Pins
 H/W Reset Butto (CN1, pi #11) , i put
 System Reset (CN1, pi #13), i put
 Buzzer (CN1, pi #22), output
 System Ready LED (CN1, pi #1), output
 LAN Activity LED (CN1, pi #3), output
 GPIO 15pi s (CN1, pi #10/12/14~21/23 & CN3, pi #31/33/35/37)
1.3 Specifications (Software)
 Operation System
 Li ux ker el 5.4.x
 Supports bootup from eMMC or SD card
 Boot Loader: Barebox
 File System: EXT4
 GUI E gi e: X11
 Software Development
 Toolchai : gcc 9.3.0 + glibc 2.31
 Supports i -place C/C++ code compilatio
 Package Management
 Package repository: Artila self-mai tai ed repository
 Comma d: Usi g sta dard apt-get comma d
 Popular Packages
 Web server: Apache/Ngi x/Lighttpd
 Database: MySQL/SQLite3/PostgreSQL
 Script La guage: PHP/Pytho /Perl/NodeJS
 Text editor: vim/ a o/sed
 Admi istratio : Webmi
 Utilities
 Bash: Shell Comma d
 Tel et: Tel et clie t program
 Busybox: Li ux utility collectio
 FTP: FTP clie t program

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 Protocol Stacks
 IPV4, ICMP, ARP, DHCP, NTP, TCP, UDP, FTP, HTTP, PPP, PPPoE, CHAP,
PAP, SNMP V1/V3, SSL, SSH 1/2
 Daemon
 pppd: Dial I /out over serial port a d PPPoE
 s mpd: SNMP age t program
 ftpd: FTP server program
 gi x: Web server program
 sshd: secured shell server
 iptables: Firewall service ma ager
 Standard Device Drivers
 ttymxc0: serial co sole port (CORTEX-A7 SERIES debug port)
 ttymxc1~ttymxc4: serial ports (CORTEX-A7 SERIES UART0~UART3)
 gpio: Ge eral Purpose I/O
 mmc: SD/MMC:
 rtc: Real Time Clock
 sda: USB flash memory disk
 ttyACM: USB Modem
 ttyUSB: USB RS-232 adaptor
 spi: spi bus
 I/O devices Control
Use sta dard I/O device co trol to access followi g devices:
 Ether et: eth1
 Serial Ports: ttymxc1, ttymxc2, ttymxc3, ttymxc4
 Serial Co sole Port: ttymxc0
 Real time clock: rtc0
 USB Flash Disk: sda, sda1, sdb, sdb1
 SD memory Card: mmc0
 USB Serial Cable: ttyUSB0, ttyUSB1
 SPI bus: spi0

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 Default Setting
 IP Default setti g:

eth1: 192.168.2.127 (Netmask: 255.255.255.0)
 ssh Logi : root
 Password: root
 Termi al type: VT100
1.4 Packing List
 M-X6ULL-B: Li ux-ready Cortex-A7 800MHz SoM (System o Module)
with 512MBSDRAM, 16GB eMMC Flash
1.5 Optional
 Starter Kit (detail i formatio refer to 6. Starter Kit (M-X6ULL-B))
 91-PHDF9-050: Co sole Cable (4Pi header to DB9 Female, 50cm)

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2. i.MX-6ULL: Arm Cortex-A7 MPU
NXP i.MX 6ULL is a power efficie t a d cost-optimized applicatio s processor family
featuri g a adva ced impleme tatio of a si gle Arm Cortex-A7 core, which
operates at speeds up to 800MHz. The i.MX 6ULL applicatio s processor i cludes a
i tegrated power ma ageme t module that reduces the complexity of a exter al
power supply a d simplifies power seque ci g. Each processor i this family provides
various memory i terfaces, i cludi g 16-bit LPDDR2, DDR3, DDR3L, raw a d
ma aged NAND flash, eMMC, SPI a d a wide ra ge of other i terfaces for
co ecti g peripherals
The device features a floati g poi t u it for high-precisio computi g a d accelerated
data processi g, a d a high data ba dwidth architecture. It i tegrates adva ced user
i terface a d co ectivity peripherals a d security features. Detail i formatio , please
refer to NXP website
https://www. xp.com/products/processors-a d-microco trollers/arm-processors/i-mx-
applicatio s-processors/i-mx-6-processors/i-mx-6ull-si gle-core-processor-with-arm-
cortex-a7-core:i.MX6ULL
2.1 NXP i.MX 6ULL Block Diagram

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2.2 NXP i.MX-6ULL Features
CPU complex
 Si gle core arm Cortex-A7 Processor
 CPU Freque cy up to 800MHz
 32 Kbyte L1 Data Cache, 32 Kbyte L1 I structio Cache, 128K L2 Cache
Display
 Parallel LCD Display up to WXGA (1366x768)
 8/10/16/24-bit Parallel Camera Se sor I terface
 Electrophoretic display co troller support direct-driver for E-I k EPD pa el,
with up to 2048x1536 resolutio at 106 Hz
Memory
 16-bit LP-DDR2, DDR3/DDR3L
 8/16-bit Parallel NOR FLASH / PSRAM
 Dual-cha el Quad-SPI NOR FLASH
 8-bit Raw NAND FLASH with 40-bit ECC
Advance Power Management
 Partial PMU I tegratio
Connectivity
 MMC 4.5/SD 3.0/SDIO Port
 USB 2.0 OTG, HS/FS, Device or Host with PHY
 Audio I terfaces i clude 3x I2S/SAI, S/PDIF Tx/Rx
 Ether et with IEEE 1588
 12-bit ADC, with resistive touch co troller
Package
 14x14 289 MAPBGA 0.8mm pitch

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3. Layout & Dimensions
3.1 Outlook
Top View
Bottom View
\\
SDRAM
iMX-6ULL
Battery
eMMC
Transformer

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3.2 Dimensions
(u it:mm)
Board Size: 80mm x 50mm
Screw Radius: 2.0mm

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4. Block Diagram

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5. Pin Assignment and Definitions
The M-X6ULL-B exposes three co ectors at bottom side that provide I/Os to desig
carrier board for versatile applicatio .
5.1 Connector Information
 Pi Header 28pi (CN1) / 50pi (CN2 & CN3) dual raw
 Pitch: 2.0mm
 Curre t Rati g: 1Amp
5.2 Matching Connector Information (M-X6ULL-B starter kit)
Here prese ts matchi g co ector i formatio that is used o M-X6ULL-B starter kit.
 Header (Female) Dual Rows Type Co ector matchi g to CN1/CN2/CN3
 Pitch: 2.0mm
 Curre t Rati g: 1Amp

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5.3 Connector and PIN definition
Followi g shows co ector i formatio a d pi defi itio .
5.3.1 Connector (CN1)
CN1 i cludes sig als: I2C, Touch se sor, Co sole, Reset, GPIO
(i.MX6ULL) (Artila) CN1 (Artila) (i.MX6ULL)
R10 System Ready LE 1 2 Touch Top channel L14
LAN Active LE 3 4 Touch Bottom channel L15
Battery IN 5 6 Touch Right channel L17
G16 I2C Serial ata 7 8 Touch Left channel M16
G17 I2C Serial Clock 9 10 GPIO2_8 C17
H/W Reset Signal 11 12 GPIO2_9 C16
System Reset 13 14 GPIO2_10 B17
A4 GPIO4_15 15 16 GPIO2_11 A15
5 GPIO4_11 17 18 GPIO2_12 A16
17 GPIO2_14 19 20 GPIO2_13 B15
16 GPIO2_15 21 22 GPIO5_1 or Buzzer R9
M15 GPIO1_9 23 24 GN
Console TX 25 26 Console RX
VCC3V3 27 28 GN

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5.3.2 Connector (CN2)
CN2 i cludes sig als: LAN, USB, LCD
(i.MX6ULL) (Artila) CN2 (Artila) (i.MX6ULL)
LAN Transmit ata- 1 2 LAN Transmit ata+
LAN Receive ata- 3 4 LAN Receive ata+
A_GN 1 5 6 A_GN 1
K13 USB evice I 7 8 LC _GREEN0 B11
U15 USB evice ata + 9 10 LC _GREEN1 A11
T15 USB evice ata - 11 12 LC _GREEN2 E12
T13 USB Host ata A- 13 14 LC _GREEN3 12
U13 USB Host ata A+ 15 16 LC _GREEN4 C12
GN 17 18 LC _GREEN5 B12
C13 LC _RE 0 19 20 LC _GREEN6 A12
B13 LC _RE 1 21 22 LC _GREEN7 13
A13 LC _RE 2 23 24 GN
14 LC _RE 3 25 26 LC _BLUE0 B9
C14 LC _RE 4 27 28 LC _BLUE1 A9
B14 LC _RE 5 29 30 LC _BLUE2 E10
A14 LC _RE 6 31 32 LC _BLUE3 10
B16 LC _RE 7 33 34 LC _BLUE4 C10
B8 LC ata Enablel 35 36 LC _BLUE5 B10
N17 LC Contrast Control 37 38 LC _BLUE6 A10
9 LC Horizontal Signal 39 40 LC _BLUE7 11
C9 LC Vertical Signal 41 42 GN
R6 LC PWR enable control 43 44 LC ot Clock A8
GN 45 46 GN
GN 47 48 GN
VCC3V3 49 50 VCC3V3

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5.3.3 Connector (CN3)
CN3 i cludes sig als: COM, SD card, I2S, SPI, GPIO
(i.MX6ULL) (Artila) CN3 (Artila) (i.MX6ULL)
VCC3V3 1 2 VCC3V3
GN 3 4 GN
GN 5 6 GN
H17 COM2 TX 7 8 COM1 CTS H14
H16 COM2 RX 9 10 COM1 RTS J15
H15 COM2 RTS 11 12 COM1 RX J16
G14 COM2 CTS 13 14 COM1 TX J17
E4 COM3 TX 15 16 GPIO5_2 P11
E3 COM3 RX 17 18 GPIO5_7 N10
E1 COM3 RTS 19 20 GPIO5_8 N9
E2 COM3 CTS 21 22 GN
F5 COM4 TX 23 24 S Card ata 0 B3
E5 COM4 RX 25 26 S Card ata 1 B2
F3 COM4 RTS 27 28 S Card ata 2 B1
F2 COM4 CTS 29 30 S Card ata 3 A2
F17 GPIO1_30 31 32 S Card Clock C1
G13 GPIO1_31 33 34 S Card Command C2
C5 GPIO4_13 35 36 S Card etect J14
B5 GPIO4_14 37 38 GPIO4_16 E6
N16 I2S Transmit Clock 39 40 SPI MISO 1
N15 I2S Transmit Sync 41 42 SPI MOSI 2
N14 I2S Transmit ata 43 44 SPI Serial Clock 4
M14 I2S Receive ata 45 46 SPI Chip Select 3
N/A 47 48 GPIO4_12 A3
P9 GPIO5_4 or AU _INT 49 50 I2S Master clock P14
Remark: PIN16,18,20,38,48 (GPIO reserved for User define

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5.3.4 Connector (J1): Console port
Pi assig me t is: RX, TX, +3.3V, GND.
Therefore, you eed to ope the upper metal case a d prepare or purchase a serial
co sole cable to use the serial co sole port.
Or, it ca be purchased “Co sole Cable” from Artila, P/N is CB-PHDF9-050.
5.3.5 Connector (J2): External Battery Connection
Pin Pi 1 Pi 2
Signal BAT_IN GND
1
2
3
4
RX
TX
+3.3V
GN