6Rev. C
RTP Address Bus Decoder and Memory Controller
Complex Programmable Logic Device Circuitry 84
RTP Data Bus I/O Latch CPLD Circuitry 85
Data Acquisition System (DAS) Front End Circuitry 85
DAS Analog-to-Digital Converter Circuitry 86
DAS Fluid Detector Circuitry 86
RTP/UIP First In First Out (FIFO) Memory
Communications Circuitry 86
UIP Main Interconnect Board ISA Interface Circuitry 87
UIP Display Module, COM1, COM2/LPT1, and
Utility Circuitry 87
UIP COM3 Circuitry 87
UIP ISA Address Bus Decoder, Data Bus I/O
Latch CPLD, and Communications Circuitry 88
Control Micro-stepper Processor, and Sample
and Wash Pump Driver Circuitry 88
Control Heater DAC, Driver Circuitry, and Valve
Driver Circuitry 89
Power System Status Circuitry, Diagnostic LEDs,
and Switches 89
Control Automatic Quality Control (AQC) Valve
Stepper Circuitry 90
Power System Protection and Input Circuitry 90
UIP Main Interconnect Board ISA Interface 92
Digital Input Signals 92
Digital Output Signals 92
Digital Bi-directional Signals 93
UIP COM1 Interface 94
Digital Input Signals 94
Digital Output Signals 94
UIP COM2/LPT1 Interface 95
Digital Input Signals 95
Digital Output Signals 95
Flat Panel Interface 96
Digital Output Signals 96
