
MAX667VD -8-
pin 24: VSW CI :IN: VSWO(pin26) control input.
pin 25: VSW I :IN: Video signal switched input.
pin 26: VSW O : O : Video signal switched output.
pin 27: VDD : - : Positive voltage supply.
pin 28: SPIO :I/O: Starting signal input/output for the source
driver.
pin 29: GND : - : Ground.
pin 30: PCP : O : Test setting output.
pin 31: CLOC :IN: Output mode control signal input for
EXCL(pin18).
pin 32: MOD 2 : O : Mode setting signal output to the gate
driver.
pin 33: HR : O : Horizontal scanning setting signal output
for the source driver.
pin 34: IVR : O : Vertical scanning setting signal output for
the gate driver.
pin 35: PS : O : Control signal output for the source driv-
er.
pin 36: CTR : O : Control signal output for the source driv-
er.
pin 37: SPIO :I/O: Starting signal input/output for the source
driver.
pin 38: PDP : O : Phase detection output.
pin 39: PAIR :IN: Pairing setting input.
pin 40: MON : O : Test setting output.
pin 41: APN :IN: Horizontal position setting input.
pin 42: GND : - : Ground.
pin 43: OSC out : O : Oscillation output.
pin 44: OSC in :IN: Oscillation input.
pin 45: VDD : - : Positive voltage supply.
pin 46: GND : - : Ground.
pin 47: CLD : O : Clock pulse output for the source driver.
pin 48: TST 1 :IN: For test.
pin 49: RES H :IN: Reset signal input for the horizontal
counter.
pin 50: RES V :IN: Reset signal input for the vertical counter.
pin 51: TST 2 :IN: For test.
pin 52: TEST :IN: For the test.
pin 53: MON A : O : Test setting output.
pin 54: TPC : O : Touch panel control signal output.
pin 55: MON C : O : Test setting output.
pin 56: MON D : O : Test setting output.
pin 57: CLS : O : The clock pulse output for the gate driv-
er.
pin 58: SPS : O : The starting pulse output for the gate driv-
er.
pin 59: VR : O : Scanning setting signal output for the gate
driver.
pin 60: MOD 1 : O : Mode setting signal output to the gate
driver.
pin 61: T CLK :IN: For test.
pin 62: GND : - : Ground.
pin 63: GND : - : Ground.
pin 64: GPS : O : Logic pulse output to generate voltage for
the gate driver.
pin 65: LOWI :IN: Control signal input for the gate driver.
pin 66: ABC :IN: Output setting signal input.
pin 67: VDD : - : Positive voltage supply.
pin 68: GND : - : Ground.
pin 69: DVTC : O : Test setting output.
pin 70: BLK I :IN: The blank input.
pin 71: BLK O : O : The blanking signal output.
pin 72: SYN : O : Composite synchronous signal output.
051-6456-00 YGV629-VZ Video display processor
TerminalDescription
pin 1: PLL VDD : - : PLL power supply.
pin 2: PLL FILTER : - : PLL filter connection.
pin 3: PLL VSS : - : PLL ground.
pin 4: NC : - : Not in use.
pin 5: PLL CTL 5 :IN: PLL multiply select.
pin 6: PLL CTL 4 :IN: PLL multiply select.
pin 7: PLL CTL 3 :IN: PLL multiply select.
pin 8: PLL CTL 2 :IN: PLL multiply select.
pin 9: PLL CTL 1 :IN: PLL multiply select.
pin 10: PLL CTL 0 :IN: PLL multiply select.
pin 11: DT CK Sel_N :IN: Display clock select.
pin 12: DT CK IN :IN: Display clock input.
pin 13: VSS : - : Digital ground.
pin 14: VDD : - : Digital power supply.
pin 15: CPU D 0 :I/O:CUP interface. Data bus.
pin 16: CPU D 1 :I/O:CUP interface. Data bus.
pin 17: CPU D 2 :I/O:CUP interface. Data bus.
pin 18: CPU D 3 :I/O:CUP interface. Data bus.
pin 19: CPU D 4 :I/O:CUP interface. Data bus.
pin 20: CPU D 5 :I/O:CUP interface. Data bus.
pin 21: CPU D 6 :I/O:CUP interface. Data bus.
pin 22: CPU D 7 :I/O:CUP interface. Data bus.
pin 23: CPU WAIT_N : O : CUP interface. Wait.
pin 24: CPU READY_N : O : CUP interface. Ready.
pin 25: CPU INT_N : O : CUP interface. Interrupt.
pin 26: VDD : - : Digital power supply.
pin 27: VSS : - : Digital ground.
pin 28: CPU CS_N :IN: CUP interface. Chip select.
pin 29: CPU WR_N :IN: CUP interface. Write command.
pin 30: CPU RD_N :IN: CUP interface. Read command.
pin 31: CPU PS 2 :IN: CUP interface. Port select.
pin 32: CPU PS 1 :IN: CUP interface. Port select.
pin 33: CPU PS 0 :IN: CUP interface. Port select.
pin 34: CPU SD OUT : O : CUP interface. Serial data output.
pin 35: CPU S D IN :IN: CUP interface. Serial data input.
pin 36: CPU S CS_N :IN: CUP interface. Serial chip select.
pin 37: CPU S CLK :IN: CUP interface. Serial clock.
pin 38: CPU SER_N :IN: CUP interface. Parallel/Serial select.
pin 39: CPU RESET_N :IN: CUP interface. Reset.
pin 40: VSS : - : Digital ground.
pin 41: VDD : - : Digital power supply.
pin 42: Memo A 0 : O : Pattern Memory interface. Address output.
pin 43: Memo A 1 : O : Pattern Memory interface. Address output.
pin 44: Memo A 2 : O : Pattern Memory interface. Address output.
pin 45: Memo A 3 : O : Pattern Memory interface. Address output.
pin 46: Memo A 4 : O : Pattern Memory interface. Address output.
pin 47: Memo A 5 : O : Pattern Memory interface. Address output.
pin 48: VSS : - : Digital ground.
pin 49: Memo A 6 : O : Pattern Memory interface. Address output.
pin 50: Memo A 7 : O : Pattern Memory interface. Address output.
pin 51: Memo A 8 : O : Pattern Memory interface. Address output.
pin 52: Memo A 9 : O : Pattern Memory interface. Address output.
pin 53: Memo A 10 : O : Pattern Memory interface. Address output.
pin 54: Memo A 11 : O : Pattern Memory interface. Address output.
pin 55: VDD : - : Digital power supply.
pin 56: VSS : - : Digital ground.
pin 57: Memo A 12 : O : Pattern Memory interface. Address output.
pin 58: Memo A 13 : O : Pattern Memory interface. Address output.
pin 59: Memo A 14 : O : Pattern Memory interface. Address output.
pin 60: Memo A 15 : O : Pattern Memory interface. Address output.
pin 61: Memo A 16 : O : Pattern Memory interface. Address output.
pin 62: Memo A 17 : O : Pattern Memory interface. Address output.
pin 63: VSS : - : Digital ground.
pin 64: Memo A 18 : O : Pattern Memory interface. Address output.