Clevo M540S Administrator Guide

Schematic Diagrams
B-1
B.Schematic Diagrams
Appendix B:Schematic Diagrams
This appendix has circuit diagrams of the M540S/M545S/M550S/M555S notebook’s PCB’s. The following table indi-
cates where to find the appropriate schematic diagram.
Diagram - Page Diagram - Page Diagram - Page
System Block Diagram - Page B - 2 VT8237 2/3 - Page B - 15 +1.8V, +0.9V - Page B - 28
PROCESSOR 1/2 - Page B - 3 VT8237 3/3 - Page B - 16 VCORE - Page B - 29
PROCESSOR 2/2 - Page B - 4 MINI PCI, MINI Card, USB2.0*2 - Page B - 17 VCCP, +1.5VS - Page B - 30
VN800 1/4 - Page B - 5 PATA HDD, CD-ROM, H8 BEEP - Page B - 18 +VDD3, +VDD5 - Page B - 31
VN800 2/4 - Page B - 6 LAN PHY - Page B - 19 D/D BD (CRT, INVERTER, CCD) - Page B - 32
VN800 3/4 - Page B - 7 LPC ROM, TOUCH PAD, LED - Page B - 20 D/D BD (CHARGER, DC IN) - Page B - 33
VN800 4/4 - Page B - 8 H8-2111 - Page B - 21 AUDIO BD (PHONE JACK, USB, RJ-11) - Page B - 34
DDR2-1 - Page B - 9 MDC, USB BT, PWRGD, DDB CON - Page B - 22 HOT KEY BD (HOT KEY, LED) - Page B - 35
DDR2-2 - Page B - 10 AC97 CODEC VT1613 - Page B - 23 LED BOARD - Page B - 36
CLOCK GENERATOR, CCD - Page B - 11 AUDIO AMP, USB2.0*2 - Page B - 24 CLICK BOARD - Page B - 37
PANEL, INVERTER, FAN - Page B - 12 PCMCIA ENE CB714B - Page B - 25 RJ-45 BOARD - Page B - 38
VIA LVDS VT-1637 - Page B - 13 PCM SOCKET, 3-IN-1 SOCKET - Page B - 26 USB DONGLE BOARD - Page B - 39
VT8237 1/3 - Page B - 14 3VS, 5VS, 2.5VS, 1.8VS - Page B - 27 DEBUG PORT - Page B - 40
Table B - 1
Schematic
Diagrams

Version Note
The schematic dia-
grams in this chapter
are based upon ver-
sion 6-71-M55S0-
003A. If your main-
board (or other boards)
are a later version,
please check with the
Service Center for up-
dated diagrams (if re-
quired).

Schematic Diagrams
B - 2
B.Schematic Diagrams
System Block Diagram
Sheet 1 of 39
System Block
Diagram
RJ-11
CEN/SUB
ON
AMP.
MIC
S5
PCMCIA
SOCKET
LPC
1.+VCORE
2.INDICATOR LED
MII
533MHz
ENE
CB714B
1.POWER BOTTON
4 IN 1
KBC CONN
OFF
CCD
MEMORY TERMINATIONS
+*V
SYSTEM
BIOS
567 HSBGA
F75383M
1.CHARGER,DC JACK
LINE
IN
CODEC
FRONT
1.+1.05V,+1.5V
1.+VTT_MEM,+1.8V
MDC
DDR VR
2.CRT,RJ-11
CARD
READER
3.LID SWITCH
ICS952906
3.+VDD3,+VDD5,
CPU FAN
PCI BUS
+*VS
33MHz
VT1637
LVDS
SO-DIMM1
HDD
CONNECTOR
PROCESSOR
+VDD
CPU
FSB
VT1613
SENSOR
HOTKEY BOARD
H8/2111
SM BUS
802.11 b/g
HP
OUT
2.USB CONNECTOR
,+2.5V +2.5VS
(Option)
479 uFCPGA
APA2020A
Mini PCI
PCMCIA
SHEET 30
VN800
539 BGA
USB 1
RJ-45
USB2.0
POWER SWITCH BOARD
AUDIO
TOUCH
CLEVO M540S/M550S System Block Diagram
ON
KBC
2.INDICATOR LED
SMART
1.+3V,+5V
(Option)
CRT
MULTI FUNCTION BOARD
DDR2 SDRAM SOCKET
USB2.0
PHONE JACK
BOARD
IN
SB
MODULE
TEMP
OFF
LPC
MINI CARD
(Option)
LCD CONN
(LVDS)
CLOCK
BUFFER
NB
USB 0
OFFS3
BT
FULL
ON
2.+1.5VS,+3VS,+5VS ,
ON
USB 2
ON
SPDIF
OUT
SO-DIMM0
MDC CONN.
SURR
PHY
SOCKET
SHEET 16
VLINK 533MB/sec
CD-ROM/CD-RW/
Mini PCIE
PHONE JACK BOARD
YONAH
INT.
SPK
VT8237R+
BATTERY
DVD-ROM/DVD+-RW
1.AUDIO PHONE JACK
ON
VT6103
ON
PATA HDD
3.+3VH8,+5VH8
ICS9P936
MULTI FUNCTION
BOARD
IDE
MAIN CLOCK
SM BUS
1.HOT KEY
AC97 LINK
SOCKET*1
PAD
SHEET 16

Schematic Diagrams
PROCESSOR 1/2 B - 3
B.Schematic Diagrams
PROCESSOR 1/2
Sheet 2 of 39
PROCESSOR 1/2
H_D#35
D32
*SCS751V-40
AC
H_SMI#
R303 10K_04
H_D#51
H_THERMDA
If PROCHOT# is not used, it must be pull-up 56
Ohm to Vccp; if PROCHOT# is routed between CPU,
IMVP6 VR & GMCH, Rtt has to be 75ohm+-5%
Layout Note:
+VCC P
R23 200 _04
H_RS#1 4
FERR#
H_A#18
H_A#14
H_A#21
R26 10K_04
H_DPWR# 4
R575 * 0_04
Layout Note:
COMP0, COMP2: 0.5" Max, Zo=27.4 Ohms
COMP1, COMP3: 0.5" Max, Zo=55 Ohms
Best estimate is 18 mils wide trace
for outer layers and 14 mils wide
trace if on internal layers.
H_D#60
H_D#57
H_DPRSLPVR
+2. 5VS 10, 12, 13 ,14, 15, 21 ,2 6, 28, 29
H_D#12
CLK_CPU_BCLK 10
H_INTR15
H_A#22
H_CPURST#
H_INTR
R326
100K_04
+V CC P
H_D#40
COMP2
H_BPM0#
Layout Note:
ITP_DBRST#
H_D#21
C469
10u/ 10 V_08
R581
*6.8K_04
+VDD3
H_A#3
H_HIT# 4
H_D#53
R47 51_ 1%_06
H_BREQ0# 4
H_PWRGD
H_A#15
H_REQ#0
H_A#20
R323
4.7K_04
CPU_GTLREF
H_D#6
H_D#17
H_PSI#
R546 150_04
A#[32-39],
APM#[0-1]:
Leave escape
routing on
for future
functionality
H_D#20
R321 0_06
R315 10K_04
H_IERR#
H_D#9
H_D#36
H_A#24
RN 2 2 20_06_ 8P4R
8 1
7 2
6
5
3
4
H_PREQ#
H_INTR
H_D#8
Within 2.0" of the CPU
R18 75_ 1%_06
T31
R299 150_04
+3VS
H_D#7
R17 680 _1%_06
C481
0. 01u/ 25 V_04
H_CPUSLP# 15
COMP3
H_DSTBP#3 4
H_D#41
H_D#52
H_D#15
H_D#10
H_D#19
H_REQ#1
H_A#30
R67 150 _04
H_ADSTB#04
H_A#27
R301 150_04
H_DSTBN#14
Layout Note:
0.5" max,
Zo= 55 Ohms
+V C CP
H_D#34
H_D#54
No stub on H_STPCLK# test
point
C469 CLOSE TO U19.
H_DSTBN#04
H_TDO
H_D#28
H_PRDY#
R16 54. 9_1%_06
R547 150_04
+V C CP
H_IGNNE#15
H_A20M#
H_A#19
H_INIT#
+VCC_THRM
H_REQ#[4:0]4
H_TRDY# 4
R65 75_ 1%_06
R302 150_04
H_DSTBP#14
H_DSTBP#2 4
+VCCP 3,4,10,15,28,29
COMP2
H_THERMDC
R341 51 _1%_06
R304
10K_ 06
R13 10K_04
H_DSTBP#04
H_RS#2 4
+VDD3 15,20,21,26,27,30
H_PRDY#
R286
27.4_1%_06
H_D#31
R25 10K _04
H_D#23
H_D#22
H_D#4
H_DBI#3 4
H_NMI15
H_D#[63:0]4
H_D#61
+VCC P
H_SMI #15
PM_DPRSLPVR 15,28
H_TRST#
H_PREQ#
H_DPRSLPVR
H_BPM3#
H_D#42
H_A#12
H_REQ#4
[13]
+3VS 6, 7, 8, 10, 11,1 2, 13, 14, 15 ,16 ,1 7,19 ,2 1,2 2, 24, 25, 26, 28, 29
H_CPUSLP#
H_D#55
R310 51_1%_04
Near to
F75383M
H_D#16
PM_THRMTRIP#
H_A#28
H_A20M#15
H_DPSLP# 15
H_D#33
COMP1
H_A#7
R340 * 1K_04
H_ADSTB0# 4
FERR#
PSI#
C717
*0.1u/16V_04
H_LOCK# 4
H_D#32
H_D#26
RESERVED
ADDR GROUP 0
CONTROL
XDP/ITP SIGNALS
THERMH CLK
JSKT1A
PZ47913-2741-01
J4
L4
M3
K5
M1
N2
J1
N3
P5
P2
L1
P4
P1
R1
L2
K3
H2
K2
J3
L5
Y2
U5
R3
W6
U4
Y5
U2
R4
T5
T3
W3
W5
Y4
W2
Y1
V4
A6
A5
C4
D5
C6
B4
A3
AA1
AA4
AB2
AA3
M4
N5
T2
V3
B2
C3
B25
T22
D2
F6
D3
C1
AF1
D22
C23
C24
A22
A21
D21
A24
A25
C7
AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20
G6
E4
B1
F3
F4
G3
G2
D20
B3
H4
F1
H5
F21
E1
H1
E2
G5
A[ 3] #
A[ 4] #
A[ 5] #
A[ 6] #
A[ 7] #
A[ 8] #
A[ 9] #
A[ 10] #
A[ 11] #
A[ 12] #
A[ 13] #
A[ 14] #
A[ 15] #
A[ 16] #
ADSTB[0]#
REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#
A[ 17] #
A[ 18] #
A[ 19] #
A[ 20] #
A[ 21] #
A[ 22] #
A[ 23] #
A[ 24] #
A[ 25] #
A[ 26] #
A[ 27] #
A[ 28] #
A[ 29] #
A[ 30] #
A[ 31] #
ADSTB[1]#
A20M#
FERR #
IGNNE#
STPC LK#
LINT0
LINT1
SMI#
RSVD[01]#
RSVD[02]#
RSVD[03]#
RSVD[04]#
RSVD[05]#
RSVD[06]#
RSVD[07]#
RSVD[08]#
RSVD[09]#
RSVD[10]#
RSVD[11]#
RSVD[12]#
RSVD[13]#
RSVD[14]#
RSVD[15]#
RSVD[16]#
RSVD[17]#
RSVD[18]#
RSVD[19]#
RSVD[20]#
BC LK[ 0]
BC LK[ 1]
PR OC H OT
TH E RM D A
TH E RM D C
TH ER MTRI P#
BPM[ 0]#
BPM[ 1]#
BPM[ 2]#
BPM[ 3]#
PRDY #
PREQ#
TC K
TD I
TD O
TMS
TR ST #
DBR#
HIT#
HITM#
RESET#
RS[0]#
RS[1]#
RS[2]#
TR DY #
IERR#
INIT#
LOCK#
BR0#
DEFER#
DRDY#
DBSY#
ADS#
BNR#
BPR I #
R14 *10K_04
H_BREQ0#
DATA GRP 3
DATA GRP 0 DATA GRP 1
MISC
DATA GRP 2
JSKT1B
PZ47913-2741-01
E22
F24
E26
H22
F23
G25
E25
E23
K24
G24
J24
J23
H26
F26
K22
H25
H23
G22
J26
N22
K25
P26
R23
L25
L22
L23
M23
P25
P22
P23
T24
R24
L26
T25
N24
M24
N25
M26
AD26
C26
D25
B22
B23
C21
R26
U26
U1
V1
E5
B5
D24
D6
D7
AE6
AC22
AC23
AB22
AA21
AB21
AC25
AD20
AE22
AF23
AD24
AE21
AD21
AE25
AF25
AF22
AF26
AD23
AE24
AC20
AA23
AB24
V24
V26
W25
U23
U25
U22
AB25
W22
Y23
AA26
Y26
Y22
AC26
AA24
W24
Y25
V23
D[0]#
D[1]#
D[2]#
D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#
D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#
GTLREF
TEST1
TEST2
BSEL[0]
BSEL[1]
BSEL[2]
COMP[ 0]
COMP[ 1]
COMP[ 2]
COMP[ 3]
DPRSTP#
DPSLP#
DPWR#
PWR GOOD
SLP#
PSI #
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#
DSTBN[3]#
DSTBP[3]#
DINV[3]#
D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#
D[47]#
DSTBN[2]#
DSTBP[2]#
DINV[2]#
Layout note:
H_D#[63:0] 4
H_D#38
H_A#6
R316
100K_04 R335
10K_ 04
U19
ADM1032ARM
1
2
3
4
5
6
7
8
VD D
D+
D-
TH E RM
GND
ALERT
SDATA
SCLK
R339 1K_1%_06
Change Q4,Q5,Q47 from FDN337N to 3904
H_D#25
Q48
2N3904
B
E C
+V D D3
H_CPURST# 4
H8_THERM_ALERT# 20
H_PROCHOT# H_DSTBN#3 4H_ADSTB#14
H_D#50
H_DPSLP#
H_TCK
H_TCK
R312 330_04
H_DBSY# 4
SMD_THERM 20
PM_THRMTRIP#
R306
680_04
H_HITM# 4
H_D#39
H_TDI
H_STPCLK#
R19 54. 9_1%_06
TH E RM TR I P# 3 0
H_D#45
[13]
H_REQ#2
H_A#31
FERR#
R285
54.9_1%_06
R20 54. 9_1%_06
Q47
2N3904
B
E C
Zo=55ohm, 0.5" max for GTLREF, Space any other switch
signals away fromGTLREF with a minimumof 25mils.
SMC_THERM 20
H_BPM3#
H_A#23
H_THERMDC
H_CPUSLP#
If FERR# isn't used,
thenit must be
terminated with a 56
Ohm +-5% pull-up to
Vccp(1.05V)
H_D#14
R298 150_04
H_D#[63:0] 4
H_D#18
H_D#49
COMP0
H_BPM2#
R307 150_04
+V CC P
H_DBI#14
THERM_ALER T# 14
H_BPM0#
H_A#11
H_TDO
R336
2K_1%_06
[13]
H_IERR#
H_A20M#
Q4
2N390 4
B
EC
Don't allow the GTLREF routing to create splits or
discontinuities in the referenceplanes of the FSB
signals
H_D#27
H_DSTBN#2 4
TH ER M_R ST#20
H_D#46
H_D#2
H_CPURST#
H_STPCLK#
+V C CP
H_D#24
H_A#16
H_DRDY# 4
H_D#47
R309 150_04
R284 54.9_1%_06
R344
27.4_1%_06
R320
100K_04
H_TDI
Q5
2N390 4
B
E C
+V C C _TH R M
Comp1,3 connect with Zo=55ohm, make trace
length shorter than 0.5" and width is 5mils
C482
0.1u/16V_04
Route H_THERMDA and
H_THERMDC on same layer.
10 mil trace on 10 mil
spacing.
H_DBI#2 4
H_D#29
COMP3
H_BPM2#
R305
*10K_04
Place testpoint on
H_IERR# with a GND
0.1" away.
H_PWRGD 21
H_A#5
H_TMS
H_D#11
H_D#56
H_NMI
H_DPRSLPVR
R313 150_04
H_D#58
H_BPM1#
C443
*10u/10V_08
H_A#[31:3]4
H_TRST#
R283 54.9_1%_06
+V D D 3
H_RS#0 4
H_PWRGD
H_IGNN E#
H_A#10
R324
4.7K_04
If PROCHOT# is routed
between CPU, IMVP and
MCH, pull-up resistor
has to be 75 ohm ? 5%
+2. 5 VS
H_BPRI# 4
H_DBI#04
R314 150_04
CLK_CPU_BCLK# 10
H_D#48
H_D#0
H_PSI#
H_D#63
H_BNR# 4
H_TMS
H_D#13
H_A#9
H_A#13
R294 *51_1%_06
R343
54.9_1%_06
H_A#29
PSI# trace:space (4:8 or
5:10),Zo=55ohm +-15%
Comp0,2 connect with Zo=27.4ohm, make trace
length shorter than 0.5" andwidth is 18mils.
H_PROCHOT#
H_A#25
H_THERMDA
CPU_BSEL110
H_STPCLK#15
H_ADS# 4
H_IGNNE#
H_INIT#
H_D#44
H_DEFER# 4
H_NMI
H_A#26
H_D#1
Place Series Resistor on
H_PWRGD_XDP Without Stub
C483
1u/10V
+V D D3
H_D#37
COMP1
Q46
2N3904
B
E C
R66 51_ 1%_06
Q49
2N700 2
G
DS
Comp 0~3 traces should be at least 25mils
away fromany other togging signal
H_SMI#
H_D#[63:0]4
H_BPM1#
H_A#4
H_A#8
H_D#30
H_PSI#
H_INIT# 15
H_D#62
C473
1000p/ 50V
R311
680_04
Q50
NDS352AP
G
DS
H_A#[31:3]4
H_D#43
H_D#5
COMP0
H_REQ#3
ITP_DBRST#
H_D#59
H_A#17
CPU_BSEL010
H_FERR# 15
H_D#3

Schematic Diagrams
B - 4 PROCESSOR 2/2
B.Schematic Diagrams
PROCESSOR 2/2
C448
22u/10V_12
H_VID6
C80
10u/10V_08
JSKT1D
PZ4791 3-2741-01
A4
A8
A11
A14
A16
A19
A23
A26
B6
B8
B11
B13
B16
B19
B21
B24
C5
C8
C11
C14
C16
C19
C2
C22
C25
D1
D4
D8
D11
D13
D16
D19
D23
D26
E3
E6
E8
E11
E14
E16
E19
E21
E24
F5
F8
F11
F13
F16
F19
F2
F22
F25
G4
G1
G23
G26
H3
H6
H21
H24
J2
J5
J22
J25
K1
K4
K23
K26
L3
L6
L21
L24
M2
M5
M22
M25
N1
N4
N23
N26
P3
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
AF3
AF6
AF8
AF11
AF13
AF16
AF19
AF21
AF24
VSS[ 001]
VSS[ 002]
VSS[ 003]
VSS[ 004]
VSS[ 005]
VSS[ 006]
VSS[ 007]
VSS[ 008]
VSS[ 009]
VSS[ 010]
VSS[ 011]
VSS[ 012]
VSS[ 013]
VSS[ 014]
VSS[ 015]
VSS[ 016]
VSS[ 017]
VSS[ 018]
VSS[ 019]
VSS[ 020]
VSS[ 021]
VSS[ 022]
VSS[ 023]
VSS[ 024]
VSS[ 025]
VSS[ 026]
VSS[ 027]
VSS[ 028]
VSS[ 029]
VSS[ 030]
VSS[ 031]
VSS[ 032]
VSS[ 033]
VSS[ 034]
VSS[ 035]
VSS[ 036]
VSS[ 037]
VSS[ 038]
VSS[ 039]
VSS[ 040]
VSS[ 041]
VSS[ 042]
VSS[ 043]
VSS[ 044]
VSS[ 045]
VSS[ 046]
VSS[ 047]
VSS[ 048]
VSS[ 049]
VSS[ 050]
VSS[ 051]
VSS[ 052]
VSS[ 053]
VSS[ 054]
VSS[ 055]
VSS[ 056]
VSS[ 057]
VSS[ 058]
VSS[ 059]
VSS[ 060]
VSS[ 061]
VSS[ 062]
VSS[ 063]
VSS[ 064]
VSS[ 065]
VSS[ 066]
VSS[ 067]
VSS[ 068]
VSS[ 069]
VSS[ 070]
VSS[ 071]
VSS[ 072]
VSS[ 073]
VSS[ 074]
VSS[ 075]
VSS[ 076]
VSS[ 077]
VSS[ 078]
VSS[ 079]
VSS[ 080]
VSS[ 081]
VSS[ 0 82]
VSS[ 0 83]
VSS[ 0 84]
VSS[ 0 85]
VSS[ 0 86]
VSS[ 0 87]
VSS[ 0 88]
VSS[ 0 89]
VSS[ 0 90]
VSS[ 0 91]
VSS[ 0 92]
VSS[ 0 93]
VSS[ 0 94]
VSS[ 0 95]
VSS[ 0 96]
VSS[ 0 97]
VSS[ 0 98]
VSS[ 0 99]
VSS[ 1 00]
VSS[ 1 01]
VSS[ 1 02]
VSS[ 1 03]
VSS[ 1 04]
VSS[ 1 05]
VSS[ 1 06]
VSS[ 1 07]
VSS[ 1 08]
VSS[ 1 09]
VSS[ 1 10]
VSS[ 1 11]
VSS[ 1 12]
VSS[ 1 13]
VSS[ 1 14]
VSS[ 1 15]
VSS[ 1 16]
VSS[ 1 17]
VSS[ 1 18]
VSS[ 1 19]
VSS[ 1 20]
VSS[ 1 21]
VSS[ 1 22]
VSS[ 1 23]
VSS[ 1 24]
VSS[ 1 25]
VSS[ 1 26]
VSS[ 1 27]
VSS[ 1 28]
VSS[ 1 29]
VSS[ 1 30]
VSS[ 1 31]
VSS[ 1 32]
VSS[ 1 33]
VSS[ 1 34]
VSS[ 1 35]
VSS[ 1 36]
VSS[ 1 37]
VSS[ 1 38]
VSS[ 1 39]
VSS[ 1 40]
VSS[ 1 41]
VSS[ 1 42]
VSS[ 1 43]
VSS[ 1 44]
VSS[ 1 45]
VSS[ 1 46]
VSS[ 1 47]
VSS[ 1 48]
VSS[ 1 49]
VSS[ 1 50]
VSS[ 1 51]
VSS[ 1 52]
VSS[ 1 53]
VSS[ 1 54]
VSS[ 1 55]
VSS[ 1 56]
VSS[ 1 57]
VSS[ 1 58]
VSS[ 1 59]
VSS[ 1 60]
VSS[ 1 61]
VSS[ 1 62]
499_1%
+VCCP
CPUVS Decoupling Guidelines : 1.5mOhm
used 330uF * 6 ( max ESR = 9mOhm / cap. )
& 3mOhm used 22uF * 32 MLCC
C51
10u/10V_08
4 & 8 mils
Default
viax20
C77
10u/10V_08
C459
22u/ 10V_12
C477
10u/ 10V_08
C79
10u/10V_08
C30
0.1u/16V_04
C455
22u/ 10V_12
+
C442
150U/4V_B
+VCCA_CPU
30A, 2000mils
R21
100_1%_06
C451
22u/ 10V_12
C27
0.1u/ 16V_04
C447
22u/10V_12
Route VCCSENSE and
VSSSENSE traces at 27.4Ohm
with 50 mil spacing.
Place PU and PD within 1
inch of CPU.
Micro-strip(Ext. Layer)
+VCOR E +VCORE+VC OR E
Place these insidesocket cavity on L1 (South side Primary)
55+/-15%
C52
10u/10V_08
H_VID0 28
C32
0.1u/16V_04
C57
10u/10V_08
5 & 10 mils
H_VID1 28
C54
10u/10V_08
AME8804AEEY(Without RA)
C450
22u/10V_12
H_VID6 28
L40 HCB1608K F-121T25
C456
22u/10V_12
+1.5VS 6,12,16,21,29
V
C75
10u/10V_08
VCCSENSE
C446
22u/10V_12
C444
22u/10V_12
C449
22u/10V_12
Load line slope : -2.1mV/A
10A 400MIL
+VC ORE
1K+ 1K
C49
10u/10V_08
Place these inside socket cavity on L8 (South side secondary)
+1.5 VS
IMVP6 VID TABLE
Deeper Sleep Voltage 0.748V
Normal Impedance
VSSSEN SE
H_VID4 28
H_VID3 28
VCORE_CPU 36A
For Yonah CPU
C78
10u/10V_08
VID[6:0], PSI#
Transmission Line Type
6 * 330uF (9mohm ESR each, 1.8nH ESL each)
3 on the north , 3 on the south
130mA
VCCSENSE 28
+VC OR E 28, 29
C29
0.1u/16V_04
Place these inside socket cavity on L1 (North side Primary)
+VCORE
+VCCP 2,4,10,15,28,29
H_VID0
+VC C P
Layout
note:
C76
10u/10V_08
C33
0.1u/16V_04
+VC OR E
H_VID2 28
C454
22u/10V_12
+1.5V
Near pin B26
Layout note:
C74
10u/ 10 V_08
H_VID1
H_VID5 28
C50
10u/10V_08
C31
0.1u/16V_04
Strip-line(Int. Layer)
C452
22u/10V_12
Place these inside socket cavity on L8 (North side secondary)
2.5A
H_VID5
VID[6..0] trace:space (4:8
or 5:10),Zo=55ohm +-15%
C453
22u/10V_12
C55
10u/ 10V_08
Place these inside socket cavity on L8 (North side secondary)
Layout note:
H_VID3
VSSSEN SE 28
C56
10u/10V_08
Boost Voltage 1.2V
Layout note:
+VC C A_C PU
C476
0.01u/25V_04
R1
+3V 8,9,10,13,14,15,16,18,20,21,26,28
H_VID2
C73
10u/10V_08
+VCORE
JSKT1C
PZ47913-2741-01
A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
V6
G21
J6
K6
M6
J21
K21
M2 1
N21
N6
R21
R6
T21
T6
V21
W21
B26
AD6
AF5
AE5
AF4
AE3
AF2
AE2
AF7
AE7
VCC[001]
VCC[002]
VCC[003]
VCC[004]
VCC[005]
VCC[006]
VCC[007]
VCC[008]
VCC[009]
VCC[010]
VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]
VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]
VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]
VCC[033]
VCC[034]
VCC[035]
VCC[036]
VCC[037]
VCC[038]
VCC[039]
VCC[040]
VCC[041]
VCC[042]
VCC[043]
VCC[044]
VCC[045]
VCC[046]
VCC[047]
VCC[048]
VCC[049]
VCC[050]
VCC[051]
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]
VCC[066]
VCC[067]
VCC[68]
VCC[69]
VCC[70]
VCC[71]
VCC[72]
VCC[73]
VCC[74]
VCC[75]
VCC[76]
VCC[77]
VCC[78]
VCC[79]
VCC[80]
VCC[81]
VCC[82]
VCC[83]
VCC[84]
VCC[85]
VCC[86]
VCC[87]
VCC[88]
VCC[89]
VCC[90]
VCC[91]
VCC[92]
VCC[93]
VCC[94]
VCC[95]
VCC[96]
VCC[97]
VCC[98]
VCC[99]
VCC[ 100]
VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]
VCCA
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
VCCSENSE
VSSSEN S E
H_VID4
C53
10u/10V_08
C72
10u/10V_08
Spacing (mils)
C445
22u/10V_12
R22
100_1%_06
IMVP IV
(+1.52V)
R2
Sheet 3 of 39
PROCESSOR 2/2

Schematic Diagrams
VN800 1/4 B - 5
B.Schematic Diagrams
VN800 1/4
H_D#0
H_A#4
C127
10u/10V_08A
H_DSTBN#1 2
H_D#44
H_D#16
R104
20.5_1%_06
H_REQ#0
C150
10u/10V_08A
H_BPR I#2
H_D#43
C168
0.01u/25V_04
22UF M 6.3V
H_A#17
R106
49.9_1%_06
H_A#9
H_A#21
C131
0.01u/25V_04
H_A#18
H_D#41
HRCOMP
H_REQ#4
+VCC P
H_BREQ0#2
H_D#50
H_D#46
H_HITM#2
H_D#27
H_DSTBP#0 2
NEED CLOSEST N.B
H_DBI#1
HCOMPVREF
H_D#13
H_A#5
R107 49.9_1%_06
H_LOCK#2
H_D#37
U23A
VN800
D27
D26
A29
C26
C28
D28
A27
B29
A26
B26
D25
E24
A25
A28
D24
C25
K28
K29
J28
K27
J26
J29
J25
J27
F28
G29
G27
D29
E27
F27
E28
F29
E23
B24
C24
A24
A23
B23
A22
C23
F21
C22
E21
C21
D20
D21
F20
E20
B19
C19
B20
B18
C20
A20
C18
B17
B16
A17
C14
C15
A18
B15
B14
A15
Y23
E29 H26 H29 L25 L28 P25 P28 U28 U25 Y25 Y28 E26 E25 E22 B25 B28 D16 D19 A16 A19 B22
C27
H28
D23
C17
B27
G28
D22
C16
Y29
V27
AA29
Y27
Y26
AC27
AA28
AB27
AA27
AC29
AB29
AB28
AC26
AD29
T28
R28
N29
N28
P29
P27
R27
N26
T26
P26
R25
N27
N25
R29
T27
W28
R26
M29
M28
T29
K26
M25
U27
M26
L27
U29
L29
M24
W27
V28
V26
W29
V29
L26
M27
K25
C29
H27
B21
A21
D14
L24
W23
U26
T25
G25
G26
F22
G24
F19
F16
U19 T19 R19 P19 N19 M19 L19 L18 L17 L16 L15
R24
V24
AC28 N18 P18 R18 M18 T18 U18 V18 D15
K24
N24
W26
HD0
HD1
HD2
HD3
HD4
HD5
HD6
HD7
HD8
HD9
HD10
HD11
HD12
HD13
HD14
HD15
HD16
HD17
HD18
HD19
HD20
HD21
HD22
HD23
HD24
HD25
HD26
HD27
HD28
HD29
HD30
HD31
HD32
HD33
HD34
HD35
HD36
HD37
HD38
HD39
HD40
HD41
HD42
HD43
HD44
HD45
HD46
HD47
HD48
HD49
HD50
HD51
HD52
HD53
HD54
HD55
HD56
HD57
HD58
HD59
HD60
HD61
HD62
HD63
HCLK+
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
HDSTB0N
HDSTB1P
HDSTB2P
HDSTB3P
HDSTB0P
HDSTB1N
HDSTB2N
HDSTB3N
HA3
HA4
HA5
HA6
HA7
HA8
HA9
HA10
HA11
HA12
HA13
HA14
HA15
HA16
HA17
HA18
HA19
HA20
HA21
HA22
HA23
HA24
HA25
HA26
HA27
HA28
HA29
HA30
HA31
HADSTB0
HADSTB1
ADS
BNR
BPRI
BREQ
DBSY
DEFER
DRDY
HIT
HITM
HLOCK
HTRDY
HREQ0
HREQ1
HREQ2
HREQ3
HREQ4
RS0
RS1
RS2
HDBI0
HDBI1
HDBI2
HDBI3
CPURST
GTLVREF
HCLK-
HA32
HA33
HRCOMP
HCOMPVREF
HD VREF0
HD VREF1
HD VREF2
HD VREF3
VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT
HAVREF0
HAVREF1
GND GND GND GND GND GND GND GND GND
DPWR
HAP0
HAP1
C142
0.01u/25V_04
H_DBI#12
H_D#31
H_D#58
H_A#27
H_A#26
H_D#21
H_D#4
R109 49.9_1%_06
H_D#29
C86
1000p/50V_04
C88
1000p/50V_04
C87
1000p/50V_04
H_DSTBN#3 2
H_D#42
H_D#62
GTLVREF_NB1
+VCCP
H_A#11
H_D#32
H_DSTBP#1 2
H_D#59
H_A#[31:3]2
H_ADSTB#12
H_DBI#3
C162
0.01u/25V_04
H_D#61
H_A#24
H_A#20
H_A#23
H_D#39
H_D#63
H_D#45
H_A#13
H_ADS#2
H_CLK-10
H_ADSTB0#2
C144
10u/10V_08A
C84
0.1u/16V_04
H_D#12
H_A#15
C135
0.01u/25V_04
H_DSTBP#2 2
H_D#35
H_A#12
H_D#3
H_A#14
C28
0.01u/25V_04
H_A#8
H_A#31
R108 100_1%_06
+VCC P
C171
0.01u/25V_04
H_CPURST#2
H_D#14
C133
0.01u/25V_04
H_D#36
H_D#20
H_A#6
H_D#8
C146
0.01u/25V_04
H_DEFER#2
H_DSTBN#0 2
+VCCP 2,3,10,15,28,29
H_D#34
H_DPWR#
H_DBI#0
GTLVREF_NB
+
C497
100u/6.3V_B
C132
10u/10V_08A
H_HIT#2
H_D#60
H_D#10
C129
10u/10V_08A
H_CLK+10
H_D#15
C34
0.1u/16V_04
H_DPWR#2
H_D#28
H_A#3
H_D#26
H_DBI#2
H_DSTBP#3 2
H_D#[63:0] 2
H_DBI#32
H_REQ#2
C699
10u/10V_08A
H_DBI#02
H_REQ#1
H_D#19
C141
0.01u/25V_04
C85
0.01u/25V_04
C35
1000p/50V_04
+VCC P
H_A#30
H_D#38
C156
1u/10V
H_D#2
H_D#23
+VCC P
H_D#33
H_A#10
H_D#1
H_DRDY#2
H_D#55
H_D#24
H_D#53 R105
100_1%_06
H_D#47
H_A#25
C149
0.01u/25V_04
H_D#22
C145
0.01u/25V_04
H_DBI#22
H_D#52
H_D#49
H_D#54
H_D#57
H_D#9
H_A#29
H_D#25
H_D#11
H_A#22
H_REQ#[4:0]2
GTLVREF_NB1
H_RS#22
H_ADSTB#02
H_A#7
R110
100_1%_06
H_D#51
H_BNR#2
H_D#48
H_D#18
C165
0.01u/25V_04
+VCC P
GTLVREF_NB
+VCCP
H_DSTBN#2 2
H_D#5
H_RS#02
H_RS#12
H_D#17
H_D#40
H_D#7
H_D#6
C700
10u/10V_08A
H_A#19
H_DBSY#2
H_A#28
H_D#56
H_D#30
HCOMPVREF
H_REQ#3
+VCCP
08-22611-2B1
C136
0.01u/25V_04
C159
0.01u/25V_04
H_TRDY#2
C158
0.01u/25V_04
H_A#16
Sheet 4 of 39
VN800 1/4

Schematic Diagrams
B - 6 VN800 2/4
B.Schematic Diagrams
VN800 2/4
MD _3
MD _2 8
C233
0.01u/25V_04
+1.8V
MCLKIT
MD _3 6
MD _1 6
C199
1000p/50V_04
MD _3 0
BA0
-CS3 9
-SWEA 8,9
C180
1000p/50V_04
-SCASA 8,9
C269
0.01u/25V_04
DQS5 8,9
MAA0
CKEA1
R131
150_1%_06
MD _2
MAA6
-DQM18,9
MAA3
MCLKO C 1 0
C253
1000p/50V_04
MD _3 4
C212
0.1u/16V_04
MD _4 7
MVREF_NB
DQS3 8,9
-DQM58,9
C251
0.01u/25V_04
MD _4 9
R114 22_04
R133
150_1%_06
MCLKI T
MD _1 9
C207
1000p/50V_04
MD _4 3
MAA8
C271
10u/10V_08
C259
33p/50V_04
ODT1 8,9
-DQM68,9
MCLKO T 1 0
DQS2 8,9
MD _2 0
MD _5 4
MD _5 8
BA1
-CS1
MD _1
MD _5 9
C191
1000p/50V_04
C225
0.1u/16V_04
BA1 8,9
MD _3 8
MD _1 5
+1.8V
ODT3 9
-SCASA
-DQM28,9
MAA12
MAA1
C241
0.01u/25V_04
MD _4 6
MD _3 7
CKEA0
MD _2 6
C197
0.01u/25V_04
C193
0.01u/25V_04
M_C LKO -
MAA11
C266
10u/10V_08
-DQM78,9
DQS1 8,9
M_C LKO -
+1.8V
DMCOMP
MD _6 3
-SWEA
MD _3 9
C175
0.01u/25V_04
MVREF_NB
MD _3 3
-SRASA 8,9
MAA[0:13] 8,9
ODT2 9
MD _3 1
C265
10u/10V_08
C272
33p/50V_04
-CS2
MCLKIT = DCLKx + 2 "
DQS6 8,9
MD _1 4
MD _6 1
C248
33p/50V_04
-CS2 9
M V REF_NB:Do n 't le s s t han 10 m ile s
C268
0.01u/25V_04
MD _2 9
MD _6
+1. 8V
M_C LKO +
-CS1
MD _2 5 MEMD ET
MD _5 1
MD _1 1
MD _2 7
MD _2 1
MD _2 2
MD _2 4
MD _9
-CS3
MD _5 7
-CS0 8,9
MD _1 7
MD _4 0
MD _4 2 +1. 8V
MD _5 2
MD _5
-CS0
MAA5
C270
10u/10V_08
MD _1 8
DQS0 8,9
C267
0.01u/25V_04
CKEA39
CKEA2
MD _5 5
ODT0 8,9
C257
1000p/50V_04
C254
0.01u/25V_04
Near to NB chip,reserve for tunning!
C153
*5p/50V_04
R113 22_04
-DQM48,9
MD _5 0
-SRASA
MD _5 3
Test Point
MD _3 5
MD _2 3
R119 4.7K_06
MD _1 2
MD _1 3
HI IS DDR2
+1. 8 V
U23B
VN800
AD28
AE27
AF27
AG28
AD27
AE29
AG27
AG29
AH29
AJ29
AG25
AJ25
AJ28
AH27
AH26
AJ26
AJ24
AG24
AJ22
AG21
AH24
AG23
AG22
AJ21
AH21
AJ20
AG18
AH18
AG20
AH19
AJ18
AG17
AJ12
AG12
AJ10
AJ9
AH12
AJ11
AG10
AH9
AG8
AJ7
AJ6
AH6
AG9
AJ8
AG5
AJ5
AH4
AJ4
AJ2
AH1
AG4
AF4
AG3
AJ1
AG1
AF2
AD3
AD1
AG2
AF3
AE1
AD2
AF13
AD15
AJ15
AJ16
AJ17
AF16
AG15
AE18
AF17
AE19
AJ14
AF12
AJ13
AF20
AE21
AH8
AD26
AE26
AF21
AF23
AE22
AF24
AF28
AJ27
AJ23
AJ19
AG11
AH7
AJ3
AF1
AF9
AF11
AE12
AD9
AF8
AG7
AF7
AF29
AG26
AH22
AG19
AH10
AG6
AH3
AE3
W12 W13 W14 W15 W16 W17 W18 W19 V19
M16
N16
P16
R16
T16
V16
AD23
AD17
AD11
AD8
V11 W11
M17 N17 P17 R17 T17 U17 V17
M15
N15
P15
U16
AF26
AH11 AH14 AH 17 AH20 AH23 AH25 AH28 AF5 AH5 AH2 AE28 AE25 AE23 AE20 AE17 AE16 AE14 AE11 AE8 AE2
AD7
V15 U15 T15 R15
AE5
AE24
AE9
AE10
AF6
AD6
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
MA0
MA1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA1 0
BA0
BA1
MA1 1
MA1 2
GND
MC LK I A
MCLKO-
CKE0
CKE1
CKE2
CKE3
DQM0
DQM1
DQM2
DQM3
DQM4
DQM5
DQM6
DQM7
SCAS
SWE
SRAS
CS0
CS1
CS2
CS3
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
VCC 18MEM VCC18MEM VCC18MEM VCC18MEM VCC18MEM VCC 18MEM VCC18MEM VCC18MEM VCC 18MEM
GND
GND
GND
GND
GND
GND
MEMV R EF 1
MEMV R EF 2
MEMV R EF 3
MEMV R EF 4
VCC18MEM VCC18MEM
GND GND GND GND GND GND GND
GND
GND
GND
GND
MCLKO+
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
MA1 3
GND GND GND GND
DMCOMP
MEM D ET
ODT0
ODT1
ODT2
ODT3
MD _5 6
R134 301_1%_06
C192
0.1u/16V_04
MD _4
M_C LKO +
MD _4 1
C221
0.1u/16V_04
MAA10
MAA7
-CS3
CKEA18,9
MAA9
(Place near their respective balls of NB)
MD _6 2
C289
33p/50V_04
-CS0
CKEA29
+1.8V 6,8,9,10,27,29
MD _0
Closed U11
BA0 8,9
DQS4 8,9
MAA2
MD _7
MCLKO+/- as short as passable
-DQM38,9
MD _4 5
CKEA3
-CS2
CKEA08,9
MD _1 0
MD _6 0
MEM D ET
MAA4
-CS1 8,9
MD _4 8
MD_[0:63]8,9
MD _8
MD _3 2
DQS7 8,9
MAA13
MCLKI T 10
-DQM08,9
MD _4 4
Sheet 5 of 39
VN800 2/4

Schematic Diagrams
VN800 3/4 B - 7
B.Schematic Diagrams
VN800 3/4
Sheet 6 of 39
VN800 3/4
DNCMD
FPD0
C243 0.01u/ 25V_04
R123 *4.7K_04
UPSTB15
FPVS 12
FPD10
C702 10u/ 10V_08A
C507 10u/ 10V_08A
DNCMD15
C188 0. 1u/16V_04
C198 0.01u/ 25V_04
C155 10u/ 10V_08A
C261 *10p/50V_04
LVREF_NB i s 0.625V
+3VS
ENAVEE 1 2
FPD4
FPD3 FPD9
+1.5 VS
FPCLK 12
C232
0.1u/16V_04
R125
10K_1%_ 06
VLAD515
AVDD2
AGPCOMPP
FPD4
+1. 5V S
C694
10u/ 10V_08
UPCMD
C502 10u/ 10V_08A
C260 *10p/50V_04
C161 0.1u/16V_04
FPD10
U23C
VN800
P3
P4
R3
R4
R1
N2
P1
R2
M3
M1
N4
L3
L1
N5
K2
R6
J2
H3
H1
K4
G1
G2
K5
G3
J6
K6
J4
F2
J5
F3
H4
E1
M2
K1
J1
L6
L4
M5
K3
J3
M4
P6
G5
F4
B3
N1
G4
N3
F1
A1
A2
B1
C3
D1
D4
D2
D3
N6
R5
P13 P14 M12 M13 M14 N12 N13 N14
D5
C4
C1
C2
E4
E3
F5
V1
U2
Y2
Y3
T2
T3
AA2
U3
W2
W1
V2
V3
AA3
W3
V4
T4
M11 N11 P11 R11 T11
AA1
AA26
AD24
AB1
R12 P12
AB3
AF25
AC1
AB2
Y14
Y16
Y18
Y20
L10
N10
R10
W10
AA25
AD25
H6
C5
G6
A3
T14 U12 T13 R13 R14 T12
Y10
Y12
M2 0
P20
T20
V20
K19
K17
K15
K13
K12
K20
U11
U10
V10
U13 U14 V12 V13 V14
M6
T1
K11
K10
AC25
A4
GD0/FPD10
GD1/FPD11
GD2/FP1C LK
GD3/FPD09
GD4/FPD08
GD5/FPD07
GD6/FPD06
GD7FPD05
GD8/FP1D ET
GD9/FP1H S
GD10/F PD01
GD11/F PD23
GD12/F PD00
GD13/F PD22
GD14/F PD21
GD15/F PD20
GD16/F PD18
GD17/F PD17
GD18/F PD16
GD19/ F PD E
GD20/F PD14
GD21/FPCLK
GD22/F PD13
GD23/F PD15
GD24/ GD VP1D09
GD25
GD26/ GD VP1D10
GD27/ GD VP1D04
GD28/ GD VP1D07
GD29/ GD VP1D06
GD30/ GD VP1D08
GD31/GD VP1DET
GC #BE0/ F PD 03
GC#BE1/SBPLD AT
GC #BE2/ F PD 19
GC#BE3/GDVP1D11
GFRAME/F PHS
GIRDY /SBPLCLK
GTRDY
GDEVSEL/FPVS
GSTOP/FP1CLK
GPAR/FP1VS
GDBIH
GRBF
GWBF/FPCLK
GADSTBF0/FPD04
GADSTBF1/FPD12
GAD STBS0/ F PD 02
GADSTBS1/FPDET
GSBA0/GDVP1VS
GSBA1/GD VP1DE
GSBA2/ GDVP1D 00
GSBA3/GD VP1HS
GSBA4/ GDVP1D 05
GSBA5/ GDVP1D 03
GSBA6/GD VP1C LK
GSBA7/GD VP1C LK
AGPVREF1
GCLK
GND GND GND GND GND GND GND GND
GREQ/SBDDCCLK
GGNT/SBDDCDAT
GSBSTBF/GDVP1D01
GSBSTBS/GDVP1D02
GST0/ENAVEE
GST1/ENAVDD
GST2/ENABLT
VD0
VD1
VD2
VD3
VD4
VD5
VD6
VBE
UPSTB+
UPSTB-
DNSTB+
DNSTB-
UPCMD
DNCMD
VLVR EF
VLCOMPP
VCC 15AGP VCC15AGP VCC 15AGP VCC15AGP VCC 15AGP
VD7
GNDAHCK
GNDAMCK
VSU S15
GND GND
SUSST
TE STI N
RESET
PWROK
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCCA33HCK
VCCA33MCK
GDBIL
AGP8XDET
AGPVREF2
AGPCOMPP
GND GND GND GND GND GND
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC15
VCC 15V L
VCC 15V L
VCC 15V L
GND GND GND GND GND
GSERR/FP1DE
AGPBUSY
VCC15
VCC15
VSU S15
AGPCOMPN
C250 0.01u/ 25V_04
R132 402_1%_06
C695
10u/ 10V_08
AVDD1
C224 0. 1u/16V_04
+3VS
FPD7
Closed U11
UPCMD15
VLAD4
C526
*10p/50V_04
VLAD115
FPD11
C504
0.1u/16V_04
VLAD615
DNCMD
C263 *10p/50V_04
C286 *10p/50V_04
FPD8
C167 0.1u/16V_04
C244
*5p/50V_04
+1. 5VS
AVDD1
SUS_S T#14
FPDE
FPD1
AGP8xdet 0=enable
BLON 21
+1.5 VS
PWROK_NB#14
VLAD1
C170 0. 1u/16V_04
C215
0.1u/16V_04
VLAD6
C216
10u/ 10V_08
AGPCOMPN
C258
0.1u/16V_04
R124
10K_1%_ 06
FPD11
C148 0. 1u/16V_04
UPSTB#
+1. 5V
VLAD715
R116
1K_04
C262 *10p/50V_04
+1. 8V
C275 *10p/50V_04
FPD3
ENAVD D 11
DNSTB
C249 0.01u/ 25V_04
FPD7
C505
0.1u/16V_04
C255 *10p/50V_04
Strapping For NB_TEST Mode
TESTIN RBF WBF
1 x x
Disable all TEST mode
C202
0.1u/16V_04
VBE#
UPSTB#15
C223
0.1u/ 16V_04
C226 0.01u/ 25V_04
C247 *10p/50V_04
DNSTB#15
FPCLK_N
C264 *10p/50V_04
C237 0. 1u/16V_04
Reserve for Future
VLAD315
C152 0.1u/16V_04
VLAD215
C528
*10p/50V_04
LCOMPP
C185 0.1u/16V_04
+1.8V 5,8 ,9,10, 27, 29
UPSTB
FPD6
VLAD7
VBE#15
C529
*10p/50V_04
C172 0.01u/ 25V_04
+1.5VS
+1.5VS 3, 12, 16,21, 29
C506
0.1u/16V_04
C238 0.1u/16V_04
FPHS 12
C157 0. 1u/16V_04
C701 10u/ 10V_08A
GCLK_NB 10
LVREF_NB
FPD2
+1. 5VS
C210
0.1u/16V_04
FPD6
C203
0.01u/ 25V_04
C222
1000p/50V_04
L13
HC B1608KF -121T25
R130
442_1%_04
C530
*10p /50V_04
L14
HCB1608KF-121T25
VLAD0
C211 0.01u/ 25V_04
C163
10u/ 10V_08
C166 0.01u/ 25V_04
+3VS 2,7, 8, 10, 11,1 2, 13, 14,1 5, 16, 17, 19,21, 22, 24,25,26, 28,29
DNSTB#
C246 *10p/50V_04
C151
10u/10V_08
C160
10u/ 10V_08
VLAD2
R120 4.7K_04
FPDE 12
C531
*10p/50V_04
C208
0.01u/25V_04
UPSTB#
FPD[ 0. . 11]
TES TI N _N B
UPSTB
DNSTB#
C242 0. 01 u/ 25V_04
+1. 5V 29
VLAD3
+1.5VS
FPD1
R129
619_1%_06
C273 *10p/50V_04
FPD[0..11] 12
DNSTB
C527
*10p/ 50V_04
AGP8XDET#
C252 10u/ 10V_08A
FPD5
C179 0. 1u/16V_04
VLAD015
C256 *10p/50V_04
FPD9
AGPVREF 1
For EMI.
DNSTB15
AVDD2
FPD0
LVREF_NB
R126 60.4_1%_06
VLAD415
FPD2
FPD8
FPD5
C176
10u/10V_08
AGPBZ 15
6-13-61901-26C
+1. 5VS
VLAD5
RESET_NB#13
C703 10u/ 10V_08A
UPCMD
R122 60.4_1%_06

Schematic Diagrams
B - 8 VN800 4/4
B.Schematic Diagrams
VN800 4/4
Sheet 7 of 39
VN800 4/4
DISPCLKO 12
M9
M-MA R K1
M12
M-MAR K1
EP4
SMD79X197R
TVD 7
DISPCLKI
H7
H7_5D2_8
VCCDAC2
C169
22p/50V
1: One 24-bit Panel interface
R365
*4.7K_04
0: External AGP
SW3_3 DVP0D6/TV D6 =>De dicate d TV D Por t Se le ction
GUI C LK
R111
4.7K_04
ID1
C177
0.1u/16V_04
EP1
SMD79X197R
TVD 6
1
H15
MTH296D111
2
3
4
5 6
7
8
9
VCCPLL1
VCCPLL2
H8
C296D185N
DAC_GREEN 21
TVD 4
R363
4.7K_04
0: Disable
M7
M-MAR K1
H3
C237D83
0: Disable
TVD 9
L22
HCB1608KF-121T25
TVD 8
R362
4.7K_04
M10
M-MARK1
+3VS
LCDID311
AR
C187
0.1u/ 16V_04
0: TM DS
+3V S
H20
C158D158
1: TV Encode r
M6
M-MA R K1
U23D
VN800
D6
E6
B7
C6
A9
B6
A5
B5
A6
B8
A8
E11
C11
C10
E10
D11
B10
A10
A7
D9
E9
D10
E8
E7 D7 D8 C7 L13 L12
C13
B13
A13
D13
E13
D12
C12
A12
B12
E12
B11
A11
B4 E2 E5 H2 H5 L2 L5 P2 P5 U1 U4 Y1 B2 A14
C8
C9
L14
B9
GNDADAC2
GNDADAC1
GND APLL1
GND APLL2
INTA
AR
AG
AB
RSET
HSYNC
VSYNC
GPO0
GPOUT
DVP0VS/ TVVS
DVP0HS/TVHS
DVP0CLK/ TVCLK
DVP0DE/TVDE
TVC LKR
XI N
SPCLK1
SPCLK2
SPD1
SPD2
VCCA33DAC1 VCC A33DAC2
VCCA33PLL1 VCCA33PLL2
VCC33GFX VCC33GFX
DVP0D00/ TVD00
DVP0D01/ TVD01
DVP0D02/ TVD02
DVP0D03/ TVD03
DVP0D04/ TVD04
DVP0D05/ TVD05
DVP0D06/ TVD06
DVP0D07/ TVD07
DVP0D08/ TVD08
DVP0D09/ TVD09
DVP0D10/ TVD10
DVP0D11/ TVD11
GND GND GND GND GND GND GND GND GND GND GND GND GND GND
DISPCLKI
DISPCLKO
VCC33GFX
DVP0DET
R112 4.7K_04
R364 4.7K_04
0: Internal GFX PLL
SW3_1 DVP0D4/TV D4 =>AGP Por t M u xing
L23
HCB1608KF-121T25
C201
1000p/50V_04
L20 BK1608HS121
1 2
M5
M-MAR K1
1
H6
MTH296D111
2
3
4
5 6
7
8
9
H2
C158D158
M14
M-MAR K1
R367
4.7K_04
H23
C355B158D158
1
H12
C296D111N
2
3
4
5 6
7
8
9
1
H19
MTH296D111
2
3
4
5 6
7
8
9
Trace width = 10 mils
VCCDAC1
H16
C67D67
This pin needs to be connected to GND, if spre ad
spectrum is not im plemented.
EP5
SMD118X197R
C173
22p/50V
C178
22p/50V
+3VS
R563 4.7K_04
TVD 10
ID2
M2
M- MA R K1
L15
HCB1608KF-121T25
TVD 9
C219
1000p/50V_04
VCCDAC1
EP2
SMD79X197R
DVP0D7/TV D7 =>GFX Cl ock Se lect( VCK/LCDCK/ECK)
C196
1000p/50V_04
TVD 10
1
H18
C296D111N
2
3
4
5 6
7
8
9
DISPCLKO
EP3
SMD79X197R
+3V S
ID3
DAC_HSYNC 21
1
H11
C296D111N
2
3
4
5 6
7
8
9
R534
4.7K_04
TVD 8
0:From NB
+3VS
H1
C158D158
SMBCK2 11
DAC_BLUE 21
LCDID011
M11
M-MA R K1
H10
C236D106
AG
R562 *4.7K_04
1
H17
MTH296D111
2
3
4
5 6
7
8
9
DISPCLKI 12
VT1637GPOUT
H14
C236D106
C200
0.1u/ 16V_04
GFX power up strapping setting:
TVD 6
[Keep 1 as option,for Debug purpos e]
C189
0.1u/ 16V_04
H22
C355B158D158
LVDS_DUAL11,12
VCCPLL1
LCDID111
DAC_RED 21
R121 80. 6_1%_06
DAC_DDCACLK 21
0: Two 12-bit FPD interface
TVD 5
VCCPLL2
H13
C236D106
1:From External
Closed U11
C213
0.1u/ 16V_04
H24
C355B158D158
TVD 5
M13
M-MARK1
1
H5
C355CH512B296D111N
2
3
4
5 6
7
8
9
C228
0.1u/ 16V_04
M8
M-MARK1
SW3_2 DVP0D5/TV D5 =>De dicate d DVI Por t Co nfig ur ation
LCDID211 AB
1:From External
L19 BK1608HS121
1 2
+3VS 2,6,8,10,11,12,13,14,15,16, 17,19,21,22,24,25,26, 28,29
M1
M-MARK1
GUI C LK 10
1
H4
C355CH512B296D111N
2
3
4
5 6
7
8
9
C205
1000p/50V_04
1: Enable
For EMI
R368 4.7K_04
M3
M-MAR K1
R115 *4.7K_04
PCI_INTA# 13,24
VCCDAC2
TVD 4
SW3_4 DVP0D8/TV D8 =>Exte rn al AGP Func tion Enab le
H21
C158D158
R535 *4.7K_04
SMBDT2 11
VT1637-GPO0
R361 *4.7K_04
1: Internal AGP
DAC_DDCADATA 21
DVP0D10/TV D10 =>CPUC K/M CK Clo ck Se le ct
TVD 7
R117
4.7K_04
SW3_5 DVP0D9/TV D9 =>PCI Signal Te s t Output Enable
RSET
R360 *4.7K_04
R372 22_04
L18 BK1608HS121
1 2
M4
M-MAR K1
+3V S
DAC_VSYNC 21
TVD 11
L16
HCB1608KF-121T25
1: Enable
+3VS
TVD 11
H9
H6_0D2_3
R575 Place near to NB

Schematic Diagrams
DDR2-1 B - 9
B.Schematic Diagrams
DDR2-1
Sheet 8 of 39
DDR2-1
DCLK1-10
+1.8V
-CS05,9
MD_60
CKEA05,9
DQS65,9
MA A1 2
C293 0.1u/ 16V_04
MD_25
MD_0
D8
BAV99
C
AC
A
MD_30
SMB_SBCLK9,10,14, 16
MD_36
-DQM1
CKEA15,9
MVREF_DIM1
-DQM3
+
C339 150u/4V_B
MD_59
+3V
SMB_SBDATA9,10,14, 16
MAA8
MA A1 1
MD_15
MD_51
VDDSPD
MD_31
C190 0.1u/ 16V_04
MD_42
-SC ASA5,9
-DQM25,9
MAA1
MAA5
MAA6
MD_12
MAA4
C302 0.1u/ 16V_04
CN1
DDR SODIMM AAA-DDR-016-001
102
101
100
99
98
97
94
92
93
91
105
90
89
116
107
106
85
110
115
10
26
52
67
130
147
170
185
109
113
108
79
80
30
32
164
166
13
11
31
29
51
49
70
68
131
129
148
146
169
167
188
186
195
197
198
200
1
199
114
119
2
3
8
9
12
15
18
21
24
81 87 95 82 88 96 103 111 117 104 112 118 50 69 83 84 86 120 163
5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194
168
171
172
177
178
183
184
187
190
193
196
27 28 33 34 39 40 41 42 47 48 53 54 59 60 65 66 71 72 77 78 121 122 127 128 132 133 138 139 144 145 149 150 155 156 161 162 165
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
BA0
BA1
BA2
CS0
CS1
DQM0
DQM1
DQM2
DQM3
DQM4
DQM5
DQM6
DQM7
WE
CAS
RAS
CKE0
CKE1
CK0
CK0
CK1
CK1
DQS0
DQS0
DQS1
DQS1
DQS2
DQS2
DQS3
DQS3
DQS4
DQS4
DQS5
DQS5
DQS6
DQS6
DQS7
DQS7
SDA
SCL
SA0
SA1
VREF
VDDSPD
ODT0
ODT1
GND
GND
GND
GND
GND
GND
GND
GND
GND
VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9
VDD10 VDD11 VDD12
NC1 NC2 NC3 NC4 NC5 NC6
NC/TEST
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
MD_20
C301 0.1u/ 16V_04
-SR ASA5,9
-DQM2
MVREF_DIM1
MD_56
MD_54
MD_53
DCLK0+
MD_9
MD_10
C278 0.1u/ 16V_04
-DQM7
ODT05,9
-DQM65,9
MD_62
MD_21
MD_4
C217 0.1u/ 16V_04
D12
BAV99
C
AC
A
MD_1
DCLK0+10
-DQM6
DQS45,9
-DQM5
R147
75_1%_06
+3VS 2,6,7,10, 11,12 ,13, 14, 15, 1 6, 17, 19, 21,2 2, 24, 25,26,28, 29
MD_40
MD_29
C307
2.7p/ 50V_04
MD_19
MD_49
MD_23
MD_6
C277 1000p/50V_04
MD_2
C691 10u/ 10V_08
MA A[ 0 : 1 3 ]5,9
C282 0.1u/ 16V_04
R149 10K_04
MAA2
MD_22
DCLK0-
C296 0.1u/ 16V_04
C539 0.1u/ 16V_04
MD_43
+1.8V 5,6,9,10,27,29
MD_38
C283 0.1u/ 16V_04
C280 0.1u/ 16V_04
MD_46
-DQM75,9
-DQM55,9
R150 10K_04
MD_61
20Mils
MD_[ 0: 63] 5 ,9
-DQM0
+
C713 150u/4V_B
C274 10u/ 10V_08
DCLK1+10
MD_5
C279 0.1u/ 16V_04
DQS75,9
+
C714 150u/4V_B
MAA3
BA15,9 MD_13
MD_44
C184 0.1u/ 16V_04
C291
0.1u/16V_04
C281 0.1u/ 16V_04
C284 0.1u/ 16V_04
+3V
MD_24
C711 10u/ 10V_08
+3V 9,10,13,14,15,16,18, 20,21,26, 28
DCLK0-10
C295 0.1u/ 16V_04
-CS15,9
MD_16
MA A1 3
MD_58
MD_3
-DQM4
DCLK1-
Closed to CN2.
DQS35,9
MA A1 0
-SW EA5,9
C229 0.1u/ 16V_04
MD_35
MD_34
MD_52
MD_11
D5 SCS751V-40
A C
+1. 8V
BA05,9
MD_26
MAA9
R145
75_1%_06
MD_41
MD_18
MD_45
MD_63
MD_57
Closed to SODIMM
+3VS
MD_50
MD_7
+1. 8V
MD_48
C308 0.1u/ 16V_04
DQS55,9
MAA0
MAA7
C245 0.1u/ 16V_04
-DQM35,9
MD_55
MD_17
DCLK1+
MD_37
C304
2.7p/ 50V_04
C712 10u/ 10V_08
MD_39
-DQM45,9
MD_47
MD_8
MD_32
C540 0.1u/ 16V_04
ODT15,9
MD_28
MD_33
DQS15,9
DQS25,9
C297 0.1u/ 16V_04
DQS05,9
-DQM05,9
MD_27
MD_14
-DQM15,9

Schematic Diagrams
B - 10 DDR2-2
B.Schematic Diagrams
DDR2-2
Sheet 9 of 39
DDR2-2
-DQM05,8
MD_4
C306 0. 1u/16V_04
-DQM35,8
MD_36
MAA9
R154
75_1%_06
DCLK3+10
MD_6
MAA 5
ODT35
DCLK2-
MAA 9
VDD SPD
MD_21
C519 0. 1u/16V_04
C538 0. 1u/16V_04
-CS35
MAA6
+VTT_ME M 2 7
MD_55
C557 0. 1u/16V_04
RN26
47_04_8P4R
8 1
7 2
6
5
3
4
R153
75_1%_06
CKEA25
C558 0. 1u/16V_04
MD_22
MD_44
C537 0. 1u/16V_04
MD_14
MD_49
MD_25
BA05,8
MAA 2
MAA 0
MD_34
MD_56
C555 0. 1u/16V_04
MAA 1 3
C522 0. 1u/16V_04
DCLK3-
RN27
47_04_8P4R
8 1
7 2
6
5
3
4
ODT05,8
BA05,8
MD_11
C543 0. 1u/16V_04
MD_16
MD_62
C317
2.7p/ 50V_04
MD_28
MD_13
-DQM7
MD_5
C523 0. 1u/16V_04
MAA 4
MD_53
R165 10K_04
-DQM65,8
DQS35,8
MAA 7
MD_59
MD_31
RN29
47_04_8P4R
8 1
7 2
6
5
3
4
-SRASA5,8
+1. 8V
SMB_SBDATA8,10, 14,16
MD_54
MD_7
MD_39
MAA 6
+3V
-DQM55,8
MAA 1 2
MAA 8
MAA10
MD_38
C556 0. 1u/16V_04
DQS05,8
R166 10K_04
MAA [ 0: 13 ]5, 8
-DQM25,8
DQS45,8
MAA3
-SRASA5,8
MD_29
MAA2
-SWEA5,8
MD_2
MD_60
MD_63
DQS75,8
MD_47
MD_17
CKEA15,8
CN2
*DDR SODIM M AA A-DDR-014- 001
102
101
100
99
98
97
94
92
93
91
105
90
89
116
107
106
85
110
115
10
26
52
67
130
147
170
185
109
113
108
79
80
30
32
164
166
13
11
31
29
51
49
70
68
131
129
148
146
169
167
188
186
195
197
198
200
1
199
114
119
2
3
8
9
12
15
18
21
24
81 87 95 82 88 96 103 111 117 104 112 118 50 69 83 84 86 120 163
5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194
168
171
172
177
178
183
184
187
190
193
196
27 28 33 34 39 40 41 42 47 48 53 54 59 60 65 66 71 72 77 78 121 122 127 128 132 133 138 139 144 145 149 150 155 156 161 162 165
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
BA0
BA1
BA2
CS0
CS1
DQM0
DQM1
DQM2
DQM3
DQM4
DQM5
DQM6
DQM7
WE
CAS
RAS
CKE0
CKE1
CK0
CK0
CK1
CK1
DQS0
DQS0
DQS1
DQS1
DQS2
DQS2
DQS3
DQS3
DQS4
DQS4
DQS5
DQS5
DQS6
DQS6
DQS7
DQS7
SDA
SCL
SA0
SA1
VREF
VDD SPD
OD T0
OD T1
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
GN D
VDD 1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD 8 VDD 9
VDD10 VDD11 VDD12
NC1 NC2 NC3 NC4 NC5 NC6
NC/TEST
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
MD_8
-CS25
DQS65,8
-CS35
ODT25
MD_20
+1.8V 5,6,8,10,27,29
MD_9
MAA 3
MD_37
MAA0
MD_58
C520 0. 01u/25V_04
C299 1000p/ 50V_04
CKEA35
MD_57
MD_15
-DQM4
MD_1
MAA 1
MD_48
-DQM0
MAA 1 3
-CS15,8
MD_61 C303 0.1u/16V_04
MD_27
MD_12
C300 0. 1u/16V_04
MAA 1 2
C305 0. 1u/16V_04
DQS25,8
MD_42
MD_26
DCLK2+
BA15,8
-SCASA5,8
RN33
47_04_8P4R
8 1
7 2
6
5
3
4
-DQM1
DCLK2+10
+3V 8,10,13,14,15, 16,18,20,21, 26,28
DCLK3+
+VTT_ MEM
MD_33
C521 0. 01u/25V_04
C544 0. 1u/16V_04
MAA4
MAA1
RN32
47_04_8P4R
8 1
7 2
6
5
3
4
MD_18
MAA5
-DQM75,8
SMB_SBCLK8,10, 14,16
-CS05,8
BA15,8
C298 0. 1u/16V_04
C542 0. 1u/16V_04
MD_[ 0:63] 5,8
MD_32
-DQM5
MVREF_DIM2
MAA 1 0
Bruce 5/08
MAA8
MD_10
MAA7
MD_40
+1. 8V
-DQM6
-DQM2
DQS55,8
MD_43
+
C548 *150u/4V_B
CKEA25
MD_19
DCLK3-10
C545 0. 1u/16V_04
RN34
47_04_8P4R
8 1
7 2
6
5
3
4
C547
2.7p/ 50V_04
RN35
47_04_8P4R
8 1
7 2
6
5
3
4
20Mils
MD_3
ODT35
MD_46
MD_52
MVREF_DIM2
-DQM3
-SCASA5,8
MAA 1 1
-CS25
MD_50
CKEA05,8
-DQM45,8
RN28
47_04_8P4R
8 1
7 2
6
5
3
4
MD_45
CKEA35
-SWEA5,8
MD_0
C292 0. 1u/16V_04
DCLK2-10
MAA 1 1
MD_41
C554 0. 1u/16V_04
+1. 8V
MD_51
MD_30
Closed to SODIMM
-DQM15,8
MD_35
ODT25
MD_24
MD_23
C541 0. 1u/16V_04
C309
0.1u/16V_04
DQS15,8
ODT15,8

Schematic Diagrams
CLOCK GENERATOR, CCD B - 11
B.Schematic Diagrams
CLOCK GENERATOR, CCD
Sheet 10 of 39
CLOCK
GENERATOR, CCD
C41 0.1u/16V_04
C214
0.01u/25V_04
FS0
C209
10u/10V_08
C44
0.01u/ 25V _04
H_CLK- 4
DK1-
DK2-
C37
0.01u/25V_04
+3VS
DK0+
48mils
133
+2. 5 VS
C97
0.1u/16V_04
R48 51_1%_06
L4 HCB2012KF-500T40
C182
0.01u / 25V _04
C114 10p/50V_04
C96
0.01u/ 25V _04
L
1
USB_CLK 13
RN 16 0_04_ 4P2R
1 4
2 3
CPU_BSEL02
C231 0.1u/16V_04
48m ils
ON
DK3-
Change 10pf to 27pf.
RN 12 22_04_4P2R
1 4
2 3
+1.8V
DCLK2- 9
C239
0.01u/25V_04
100
3V66_0
L1
HCB2012KF-500T40
SATA25MH Z
R51 51_1%_06
C24 0.1u/16V_04
RN6
33_ 04_4P 2R
14
23
YONAH
PCLK_MPCI
C23
10u/10V_08
C43
0.01u/ 25V _04
C123 0.1u/16V_04
+1.8V
CLK_PWRGD
C115 10p/50V_04
2
DK2+
C113 10p/50V_04
C111 10p/50V_04
RN11
22_ 04_4 P2R
1 4
2 3
SATA25MHZ
Q22
2N3904
B
E C
RN9
22_04_4P2R 1 4
2 3
C69
0.1u/16V_04
L3
HCB 2012K F -5 00T40
OFF
C117 10p/50V_04
R87 *1K_04
AUTOS0
RN5
33_ 04_4P 2R
14
23
RN8
22_04_4P2R
14
23
ON
+VCCP 2,3,4,15,28,29
R57 22_04
R15
100 K_04
+3VS
R81 22_04
H
133
C99
0.01u/25V_04
FS1
VLINKCLK 15
CLK_RESET
C220
0.1u/16V_04
R92 10K_04
FS3
GU I CL K
R80 10K _04
+2.5VS
+1.8VBFR
Q19
2N 39 04
B
E C
166
CLK_PWRGD
L17 HCB2012KF-500T40
R53 4.7K_04
GC LK _N B
-CPU_STOP
C122 0.1u/16V_04
C36 10p/50V_04
CPU
+V C C P
KBC_PCLK 20
+5VS 11,14,16,17,19,20,21,22,23,25,26
C110 10p/50V_04
R45 10K_04
SB_OSCCLK 14
+1.8VBFR
PCLK_PCM 24
GUICLK 7
CLK_CPU_BCLK# 2
USB_CLK
C235 0.1u/16V_04
C8
10u/ 10 V_08
100
+3V S
C227
10 u/ 10V_0 8
C112 10p/50V_04
D2 1SS355
AC
R83 10K_04
U5
ICS952906FLF-T
48
24
10
17
34
6
11
18
23
28
37
43
47
4
5
32
31
30
2
21
22
29
26
25
7
8
42
27
40
3
3933
3846
41
9
12
13
14
15
16
19
20
1
45
44
36
35
VDDA
VDD48
VDDPCI1
VDDPCI2
VDD
GND
GND
GND
GND
GND
GND
GND
GND
X1
X2
SDATA
SCLK
RESET
REF1/FS0
48MHZ /F S3
24_ 48MH Z / SEL 24_4 8
3V66_0
3V66_1
3V66_2
PCI_F0/FS2
PCI_F1/FS4
CPUCLKT1
VDD3V66
VDDC PU
VDDR EF
CPUCLKT0VTT_PWRGD/PD
CPUCLKC0IR EF
CPUCLKC1
PCI_F 2
MODE/PCICLK0
PCIC LK1
PCIC LK2
PCIC LK3
PCIC LK4
PCIC LK5
PCIC LK6
REF0/FS1
CPUC LKT_ITP/PCI_STOP
CPUCLKC_ITP/CPU_STOP
25Mhz_0
25Mhz_1
DK3+
HCLK-_
C59
10u/ 10V_08
C206
0.01u/25V_04
OFF
SMB_SBDATA8,9,14,16
HCLK+_
CLOCK GENERATOR
H
+3VS 2,6, 7, 8, 11, 12, 13,1 4, 15,16,17 , 19 ,21, 22, 24, 25,2 6, 28 ,29
Q3
2N 70 02
G
DS
C26 0.1u/16V_04
-CPU _S TOP
R94
10K_04
CPU_BSEL12
SEL 24_48
C236 0.1u/16V_04
R38 10K_04
U7
ICS9P936FLF-T
10
21
27
1
9
28
2
16
15
3
12
5
7
13
18
20
24
6
8
14
17
19
23
11
26
25
4
22
VDD2.5/1.8-0
VDD2.5/1.8-1
VDD2.5/1.8-2
AVDD2.5-0
GND
GND
AGND
SDATA
SCLK
BUF_INT
FB_OUTC
DDRT0
DDRT1
DDRT2
DDRT3
DDRT4
DDRT5
DDRC0
DDRC1
DDRC2
DDRC3
DDRC4
DDRC5
FB_OUTT
AVDD2.5-1
AGND
BUF_INC
GND RN15 22_04_4P2R
1 4
2 3
RN 14 22_04_4P2R
14
23
+3.3VCLK
C194
4.7u/10V_08
+3.3VCLK
+VCC_CCD
CLK_ R E SE T
R84 1K_04
DCLK3- 9
RESERVED
SMB_SBDATA8,9, 14,16
DCLK0- 8
R91 1K_04
C7
0.1u/16V_04
R77 22_04
RESERVED
C38 10p/50V_04
C181
0.01u/ 25V _04
PCISTOP#14
FS2
OFF
+VCC_CCD 21
+3V 8,9,13,14,15,16,18,20,21, 26,28
FS0
PCLK_LPC 19
GCLK_NB 6
X2
14.318 MHz
1 2
R88
10K_ 04
DCLK3+ 9
PCLK_LPC
H
3V66_1
ON
C116 10p/50V_04
C81
10u/10V_08
FS2
C230 0.1u/16V_04
+1.8V 5,6,8,9,27,29
FS4
Q2
NDS352AP-NL
G
DS
ON
DCLK1- 8
FROM H8 def HI
DCLK2+ 9
R75 22_04
C234
0.01u/25V_04
CCD_EN20
FS1
L
MC L KI T 5
RN7 0_04_4P2R
1 4
2 3
R79 1K_04
C39 10p/50V_04
C100
0.01u/25V_04
200
+3. 3 VC L K 2 6
CCD
POWER
PCLK_PCM
R50 51_1%_06
Q12
2N 70 02
G
DS
33
PCISBCLK 15
CPUCLK-__
DK1+
C47
0.01u/25V_04
R55
475_1%_06
PCISB C LK
C91
27p/50V_06
MOD E
AUTOS1
RN10
22_04_4P2R 1 4
2 3
+2.5VC LK
0/1: mobile mode / Desktop
DK0-
L
FS1
33
PCLK_MPCI
SMB_SBCLK8,9, 14 ,1 6
SW4
SW -4X2_4
1 2
4 3
R76 10K_04
+5V S
+5VS
SMB_SBCLK8,9,14,16
-PC I_S TOP
C204
*5p/50V_04
OFF
MCLKO T5
C16
0.1u/16V_04
R7
10K_04
C3
0.1u/16V_04
BSEL1
KBC _PC LK
SB_OSCCLK
VLI N KC LK
L
+3.3VC LK
MODE
R118 22_04
RN 13 22_04_4P2R
1 4
2 3
+3VS
MCLKO C5
R56 1K_04
33
R78 10K _04
H_CLK+ 4
+2.5VS 2,12,13,14,15,21,26,28,29
H
PCI
+VCCP D3 1SS355
AC
R86 10K _04
48mils
APICCLKSB 15
FS3
C98
0.01u/25V_04
R42 10K_04
SATA25MHZ14 CLK_CPU_BCLK 2
-PCI_STOP
+3V S
CLKEN#28
CPUCLK+__
APICCLKSB
C46
0.01u/25V_04
BSEL0
FS0
FS4
CPUSTP#14
C195
*5p/50V_04
33
PCLK_MPCI 16
DCLK0+ 8
Modufy A1 rev
+3V
DCLK1+ 8
+2. 5 VC L K
C89
27p/ 50 V_06
R49 51_1%_06
C109 10p/50V_04

Schematic Diagrams
B - 12 PANEL, INVERTER, FAN
B.Schematic Diagrams
PANEL, INVERTER, FAN
Sheet 11 of 39
PANEL, INVERTER,
FAN
ID3
0
LVDS-U0P
R4
10K_1%_06
R551 *0_06
1
L35
HCB2012KF-500T40
OFF
LVDS-U1P 12
LVD S-U 1N 12
R291 4.7K_04
LVD S-U 2N 12
LVDS-LCLKP
LVDS-L2N
JFAN-1
85205-0300
3
2
1
Q15
AO3415
G
DS
1. Pin S & pin D
trace width Min.
80 mils.
R576 Mounted.
0
LVDS-L1P 12
LVDS-L1P
1
LVDS-L1N
EDID
16
R549 *0_06
+
-
U18A
LM358-01
3
2
1
84
Layout Note:
R68
CPU_FANSEN20
1
ON
R288
*2.2M_06
R58
200_06
CPU FAN
0
15 XGA
5
C 438 10U / 10V_0 8
CP4
*10p_04_8P4C
18 27 36 45
PANEL ID SELECTOR
ON
SW1-1
LVDS-L0N 12
LVDS-U0N
LVDS-U CLKN
LVDS-L2N
LVDS-UCLKN
1
Closed to JFAN-1
R4
LVDS-U1N
CP2
*10p_04_8P4C
18 27 36 45
0
LVDS-LCLKP
80mils
1
15 SXGA+
ENAVDD6
C66
0.1u/16V_04
FAN CONTROL
0
LVDS-U2P 12
LVDS-U1N
ID0
EDID Mode
+3VS
C42
0.1u/16V_04
S
+5VS
0
12
ON
43
SW1
NHDS-04-T
3
4
1
2
5
6
7
8
1400x1050
1
LVDS-U1P
SI3457
1
R3
10K_1%_06
CP1
*10p _04_8P4C
18 27 36 45
R68,R70,R573,R574 Not Mounted.
R576 Not Mounted.
LVD S-LCLKN 12
LVDS-UCLKP 12
R574
10K_ 06
1
LVDS-L1N 12
4
C437
0.1u/16V_04
7
1280x1024
Cable Mode
LVDS-L0P
C715
150P / 5V_ 06
12
ON
0
LVDS-UCLKN 12
LCDID1 7
R287 120K_04
2
CH
EDID Mode
LVDS-U2N
IDD3
Q17
2N7002
G
DS
R2
10K_1%_06
Cable
2
LVDS-L1P
C70
0.1u/16V_04
R576
*10K_1%_06
2A
ON OFF
1
LVDS-LCLKN
PANEL
LVDS-L0N
R5
Q16
DTD114EK
CE
B
80mils
ON
+3VS
LVD S-LCLKP 12
+3VS 2,6,7,8,10,12,13,14,15,16,17,19,21,22,24,25,26,28,29
PLVDD
LCDID3 7
R359 1K_04
LVDS-L2N 12
PANEL ID
LVDS-L0P
R60
330K_04
LVDS-L2P
LVDS-U2N
2A
1
PLVDD
IDD0
R5
10K_1%_06
LVDS_Dual High is Dual mode.
3
1
0
CPU_FANON20
LVDS-UCLKP
1
1280X800
C439
10U / 10V_ 08
R573
10K_06
Mode
1600x1200
+3VS
LCDID2 7
C48
0.1u/16V_04
LVDS-LCLKN
CPU_F ANSEN
+
-
U18B
LM358-01
5
6
7
CP3
*10p_04_8P4C
18 27 36 45
0
4
+5VS
LVDS-L2P 12
PMOS
2
R68 *0_06
RN1
ON
1024X768
Resolution
LCDID0 7
LVDS-U1P
LVDS-U2P
D281SS355
AC
RN1 1K_06_8P4R
1
2
3
4 5
6
7
8
3
1
14 WXGA
SW1-2
R64
100K_04
R70 *0_06
1280X768
R290 10K_1%_04
1
LVDS-L2P
1
LVDS-U CLKP
Cable M ode
IDD1
1
LVDS-U0P 12
LVD S-U 0N 12
C716
150P/5V_06
12
G
SW1-4
OFF
FANON
ID1
R550 *0_06
R59 100K_04
OFF
SMBDT2 7
LVDS-U0N
FANON
ON
LVDS_DUAL 7,12
6
LVDS-U0P
R289 4.99K_1%_04
JLCD-1
LVC-C30SFYG
GND 1
GND 2
GND 3
GND 4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
G1
G2
G3
G4
SW1-3
LVDS-L0P 12
SMBCK2 7
0
R2 Not M ou nte d.
LVDS-L1N LVDS-U2P
C431 0.1u/16V_04
Q45
NDS352AP-NL
G
D S
D
R70
2
R3
LVDS-L0N
D27
SCS7 51 V-40
A C
+
C436
100u/6.3V_B2
1
+3VS
+5VS 10,14,16,17,19,20,21,22,23,25,26
R68,R70, R573,R574 Mounte d.
NDS352AP
PANEL
TYPE
C61
0.1u/16V_04
OFF
R2 Mounted.

Schematic Diagrams
VIA LVDS VT-1637 B - 13
B.Schematic Diagrams
VIA LVDS VT-1637
MR A
Mo un t ed
PLLVCC
LVDS_CLKIN
LVDS-L0P 11
LVDS_PD#
LVDSGND
PM_PWROK13,15, 21
R328
U20
VT1637
36
37
38
39
40
41
43
44
45
46
47
48
3
4
6
7
8
9
23
24
20
21
17
18
11
12
16
15
42
31
30
33
28
2
34
32
1 5 27 2935
10 26
25
1314
19 22
D[0]
D[1]
D[2]
D[3]
D[4]
D[5]
D[6]
D[7]
D[8]
D[9]
D[10]
D[11]
CLK2+
CLK2-
A5+
A5-
A4+
A4-
A0+
A0-
A1+
A1-
A2+
A2-
A3+
A3-
CLK1-
CLK1+
XC L K
HSYNC
VSYNC
DE
R_FB
DUAL
PDB
VREF
VCC 25
VCCLVDS
VCCPLL
VCC 25GND
GNDLVDS GND PLL
VSWING
VCCLVDSGNDLVDS
GNDLVDS VCCLVDS
Not Mounted
+1.5VS 3,6,16,21,29
FPD_D10
*0. 1u/16V_04C105
Single channel output
EDG E
FPHS6
LVDSGND
+1. 5 VS
DVDD
FPDE6
PLLGND
M 540S
*0.1u/50V
C470
FPD_D7
*0.1u/50V
C463
PLLGND
+3VS 2,6,7,8,10, 11,13,14, 15,16,17,19,21,22,24,25,26,28,29
FPD5
C484
0.1u/ 16V_04
C495
0.1u/ 16V_04
LVDS-UCLKN 11
LVDS_D E
FPD2
1u/10V
C487
CLKINP
FPD[0.. 11]6
1u/10V
C101
LVDS-L2P 11
LVDS_DUAL
Low
EDGE
0.1u/16V_04
C467
0.01u/25V_04
C461
R346 22_04
1u/10V
C464
L38 HCB1608KF-121T25 +2.5VS 2,10,13,14,15,21,26,28,29
ENAVEE6
C479
0.1u/16V_04
10u/10V_08
C458
R319
1K_04
FPVS6
FPD_D11
R322
2.4K_1%_06
0.01u/ 25V_04
C465
0.1u/16V_04
C460
LVDS_VREF
0.1u/ 16V_04
C486
L37 HCB1608KF-121T25
R345 0_04
Rising Edge
0.1u/16V_04
C468
ON
+3VS
R318
2.2K_04
SR1
C492
0.1u/ 16V_04
R325 1K_04
SUSB26,27,29
FPD_D0
R353 22_04
+2.5VS
LVDS-U0N 11
LVDS_VREF
Rising Edge
FPD0
R333
1K_1%_06
Q52
2N7002
G
S D
SR1
U21
P2040C
1
2
3
4 5
6
7
8
C496
0.1u/16V_04
10u/10V_08
C489
Falling Edge
+2.5VS
Dual channel output
LVDS-L0N 11
FPD8
EDGE
MR A
D31 *1SS355AC
R350 *0_04
DGND
PLLVCC
LV DS _H SY N C
0.1u/ 16V_04C474
C471
10p/50V_04
M550S/ M540S Rising
or Falling Edge
+2. 5VS
+3VS
L9 *0_06
0.01u/25V_04
C472
LVDS-L2N 11
FPD_D1
0.1u/ 16V_04C462
CLOSE TO IC
Not Mounted
LVDS-LCLKN 11
FPD_D4
LVDS-U2N 11
FPD4
R329
EDG E
PLLVCC
+3VS
R3 49 * 10K _04
R347 *0_04
R327 *1K_040.1u/ 16V_04C494
LVDS-DUAL
0.01u/25V_04
C107
LVDS-UCLKP 11
SR0
RN48 22_04_8P4R
8 1
7 2
6
5
3
4
FPD9
R329
*4.7K_04
LVDS-U1P 11
L8 0_06
DGND
R334 22_04
Nea r CHIP
FPD[0. .11]
0.1u/16V_04
C106
LVDSVCC
LVDS_PD#
FPD1
LVDS-LCLKP 11
LVDS-U2P 11
10u/10V_08
C102
Hig h
R332 22_04
LVDSGND
FPD_D5
DI SPCLKI7
LVDS_VSY N C
FPD7
DVDD
RN49 22_04_8P4R
8 1
7 2
6
5
3
4
RN47 22_04_8P4R
8 1
7 2
6
5
3
4
PLLGND
FPCLK6
R331
1K_1%_06
DI SPCLKO7
C493
0.1u/16V_04
FPD_D2
R342 0_04
0.1u/ 16V_04C95
Mounted
R330 22_04
FPD_D8
LVDS-L1P 11
DVDD
R328
4.7K_04
Falling Edge
0.1u/16V_04
C103
0.01u/25V_04
C480
LVDS-U0P 11
LVDSVCC
FPD3
L36 HCB1608KF-121T25
+3VS
R317 *0_04
R338 *0_04
LVDS_DUAL7,11
0.1u/ 16V_04C491
L41 0_06
Q51
2N3904
B
E C
LVDSVCC
LVDS-U1N 11
10u/10V_08
C466
ENAVEE1
FPD11
FPD_D6
M550S
DGND
FPD10
0.1u/ 16V_04C93
+1.5VS
R337
*0_04 R352 *0_04
0.01u/ 25V_04
C478 +2.5VS
+2.5VS
FPD_D3
FPD_D9
LVDS-L1N 11
SR0
FPD6
*0. 1u/16V_04C104
L39 0_06
Sheet 12 of 39
VIA LVDS VT-1637

Schematic Diagrams
B - 14 VT8237 1/3
B.Schematic Diagrams
VT8237 1/3
USB_PN5
R392 10K_04
+3V
USB_PN5
PCI_INTA#
PCI _AD23
C358
1u/10V
USB_PP0 16
PCI _AD4
C414
0.1u/16V_04
PCI_INTA#7,24
PCI _AD16
PCI_SERR#24
USB_OC0# 16
PCI_STOP#
U37F
74HC14
13 12
14
PCI_INTH#
KBC_RST#
LPC_FLASH#19
USB_PN3
PCI _AD10
USB_PN4
C348
0.01u/25V_04
L43
HCB2012KF-500T40
USB_PN5 21
PCI_REQ5#
RST#
PCI_DEVSEL#
PCI_TRDY#
PCI_FRAME#
U37C
74HC 14
5 6
14
+3V
2.Del D37 SCS751
PCI_GNT1#
PCI_INTD#
C407
0.01u/25V_04
+3VS
SB_USBGNDA
PCI _GNT2#
RN17
15K_06_8P4R
1
2
3
4 5
6
7
8
+3V 8,9,10, 14,15,16,18,20, 21,26, 28
PCI _AD11
+3VS
USB_PN6
PCI_REQ2#
USB_OC3#
C404
0.01u/25V_04
U38
74AHC1G08GW
2
1
4
3
5
PCI _AD15
PCI_SERR#
R268 2.2K_04
PCI _REQ1#
PCI_INTC#
PCI _REQ4#
USB_PN0 16
USB_PN4 21
RST#
Z1501
+
C658
100u/6.3V_B
PCI _D EVSEL#24
USB_PP7
PCI_INTB#
AC_I N#20,21
PCI _AD29
PCI _AD9
PCI _REQ5#
PCI _AD19
L29 HC B1608KF-121T25
RN20
15K_06_8P4R
1
2
3
4 5
6
7
8
USB_PN0
+3V
USB_PP1
U37A
74HC 14
1 2
14
RN18
15K_06_8P4R
1
2
3
4 5
6
7
8
C362
1u/10V
+3VS
+3V
PCI _AD0
R481 8.2K_04
PCI _C /BE0#16,24
PCI _TRDY #16,24
PCI _STOP#16,24
PCI_PAR
USB_PN1 21
SB_PCI R ST#
USB_PN3
RN37
4.7K_04_8P4R
1
2
3
4 5
6
7
8
USB_OC6#
Z1503
PCI _GNT0#24
PCI_INTB#
PCI _AD20
PCI _AD18
USB_PP5
USB_PN2
USB_OC5#
+3V
USB_PP1 21
RN45
8.2K_04_8P4R 1
2
3
4 5
6
7
8
PCI_INTC#
PCI _AD24
U37D
74HC14
9 8
14
PCI_GNT3#
+
C659
*100u/6.3V_B
+3V
USB_PN2 16
U32
74AHC1G08GW
2
1
4
3
5
PCI_INTD#
PCI _AD2
RN46
4.7K_04_8P4R
1
2
3
4 5
6
7
8
PCI_REQ0#24
USB_PP3
USB_PP4
R255 8.2K_04
PCIRST# 16,19,20,24
C377
1u/10V
USB_PP2
USB_OC7#
USB_PN1
+2.5V
PCI _PAR24
USB_PP7
PCI_REQ0#
R267 2.2K_04
+3VS
KBC_R ST# 20
USB_PP1
USB_PP3
C405
0.01u/25V_04
PCI_GNT0#
R529 10_04
USB_PP4 21
PM_PWROK12,15,21
PCI _C /BE1#16,24
C340
0.1u/16V_04
PCI_GNT4#
C344
0.1u/16V_04
USB_PP2 16
USB_PP4
PCI_STOP#
PCI _AD5
+3V
GA20 20
PCI _AD1
PCI _AD26
1.Rermove R528 8.2KO_04
USB_OC3#
PCI _GNT1#
R480 8.2K_04
USB_PP5 21
PCI _GNT0#
INTE#
+3VS
PCI _AD6
C360
0.01u/25V_04
USB_PP5
CDRRST# 17
USB_PP2
PCI _AD13
USB_PN7
PCI_AD[31:16]
SB_PCIRST#
NEAR CHIPSET
+2.5V 14,15, 26
USB_PN0
USB_PP6
+3V
USB_REXT
PCI _REQ2#
PCI_PERR#24
PCI_PERR#
PCI_REQ3#
PCI_INTH#
RESET_NB# 6
PCI_TRDY #
PCI _AD21
C560
0.1u/16V_04
RN22
2.2K_04_8P4R
1
2
3
4 5
6
7
8
USB_OC4# 23
LPC_FLASH#
C406
0.01u/25V_04
+3VS
+3VS 2,6,7, 8,10,11,12,14,15,16, 17,19,21,22,24,25,26, 28,29
SB_USBVCCA
GA20
+2. 5VS
USB_PP6
PCI_DEVSEL#
USB_PN3 23
PCI_GNT2#
USB_PN1
PCI _C /BE3#16,24
PCI _AD3
+3V
USB_PP6 16
PCI_SERR#
VT8237 (A)
U24A
VT8237
G2
J4
J3
H3
F1
G1
H4
F2
E1
G3
E3
D1
G4
D2
D3
F3
K3
L3
K2
K1
M4
L2
N4
L1
M2
M1
P4
N3
N2
N1
P1
P2
E2
C1
L4
M3
J1
H2
J2
H1
K4
C2
F4
E20
D20
A20
B20
E8 F25 H23
A4
B4
B5
C4
A5
B6
C5
D5
P3
A6
D6
C6
E5
R4
E18
D18
A18
B18
D16
E16
A16
B16
C25
A24
C26
D24
B26
W3
V1
W1
W2
H9 H10 H12 J8 K8 L8 M8 N8 P8 R8 R19
J21
C3
R3
R2
R1
T8 T19 U19 V8 V19
D22
E22
F22
J13
J14
J15
J16
E23
B25
J25 B2 A17 A19 A21 B13 B15 B17 B19 B21 C13 C14 C15 C16 C17 C18 C19 C20 C21 D13 D15 D17 D19 D21 E13 E15
B24
C24
A23
B23
D23
C23
A22
B22
C22
J17
E17 E19 E21 A15 A13
D4
E4
A3
B3
D14
E14
A14
B14
A26
A25
D26
D25
U8
J18
H11 V21 W9 W10 W11 W17 W18 W19 W21 Y21
H13 H15 H16 H18 H14 H17 A1 A2 B1
W8
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
CBE0
CBE1
CBE2
CBE3
FRAME
DEVSEL
IRDY
TRDY
STOP
SERR
PAR
USBP0+
USBP0-
USBP1+
USBP1-
GND GND GND
INTA
INTB
INTC
INTD
REQ0
REQ1
REQ2
REQ3
REQ4
GNT0
GNT1
GNT2
GNT3
GNT4
USBP2+
USBP2-
USBP3+
USBP3-
USBP4+
USBP4-
USBP5+
USBP5-
USBOC3
USBOC5
USBOC0
USBOC1
USBOC2
KBCK/KA20G
KBDT/KBR C
MSC K/ IR Q1
MSD T / I R Q 12
VCC33 VCC33 VCC33 VCC 33 VCC 33 VCC 33 VCC33 VCC33 VCC33 VCC33 VCC33
GND
PERR
REQ5/GPI7
GNT5/ GPO7
PCI RST
VCC 33 VCC 33 VCC33 VCC33 VCC33
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBVDD
USBCLK
USB REXT
GND GND USBGND USBGN D USBGN D USBGND USBGND USBGND USBGND USBGND USBGND USBGN D USBGND USBGND USBGND USBGND USBGND USBGND USBGN D USBGND USBGND USBGND USBGND USBGND USBGND USBGN D
USBOC4
USBSUS25
PLLVDDA1
PLLVDDA2
PLLGN DA1
PLLGN DA2
USBVDD
USBVDD
USBVDD
USBVDD
USBGND USBGND USBGND USBGND USBGND
INTE/GPIO12
INTF/GPIO13
INTG/GPIO14
INTH/GPIO15
USBP6+_NC
USBP6-_NC
USBP7+_NC
USBP7-_NC
USBOC6_NC
USBOC7_NC
UDPWR/GPI9_NC
UDPWREN/GPO9_NC
VCC33
USBVDD
VCC33 VCC33 VCC 33 VCC 33 VCC33 VCC33 VCC33 VCC33 VCC33 VCC 33
USBGND USBGND USBGN D USBGND USBGND USBGND GND GND GND
VCC 33
RN43
8.2K_04_8P4R
1
2
3
4 5
6
7
8
C345
10u/25V_12
USB_PN4
USB_OC5#
PCI _AD17
+3V
PCI_AD[15: 0]16,24
PCI _GNT4#
C384
0.1u/16V_04
PCI_IRDY#
PCI _AD30
VCCA_SW
GA20
T132
R254 8. 2K_04
PCI_REQ1#
USB_CLK 10
PCI _AD7
SB_US BVDD
PCI_REQ4#
L30 HCB1608KF-121T25
U37B
74HC14
3 4
14
R516
187_1%_06
+
C380
100u/6.3V_B
PCI_AD[15:0]
USB_PP0
PCI _AD12
USB_OC7#
VCCA_SW
USB_PN6
PCI _AD27
C410
1u/10V
R528 * 8.2K_04
HDD_RST# 17
PCI _REQ3#
PCI _AD22
PCI _REQ0#
RN19
15K_06_8P4R
1
2
3
4 5
6
7
8
C389
0.1u/16V_04
U37E
74HC 14
11 10
14
PCI_PERR#
R526 10_04
R487 2. 2K_04
+3V
+3V
PCI _AD25
USB_OC2# 16
USB_PN2
USB_OC1# 23
C370
0. 1u /1 6V_ 04
PCI_INTA#
PCI _F RAME#16,24
+2.5VS 2,10,12,14, 15,21,26,28,29
Z1504
PCI _AD8
PCI_INTC#24
PCI _AD31
RN24
4.7K_04_8P4R 1
2
3
4 5
6
7
8
R399 5.49K_1%_06
PCI _C /BE2#16,24
USB_PP3 23
KBC_RST#
PCI _AD28
C549
0.1u/16V_04
R501 2. 2K_04
C390
10u/25V_12
PCI _GNT3#
PCI_IRDY#16,24
USB_PP0
USB_PN7
USB_OC6#
PCI_INTB#24
PCI_FRAME#
RN25
4.7K_04_8P4R 1
2
3
4 5
6
7
8
PCI_IRDY #
INTE#
R521 100_04
USB_PN6 16
PCI_AD[31: 16]24
ALLPCIRST#
C411
0.1u/ 16V_04
PCI _AD14
Sheet 13 of 39
VT8237 1/3

Schematic Diagrams
VT8237 2/3 B - 15
B.Schematic Diagrams
VT8237 2/3
Sheet 14 of 39
VT8237 2/3
IDE_PDA2
SWI#
IDE_PDD10
SMB_CLK2
R263 4.7K_04
IDE_SDD[0:15]17
Z1602
CPUBSEL_SB
0 - Enable LPC FWH comm and
IDE_PDA2 1 IS V4 SUPPORT
0 IS VKCOMP FOR VLINK AT 4X MODE 0.75V
1 - disable LPC FWH command
ID E_PD A117
PME#
IDE_SDD2
R565 *0_04
R192 2.7K_04
C376
4.7u/1 0V_08
IDE_PD CS3# 1 is VKC OMP Fo r VL IN K at 4X MODE 0.9V(Default)
GPIOD GTL PULL UP
IDE_PDIORDY
IDE_SDD14
+
C552
100u/6.3V_B
R462 *0_04
R499 *2.2K_04
SMI#
IDE_PDD5
Z1601
AC_SDIN0
IDE_SDIORDY
IDE_PDD15
GPIOA VLINK AUTO COMPENSATION
ID E_PD D REQ17
Z1607
SUSC# 20
L31
HC B2012KF-500T40
IDE_PD A0 0 is P4/V4 BU S (Default)
GPI OB
SB_SPK
0:Enable C PU FR EQ strappi ng (set lo)
+2.5VS
IDE_PDIOW#
BATLOW#
+3VS
IDE_SDIORDY
AC_SDIN3
IDE_SDD7
IDE_SDDREQ
1
+2. 5V S
SATA25MHZ 10
1 IS P3 BUS
IDE_SDA217
1:disable auto reboot
RN23
4.7K_04_8P4R
1
2
3
4 5
6
7
8
ID E_PD A017
ID E_ SD D [0:15]
SUSB#
IDE_SDD11
R265 10K_04
+3V S
GPO0
IDE_PDD9
C423 *22p/50V
+3V S
IDE_IRQ15
S2
SHOR T
21
MANUAL MODE
C372
0. 1u/1 6V_04
T25
For VT8237
ON
IDE_SDIOW#17
IDE_SDDREQ17
PWROK_NB#
AC_SDIN3
SUS_CLK
IDE_SDD1
C338
4. 7u/1 0V_08
R212 *1K_04
Z1604
IDE_PDCS1#
T138
R184 1K_04
PWR_BTN# 20
C361 0 .1u/1 6V_04
IDE_SDIORDY17
IDE_SDCS3#17
SMB_D AT2
INTRUDER
R508 10K_04
IDE_PDA1 1 IS V4-LITE SUPPORT
R580 4.7K_04
R489 10K_04
R490 10K_04
GPIOB IOQ DEPTH
R249 4. 7K _04
+3VS
AC_SDIN1
BATLOW #
SMB_SBDATA
THE R M_AL ER T#
R189 2.2K_04
CPUSTP# 10
GPO 0
R252 4.7K_04
+3V
RING#
R253 *4.7K_04
R408 4.7K_04
IDE_PDCS3#
LI D #
SATASXO
T24
R4 31 4. 7K _04
0 DISABLED (DEFAULT)
ID E_PD C S3#17
SWI# 20
C371
1u/10V
200MHz
Z1610
IDE_PDDACK#
IDE_PDA1
400/533Mhz Strap pin
+3V
ACSDO
ID E_PD D AC K #17
SUSB# 20,21,27,28
GPO 1
IDE_PDCS1#
+2. 5V S 2, 10 ,1 2,1 3, 15, 21, 26, 28 ,29
R269 4.7K_04
R484 4.7K_04
C576,C574 Change
15pf to 10pf.
SB_OSCCLK 10
IDE_PDD11 SB_TH RM
0 DISABLED (DEFAULT)
0
SATA50COMP
IDE_SDA017
IDE_SDD0
C568 *1200p/50V
R190 *1K_04
R500 4.7K_04
+2.5V 13,15,26
CPUSTP#
IDE_PDD3
C366
0.1u/16V_04
R221 360_1%_06
Z1603
R266 10K_04
C419
*22p/5 0V_04
IDE_PDD14
C388
0.1u/16V_04
R503 4.7K_04
SMB_SBC LK 8, 9, 10,1 6
R493 1M_04
R505 10K_04
R470 *1K_04
IDE_IRQ1417
IDE_PDD[15:0]17
AC_SDOUT 21,22
C378 *0.01u/50V
R259 10K_04
1:disable CPU FREQ strapping(set hi)
AC_SDIN0
SB_TH R M
R441 1K_04
ID E_PD A217
SMI# 20
R207 *2.7K_04
R498 1K_04
R506 4.7K_04
AUTO MODE(DEFAULT)
PCISTOP# 10
+5VS 10,11, 16,1 7,19,20,21,22, 23, 25,2 6
IDE_PDA2
IDE_SDD10
R457 *4.7K_04
R491 10K_04
+2.5VS
ID E_PD IOR #17
IDE_IRQ1517
ACC_SY NC
R488 10K_04
SUS_ST# 6
SATAVDD
SUS_C LK
R440 *2.2K_04
R251 *1K_04
IDE_PDA1
R483 *2.2K_04
+3V S
+3V S
SUS_ST#
PWR_BTN#
PM_CLKRUN #
C379
0. 1u/1 6V_04
R474 *1K_04
C719
10u/ 10V_ 08
IDE_SDA117
R196 *2.2K_04
GPI OA
RING#
GPI 17
IDE_PDDAC K#
SUSC #
IDE_SDD4
C566 *1200p/50V
+3V S
SATASXI
R486 4.7K_04
C382 *0.01u/50V
R203 2.2K_04
AC_SDIN1 21
IDE_SDDACK#17
SB_SPK
GPO1
GPI17
IDE_PDD12
IDE_PDD13
C395
0.1u/1 6V_04
PM_CLKRUN# 20
IDE_PDCS3#
R566 0_04
C375
0.1u/16V_04
R4 30 4. 7K _04
PME# 20,24
+3V 8,9,10,13,15,16,18,20,21,26,28
SCI#
L32
HCB1608KF-121T25
R409 5.6K_04
IDE_PDIOR#
R404 4.7K_04
R264 4.7K_04
C413
0.1u/16 V_04
SATA VD D A0
SW I #
IDE_SDD13
R492 4.7K_04
ENABLE(DEFAULT)
R 455 2. 7K _04
AC_SDIN2
R204 2.2K_04
THERM_ ALERT# 2
+3V S 2 ,6, 7, 8, 10, 11 ,12 ,1 3, 15, 16, 17, 19, 21, 22, 24, 25 ,2 6,2 8, 29
SMB_C LK 2
IDE_PDA0
IDE_IRQ15
+3VS
+3V
GPI OD
AC_SDIN1
PCISTOP#
IDE_SDD8
IDE_PDD0
R458 1K_04
C373
0.01u/25V_04
S3
SHOR T
21
DISABLE
+3VS
PWROK_NB# 6
Z1606
SATA GN D A0
IDE_SDD6
IDE_SDD12
IDE_PDA0
SATAGND
IDE_IRQ14
SERIRQ
R567 4.7K_04
S1
SHORT
21
AC_SDIN2
IDE_PDD1
0 IS ENABLE
VT8237 (B)
U24B
VT8237
AA22
Y24
AA26
AA25
AB26
AC26
AC23
AD25
AD26
AC24
AC25
AB24
AB23
AA24
Y26
AA23
W23
V25
W24
Y23
V24
W26
Y25
Y22
V22
V23
T1
U3
V2
U1
V3
T2
U2
T3
AD24
AE26
AC20
AB20
AC21
AE18
AF18
AD18
AD19
AF19
AE20
AF20
AD20
AE21
AF21
AD21
AD22
AF22
AD17
AD23
AF23
AE23
AF17
AF25
AF26
AF24
AC22
AE24
AD2
Y2
AA1
W4
AC1
V4
Y3
AB3
AA2
AD3
AF2
AB1
AC4
AB2
AC2
AA3
AE2
AE5
AF5
AC6
AD5
AB7
AC7
AD6
AA4 AB4 AB5 AB6 J9 J10 J11
AF14 L13 L14
AE9
AF1
L15
K9 L9 J12 L18 M9
AB14 AC14 AD12 AD13 AD14 AD15 AD16 AE12 AE14 AE16 AF12 L16 M11
AC11
AC17
AB13
AC13
AE15
AF15
AB15
AC15
AF16 L11 L12
T4 U4
AD9
AF8
AB8
AC3
AD1
AE1
Y4
AF9
Y1
AE3
AE13
AF13
AC10
AB10
AE11
AF11
AD11
AE10
AF10
AC19
AB21
AB11
AB17
W12
W13
W14
W15
W16
M18 N9 N18 P9 P18 R9 R18 T9 T18 U9 U18 V9 V10 V11 V12 V13 V14 V15 V16 V17 V18
AC16 AC12 AB16 AB12 M12 M13 M14 M15
M16
N11
N12
N13
N14
N15
N16
F6 F7 J5 K5 P5 R5
W5
V5
K18
Y5
PDD0
PDD1
PDD2
PDD3
PDD4
PDD5
PDD6
PDD7
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
PDA0[ SDA0]
PDA1[ SDA1]
PDA2[ SDA2]
PDDREQ
PDDACK[ ]
PDIO R
PDIO W
PDRDY
PDCS1[ ]
PDCS3[SDCS3]
ACBI TCLK
ACSDIN0
ACSDIN1
ACSDIN2/GPIO20/PCS0
AC SD IN 3/SLP _BTN/ GPI O21/ PC S 1
ACSY NC[ ]
ACSDO[SOE]
ACRST
IRQ14
IRQ15
SDD0/TBC1_SDD0
SDD1/VALID_SDD1
SDD2
SDD3/RXD2_SDD3
SDD4/RXD3_SDD4
SDD5/RXD4_SDD5
SDD6/RBC0_SDD6
SDD7/RBC1_SDD7
SDD8/RXD5_SDD8
SDD9/RXD6_SDD9
SDD10/RXD7_SDD10
SDD11/RXD8_SDD11
SDD12/RXD9_SDD12
SDD13/TXD0_SDD13
SDD14/TXD1_SDD14
SDD15/TXD2_SDD15
SDDRQ/RXD1_SDDRQ
SDDACK/TBC0_SDDACK
SDIOR/TXD4_SDIOR
SDIO W / TXD3_SD I OW
SDRDY/RXD0_SDRDY
SDCS1/TXD8_SDCS1[ ]
SDCS3/TXD9_SDCS3[ ]
SDA0/ TXD6_SD A0[ ]
SDA1/ TXD5_SD A1[ ]
SDA2/ TXD7_SD A2[ ]
PWRBTN
RING/GPI3
EXTSMI/G PI 2
PME
LID/GPI4
BATLOW/GPI5
SUSST1/GPO3
SUSCLK/GPO4
SUSA/ GPO2_GP O1
SUSB/NC_GPO2
SUSC
SMBALRT
SMBCK1
SMBDT1
GPI1
GPO0
GPI0
GPIOA/GPIO24[SA17]_GPO17[SA17]
GPIOC/GPIO30[SA16]_GPO16[SA16]
GPIOD/GPIO31[SA19]_GPO19[SA19]
GPIOB/GPIO25[SA18]_GPO18[SA18]
CLKRUN
CPUSTP/GPO5
PCISTP/GPO6
VSUS33-1 VSUS33-2 VSUS33-3 VSUS33-4
VDD VDD VDD
GNDATS_NC12 GND GND
TEST
PW R OK
GND
VDD VDD VDD VDD VDD
GNDATS_NC1 GNDATS_NC2 GNDATS_NC3 GNDATS_NC4 GNDATS_NC5 GNDATS_NC6 GNDATS_NC7 GNDATS_NC8 GNDATS_NC9 GNDATS_NC10 GNDATS_NC11 GND GND
VDDAS_NC2
VDDAS_NC1
STXP1_NC
STXN1_N C
SRXP2_N C
SRXN2_N C
STXP2_NC
STXN2_N C
GNDATS_NC13 GND GND
VSUS25-1 VSUS25-2
SERI RQ
SPKR[ ]
OSC
SMBCK2 /GPI O27
SMBDT2/GPIO26
INTRUDER/GPI16
AOLGPI/GPI18/THRM
TPO
CPUMISS/GPI17
GPO1_NC
SRXP1_N C
SRXN1_N C
VDDA0_NC
GNDA0_NC
VDDA33_NC
GNDA33_NC
SREXT_NC
SXO_NC [SOE]
SXI_NC[ROMCS]
SVREF_NC
SCOMPP _N C
VDDAS_NC4
VDDAS_NC3
VDDATS_NC1
VDDATS_NC2
VDDATS_NC3
VDDATS_NC4
VDDATS_NC5
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
GNDAS_NC1 GNDAS_NC2 GNDAS_NC3 GNDAS_NC4 GND GND GND GND
GND
GND
GND
GND
GND
GND
GND
GND GND GND GND GND GND
GND
GND
GND
WAKE#
C422
4. 7u/10 V_08
+3V S
SIDEVREF
GPIOB
ID E_PD IOW #17
ID E_PD C S1#17
GPI OC
Z1612
GPIOD
IDE_PDD8
+3V S
ID E_PD IOR DY17
SB_SPK 22
SUSA#
IDE_PDD4
SMB_SBD ATA 8, 9, 10 ,16
SCI# 20
IDE_SDCS1#17
SATAGND A33
SMB_DAT2
AC_SDIN0 22
AC_SY NC 21, 22
IDE_SDIOR#17
IDE_PDDR EQ
Z1608
Z1611
IDE_SDD15
IDE_PDDACK# 1 IS DISABLE EXTERNAL SATA PHY
(DEFAULT)
AC_RST# 21,22
For VT8237
IDE_SDD3
IDE_SDD5
LID#
AC_BITC LK 21,22
C368
10u/25V_12
R194 *2.7K_04
+3VS
GPIOA
GPIOC HOST CLOCK SELECT AUTO MODE(DEFAULT)
VBAT
+5VS
C570
0. 1u/16 V_04
SMB_SBCLK
IDE_PDD2
IDE_PDD7
Z1605
0 IS MASTER MODE(DEFAULT)
GPIO STRAPPING
+2.5V
AC_BI TC LK
IDE_PDD6
R469 2. 7K _04
R245 *4.7K_04
R504 10K_04
1 LEVEL
IDE_SDD9
R507 1M_04
T18
+3VS
GPI 0
SUSA#
GPIOC
R502 4.7K_04
0:Enable auto reboot
R461 4. 7K _04
R497 1K_04
IDE_PDCS1# 1 IS SLAVE MODE
12 LEVEL(DEFAULT)
+2.5VS
+3VS
SERIRQ 20,24
T16
R195 2.2K_04
VBAT
SER I R Q
R236 4.32K_1%_06

Schematic Diagrams
B - 16 VT8237 3/3
B.Schematic Diagrams
VT8237 3/3
Sheet 15 of 39
VT8237 3/3
PM_DPRSTP# 28
LPC_AD 3
+VDD3 2,20,21,26,27,30
API C CLKSB
AGPBZ
C343
0.1u/16V_04
+2. 5 V
R199 4.7K_0 4
TXCL K 18
DNSTB#
R435 33_04
+2. 5V S
VLAD 5
+2.5VS
LPC_AD319, 20
COL 18
R219 360_1%_06
+2.5 VR AM
R451 4.7K_04
+3V
MDIO 18
C369
0.1u/16V_04
C634
10p/ 50V
VLAD 16
LPC_DRQ0
VLR EF_SB
+3VS
+3VS
Y3
32.768KHz
12
R234
10K_04
R213 1K_04
R209
3K_1%_06
H_INTR
RXER 18
MTXD0
R308 150_04
RSMRST#
C335
1u/10V
C634,C633 Change
6pf to 10pf.
TXD 2 18
VLAD 0
H_NMI 2
SEEDI
R444 *4.7K_04
H_SMI# 2
H_IGNNE#
T13 3
H_INTR 2
VLAD 36
TXD 1 18
+3V
LPC_AD 2
H_DPSLP#
0 - DI SA BL E L A N S HA DOW EEPROM ( De f au l t )
+3V
API C CLKSB 10
RXCLK 18
VRDSLP
LPC_AD219, 20
VLAD 2
R186 360_1%_06
SEEDI => Internal EEPROM Strapping
H_FERR#
MTXD1
DNSTB
SEED I
R215
392_1%_06
VT8237 (C)
U24C
VT8237
H25
G26
K26
J23
F26
G25
K22
K24
A11
B11
B9
B10
A10
C11
C10
A9
A7
B7
C7
B8
D8
C9
D10
A8
D11
B12
A12
C12
E7
T22
U22
E24
G23
L26
L25
E26
E25
L24
M26
H22
K23
K25
J26
J24
H26
H24
J22
E6 E11 E9 E10
AF4
L22
D9
P11 P12 P13 P14 P15 P16 R11 R15 R14 R13 R12 R16 R21 T11 T12 T16 T15 T14 T13
M24 N21 N22 N23 N24 N25 N26 P22 P23 P24 P25 P26 M21 M22 M23
AE4
AF3
AE6
AF6
C8
D12 E12 L21 K21
AD8
AF7
AE7
AD7
G24
F24
AE8
D7
AC5
AD4
U24
U26
T24
R26
T25
T26
U25
R24
V26
R22
P21
R23
U23
R25
T23
AC9
AC8
AB9
AD10
M25 L23 L19 M19 N19 P19AA21
AB19 AB22 AB25 AC18 AE17 W22 W25 AE19 AE22 AE25 AA9 T21 AA10 AB18 K19
F23
G22
F8
VD0
VD1
VD2
VD3
VD4
VD5
VD6
VD7
MCR S
MCOL
MTXD2
MTXD1
MTXD0
MTXENA
MTXCLK
MTXD3
MDC K
MD I O
MRXD3
MRXD1
MR XD V
MRXC LK
MR XE R
MRXD2
EECS
EED O
EEDI[SDCS1]
EECK
RAMVCC
PLLVCC
PLLGN D
VD8_NC
VD9_NC
VD10 _N C
VD11 _N C
VD12 _N C
VD13 _N C
VD14 _N C
VD15 _N C
VLREF
UPCMD
DNCMD
UPSTB
UPSTB
DNSTB
DNSTB
VCOMPP
RAMGND
MIIVCC4 MIIVCC2 MIIVCC3
VBAT
VCLK
MIIVCC1
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
VCCVK VCCVK VCCVK VCCVK VCCVK VCCVK VCCVK VCCVK VCCVK VCCVK VCCVK VCCVK VCCVK VCCVK VCCVK
RTCX1
RTCX2
LREQ0
LFR M
MRXD0
MIISUS25-1 MIISUS25-2
VCCVK VCCVK
LAD0
LAD1
LAD2
LAD3
VBE
VPAR
LREQ1_NC
PHY R ST_NC
PW RG D
RSMRST
FERR
A20M
IGNNE
INIT
INTR
NMI
SMI
STPCLK
SLP
GHI/GPIO22
DPSLP/GPIO23
PCI C LK
APICCLK/GPI19_NC
API C D 0/ GPIO10_N C
API C D 1/ GPIO11_N C
VGATE/ GP IO8 _N C
VIDSEL/GPIO28
VRDSLP/GPIO29
AGPBZ/GPI6
VCCVK VCCVK VCCVK VCCVK VCCVK VCCVKGND
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
VIOU T_N C
VIIN_NC
NC,PHYPWRDN#
1 - ENABLE
+2.5V 13,14, 26
R235 33_04
VCOMP
U31
93C46
1
2
3
4
6
7
8
5
CS
SK
DI
DO
NC
NC
VCC
GND
+VD D3
H_STPCLK#
SATA_L ED #
SB_V GATE
+2.5VS
+2.5VS
RXD2 18
C387
0.1u/16V_04
C381 0.1u/16V_04
SEEDO
C355
0.1u/ 16V_04
+VCCP
DNSTB
R454 1.5K_0 6
C429
*0.1u_04
L28 HCB1608KF-121T25
PCISBCLK
D36
RB751V-40
AC
VLAD 56
UPSTB6
CRS 18
DNCMD
R539 0_04
VBAT
LPC_AD 1
Close to SB
R476 2.2K_04
FOR VT8237 LAN STRAPPING
VLAD 3
UPCMD
SEECS
H_FERR# 2
C402
0.1u/16V_04
C633
10p/ 50V
JCBAT-1
85204 -0200
1
2
H_DPSLP#
VBE#6
DNSTB6
H_CPUSLP# 2
VPAR
RSMRST#20
R425 4.7K_04
C342
*10p/50V_04
AGPBZ
UPSTB#
LPC_DRQ0
H_CPUSLP#
H_NMI
D35
RB751V-40
A C
+2.5VS 2,10,12, 13,14,21,26,28,29
TXEN 18
H_IGNNE# 2
+VCCP 2, 3,4,10,28,29
PM_DPR SLPVR 2,28
C385
0.1u/16V_04
VLAD 76
40 mils
LPC_AD 0
C367
0.1u/16V_04
Z1708
R206 *33_04
SET LO
VLAD 06
RXD1 18
RN21 33_04_8P4R1
2
3
4 5
6
7
8
UPCMD6
VLAD 1
VBE#
L27 HCB1608KF-121T25
LPC_DRQ1
LPC_DRQ1
R452 4.7K_04
TXD 3 18
H_STPCLK# 2
H_A20M#
DNSTB#6
Z1706
0.31V
AGPBZ 6
RXD0 18
+2.5 VS
RXD3 18
Closed U33.
VLINKCLK10
DNSTB#
DNCMD6
VLAD 4
VLINKCLK
VRDSLP
JB1
*100K_04
+3VS
UPSTB#6
TXD 0 18
VLAD 6
Z1707
R187 360_1%_06
C664
0.1u/16V_04
SEECLK
UPSTB
APICD1
Z1709
C357
1u/10V
MTXD2
H_A20M# 2
MMD I O
C386
0.1u/16V_04
R475 *4.7K_04
APICD0
H_SMI#
SB_GH I
MTXD3
C347
0.1u/16V_04
VLAD 46
PHYRST 18
MDC 18
PCI SBCLK 10
C356
*10p/50V_04
L34 H C B1608KF-121T25
RXDV 18
H_INIT# 2
C337
0.1u/16V_04
C415 0.1u/16V_04
C341
*10p/50V_04
VLAD 26
VLAD 7
MTEXEN
LPC_FRAME#19,20
H_DPSLP# 2
R244 4.7K_04
LPC_AD019, 20
Z1704
LPC_AD119, 20
PM_PWROK12, 13, 21
+3VS 2,6, 7, 8, 1 0, 11, 1 2, 13, 14, 16, 17, 19, 21, 22, 24, 25, 26, 28, 29
C412
1u/10V
C420
22u/ 10 V_12
PCISBCLK
VLAD 66
+3V 8, 9,10, 13,14, 16, 18, 20, 21, 26, 28
Z1705
R495
1K_06
R436 33_04
H_INIT#
C351
0.1u/ 16V_04
MMD C
+2. 5 VS
R561 *4.7K_04

Schematic Diagrams
MINI PCI, MINI Card, USB2.0*2 B - 17
B.Schematic Diagrams
MINI PCI, MINI Card, USB2.0*2
Sheet 16 of 39
MINI PCI,
MINI Card,
USB2.0*2
SPKOUTL-21,23
Z1828
C82
10u/10V_08
R73 *0_06
PCI_AD6
+VCCUSB1
C673
0.1u/ 16V_04
MINI CARD
U6
RT9701-CBL
1
2
3
4
5
VOUT
GND
VIN
VIN
VOUT
USB_PP213
PCI_AD15
+1. 5V S
PCI_C/BE0#13,24
R544 * 0_04
PCI_TRDY #13,24
PCI_AD12
MINI PCIE
+1.5VS 3,6,12,21,29
PCI_AD10
PCI_FRAME#13,24
R97 *0_06
+3V 8,9,10,13,14,15,18,20,21,26,28
C121
10u/10V_08A
USB 2.0
C276
0.1u/16V_04
PCI_AD9
C690
120P_06
PCIR ST#13,19,20,24
PCI_AD5
Z1824
PCI_AD0
+5VS 10,11,14,17,19,20,21,22,23,25,26
USB_PP613
C692
120P_06
WL AN _ D ET#20
PCI_AD14
+3V
BT_C LK21
L10
HCB3216KF-800T30
PCI_AD[15:0]13,24
PCI_AD11
55SPKR-
R98 *0_06
Z1827
C674
0.1u/ 16V_04
USB_PN013
USB_OC0#13
L25
WCM3216F2S-161T03
1
4
2
3
SPKOUTL+21,23
4
Z1826
+5V
PCIRST#
MINI FFC CONN
USB_OC2#13
PCI_AD4
JUSB1
USB-04RMX
1
2
3
4
GND 1
GND 2
GND 3
GND 4
VCC
DATA-
DATA+
GND
GND 1
GND 2
GND 3
GND 4
Z1825
JSPK_2
85205-0400
1
2
3
4
FOR M550S SPKER ON
Board.
+VCCUSB1
+3VS
BT_EN #21
+5V 19,21,23,26, 27, 2 8, 29
KEY
JMINI1
88911-5204
3
5
7
9
11
13
1
15
23
25
21
27
31
33
29
17
19 20
37
39
41
43
45
47
49
51
44
42
18
16
14
2
12
10
8
6
4
22
24
26
28
30
32
34
36
38
40
46
48
50
52
35
BT_DATA
BT_CHCLK
CLKREQ#
GND 0
REFCLK-
REFCLK+
WAKE#
GND 1
PETn0
PETp0
GND 2
GND 3
PERn0
PERp0
GND 4
NC3
NC4 W_DISABLE#
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
LED_WLAN #
NC(LED_WWAN#)
GND6
UIM_VPP
UIM_RESET
3.3V_0
UIM_CLK
UIM_DATA
UIM_PWR
1.5V_0
GND5
PER SE T#
3.3VAUX
GND7
1.5V_1
NC(SMB_CLK)
NC(SMB_DATA)
GND8
NC(USB_D-)
NC(USB_D+)
GND9
NC(LED_WPAN#)
1.5V_2
GND 10
3.3V_1
GND 11
+3VS
+3V
PC LK_MPCI10
USB_PN613
C704
10u/ 1 0V_08A
R540 *0_04
USB_PP013
BT_DET#20, 21
C288
0. 1u/ 16 V_04
6-20-92K20-135
R69 560K_06
BT_D AT21
C693
120P_06
R72 470K_04
LP3
FCA3216KF4-121T03
1
2
3
4
6
5
7
8
PCI_C /BE3#13,24
JSPK_14
CO-LAYOUT
SMB_SBC LK 8, 9, 1 0, 14
PCI_AD3
55SPKL+
+3V
PCIRST# 13,19,20,24
R545 * 0_04
R377 *0_04
L6
HCB3216KF-800T30
PCI_C/BE2#13, 24
PCI_AD8
SMB_SBD ATA 8, 9,10,1 4
USB_PPP6
R140
*0_06
+3VS
+3VS
+3VS 2,6,7,8,10,11,12,13,14,15,17,19,21,22,24,25,26,28,29
SPKOUTR-21,23
+VCCUSB1 Voltage Keep 4.9V~5.25V.
PC I_AD[ 15:0]
WLAN _EN 19,20
C94
0.1u/16V_04
C90
10u/ 10V_08
R90 560K_06
SPKOUTR+21,23
JDFFC2
87151-35
3
5
7
9
11
13
1
15
23
25
21
27
31
29
17
19
20
18
16
14
2
12
10
8
6
4
22
24
26
28
30
32
33
35
34
PCI_AD0
PCI_AD2
PCI_AD4
PCI_AD6
PCI_AD8
PCI_AD9
GND 1
PCI_AD11
PCI_CBE#3
PC I_ IR DY #
PCI_CBE#1
PC I_ TR DY #
GND 5
PCIC LK
PCI_AD13
PCI_AD15
PCI_CBE#0
PCI_AD14
PCI_AD12
PCI_AD10
GND 2
PCI_RST#
PCI_AD7
PCI_AD5
PCI_AD3
PCI_AD1
PCI_CBE#2
PCI_FR AME#
PCI_STOP#
GND 3
GND 4
VDD5-1
VDD5-2
VDD5-4
VDD5-3
C287
0.1u/16V_04
PCI_AD2
USB_PN213
L7
WC M3216F2S-161T03
1
4
2
3
+1. 5 VS
R139 *0_04
R138 *0_06
+VCCUSB1
USB_PPN6
R136
10K_1%_06
C689
120P_06
PCI_STOP#13,24
PCI_IRDY #13,24
PCI_AD7
D34
*BAV99
C
AC
A
C118
10u/ 10V_08
55SPKR+
USB_ PPP6
R74 *0_06
R82 470K_04
Z1826
C120
0.1u/ 16V_04
1
C108
10u/10V_08
Closed to JMINI1.
STR CON
+5VS
JUSB2
USB-04RMX
1
2
3
4
GND 1
GND 2
GND 3
GND 4
VCC
DATA-
DATA+
GND
GND 1
GND 2
GND 3
GND 4
PCI_AD13
C125
10u/ 10V_08A
C688
10u/ 10V_08A
PCI_C /BE1#13,24
L11
WC M3216F2S-161T03
1
4
2
3
R137 *0_06
D33
*BAV99
C
AC
A
USB_ PPN6
PCI_AD1
55SPKL-

Schematic Diagrams
B - 18 PATA HDD, CD-ROM, H8 BEEP
B.Schematic Diagrams
PATA HDD, CD-ROM, H8 BEEP
Sheet 17 of 39
PATA HDD,
CD-ROM, H8 BEEP
CD_DASP#
IDE_PDD REQ
+3VS 2,6, 7,8,10,11, 12,13,14, 15, 16,19,21, 22,24,25,26, 28,29
CDRRST#
R376 10K_04
ID E_PDD3
R373 10K_04
C515
0.1u/ 16V_04
PC BEEP
+5VS
+5VS
SDLED#
IDE_PDDACK# 14
CD_G
R375 5.6K_04
P66CBLID
C328
10u/10V_08
CD_R 22
ID E_PDA014
+3VS
IDE_SDD6
C516
10u/10V_08
IDE_PDDREQ 14
ID E_PDD6
IDE_PDD12
CD_L
IDE_SDD15
IDE_SDD9
IDE_SDIOR# 14
IDE_PDD IAG#
IDE_SDD13
CD_R
ID E_PDI OR# 14
R179
2.2K_06
Signal:Space = 1:2
IDE_PD CS3# 14
IDE_IRQ14
IDE_SDD14
IDE_PDD10
D6 1SS355AC
IDE_SDD1
JHDD1
C17861-144A1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
IDE_PDD14
IDE_PDD8
Signal:Space = 1:2
IDE_SDD7
C319
0.1u/ 16V_04
IDE_SDA1 14
T134
CDRRST#13
R262
10K_1%_06
IDE_SDD5
C518
10u/10V_08
+
C310
100u/6.3V_B
+5VS
CD_CABSEL
IDE_PDDREQ
C513
0.1u/ 16V_04
Signal:Space = 1:1
IDE_PDD9
U33
74AHC1G14GW
1
2
53
4
R370 4.7K_04
D7 1SS355AC
R366 470_04
Z1904
*10K_06
R181
+5VS
ID E_PDA0
IDE_SDDREQ 14
ID E_PDCS1#
+3VS
IDE_PDD11
ID E_PDA2 14
IDE_SDCS3#14
ID E_PDD7
HDD_RST# 13
IDE_SDD10
C514
0.1u/ 16V_04
Other Signal
IDE_PDIOW#14
T136
ID E_PDIORDY
IDE_SDD11
IDE_PDIORDY
IDE_IRQ15 14
SDLED#
Other Signal
IDE_PDD [ 15:0]14
C511
1u/10V
R369 *0_04
C631 0.1 u/16V_04
R270 33_06
IDE_SDD4
JCD1
C12434-15A1
12
34
56
78
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
ID E_PDD2
ID E_PDD5
IDE_PDD15
R157 10K_04
R158 10K_04
IDE_SDDACK# 14
ID E_PDIOW#
INT_CD_R & CD_GND & INT_CD_L must
parallel routing to Audio Codec. The
space must be equal.
HD_LED# 19
IDE_PDCS3#
R374 4.7K_04
CD_GND22
IDE_PDD13
IDE_SDD12
IDE_SDD8
ID E_PDA114
C322
0.1u/16V_04
T135
IDE_PDCS1#14
CD_L22
U29
74AHC1G08GW
1
2
5
4
3
+3VS
IDE_PDD[ 15:0]
IDE_SD CS1# 14 IDE_IRQ1414
CD _DASP#
R509
10K_04
+3VS
IDE_PDIOR#
From
CD-ROM
IDE_SD D[ 0:15] 14
ID E_PDD0
CD_CABSEL
R191 470_06
IDE_SDA214
IDE_SDIOW# 14
IDE_SDD0
C312
0.1u/16V_04
R515
1M_06
C652
0.1u/16V_04
PIN GND1~GND2=GND
+5VS 10,11, 14,16, 19,20, 21,22,23,25, 26
IDE_SDIORDY 14
IDE_PDD7
+3VS
IDE_IRQ14
C509
0.1u/ 16V_04
IDE_PDA2
ID E_PDD4
IDE_SDD [0:15]
IDE_SDD2
To
AUDIO
CODEC
+5VS
KBC_BEEP20
C656
2200p/50V
Z1905
IDE_SDD3
C321
1u/10V
C517
10u/10V_08
CD-ROM
H8_BEEP 22
IDE_PDIORDY14IDE_SDA0 14
ID E_PDD1
Signal:Space = 1:1
ID E_PDA1
IDE_PDDACK#
PATA HDD
R159 10K_04

Schematic Diagrams
LAN PHY B - 19
B.Schematic Diagrams
LAN PHY
RXD 3#
R61 *0_04
DUPLEX
VT6103L
U3
VT6103L_LQFP
25
26
27
28
29
30
31
32
33
34
35
36
37 38 39 40 41 42 43 44 45 46 47 48
1
2
3
4
5
6
7
8
9
10
11
12
13 14 15 16 17 18 19 20 21 22 23 24
VDD RX
RX-
RX+
FXSD
GNDR X
GNDPLL
REXT
VDD PLL
GNDTXC
TX-
TX+
VDD TX
GNDTX GNDOSC XO XI VDDOSC RST MDIO MDC RXD3 RXD2 RXD1 RXD0
VDD1
GND1
RXDV
RXC
RXER
GNDC
VDDC
TXER
TXC
TXEN
TXD0
TXD1
TXD2 TXD3
COL
CRS
GND2
VDD2
INT
LED0 LED1 LED2 LED3
PD
RX-
Z2004
LINK
RXD 2#
COL
L5 0_08
TD-
Z2003
Z2001
C19
0.1u/16V_04
LAN_CLKO
LP1 B4W(160ohm)
1
2
3
4
6
5
7
8
RXER 15
RXCLK 15
R33 10K_04
R46 6.49K_1%_06
MD C 1 5
C71
2.2u/6.3V
TXD0 15
X1 25MHz
12
REXT
TXC LK
C67
10p/50V
R35 33_04
RXD 1#
R11
75_1%_06
+3. 3VLANPH
CMX4-
MD I O 1 5
RXCLK
Z2006
R12
75_1%_06
R8
75_1%_06 RXD 0#
CRS#
TD+
TXD0
Z2005
RXER#
RXD3
TXCLK #
DU PLEX
RXDV 15
C40
0.1u/16V_04
RX+
RXC LK#
R43
49.9_1%_06
R54
49.9_1%_06
NWAY
LINK
CRS
TX+
+3.3VLANPH
R30 10K_04
R29 10K_04
CMX3-
COL 15
TXD1 15
NWAY
Z2002
RD-
JLAN-1
88018-1000
12
34
56
78
910
RXD V#
+3.3VLANPH
RXER
TX-
CRS 15
RXD1 15
C18
0.1u/16V_04
RXD0
R62 33_04
SPEED
MD I O#
TXD2
C67,C68 Change
22pf to 10pf.
RN3
33_04_8P4R
1
2
3
4 5
6
7
8
R34 10K_04
RXD2
C20
0.01u/25V_04
Z2007
R39 33_04
+3.3VLANPH
R52
49.9_1%_06
TXEN 15
TD -
RD+
C64
0.1u/16V_04
TXD2 15
TXD3 15
CMX3+
R44
49.9_1%_06
RXD0 15
Z2008
C58
10u/10V_08
RXD2 15
C65
0.1u/16V_04
Closed to U2.
RXDV
TXD1
LAN_CLKI
C15
1000p/2KV_12
RN4
33_04_8P4R
1
2
3
4 5
6
7
8
C11
1000p/2KV_12
+3.3VLAN PH
RXD3 15
Closed to U2.
MDC
TXD3
RD+
RXD1
C60
0.1u/16V_04
C22
0.1u/ 16V_04
+3V
MDI O
SPEED
L2
NS681680
1
2
16
15
314
412
5
6
7
13
9 8
11
10
RD+
RD-
RX+
RX-
RD_CTRX_CT
NCNC
NC
TD _C T
TD +
NC
TX- TD-
TX_C T
TX+
C68
10p/50V
C14
0.01u/25V_04
TXCL K 15
CMX4+
TD +
TXEN
COL#
R9
75_1%_06
C25
0.1u/16V_04
C63
0.1u/16V_04
C13
0.01u/25V_04
PHYRST 15
R28 *10K_04
+3V 8,9, 10,13,14,15,16,20,21, 26, 28
Z2009
RD-
Sheet 18 of 39
LAN PHY

Schematic Diagrams
B - 20 LPC ROM, TOUCH PAD, LED
B.Schematic Diagrams
LPC ROM, TOUCH PAD, LED
Sheet 19 of 39
LPC ROM,
TOUCH PAD, LED
LED_BAT_CHG20
LPC_FLASH#13
+3VS
LED_ACIN20
C364
0.1u/ 16V_04
FOR M550S
R102
10K_04
Protected
+3VS
R437 8.2K_04
R279
*470_06
SW3
*TC031-AA1 G-A1 60T
3
1
4
2
5 6
LED BOARD
R433 *10K_04
C648
0.1u/16V_04
LPC BIOS ROM
FOR M540S
LPC_AD115,20
Q34 AO3409
G
DS
Q39
2N7002
G
DS
+VDD 5
D24
*17-21VGC -TR8
AC
PCLK_LPC 10
R281
*470_06
Z2110
BATT_CHAR1
D25
*17-21VGC-TR8
AC
WLAN1
C594
0.1u/16V_04
H8_SUSB#20
TPBU TTON _L
Z2105
C647
0. 1u/ 16V_ 04
Q35
2N7002
G
DS
PART NUMBER
High
U12
74AHC1G14GW
1
2
53
4
TP_CLK
BATT_F U LL1
Z2130
C595
0.1u/16V _04
R280
*470_06
R438
*0_04
C398
22p/50V
WLAN _E N16,20
TP BU TTO N _L
TP_C LK
JBIOS1
609- 32 11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16 17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
NC(VPP)
RST#
A9(FGPI3)
A8(FGPI2)
A7(FGPI1)
A6(FGPI0)
A5(WP#)
A4(TBL#)
A3(ID3)
A2(ID2)
A1(ID1)
A0(ID0)
LAD0(FWH0)
LAD1(FWH1)
LAD2(FWH2)
GND LAD3(FWH3)
DQ4(RFU)
DQ5(RFU)
DQ6(RFU)
DQ7(RFU)
NC(RFU)
WE#(FWH4)
OE#(INI T#)
VCC
NC(GND)
NC(VCCA)
GNDA
MODE(IC)
A10(FGPI4)
CLK
VCC
E-LAN
LPC _F R AME# 15, 20
R277
*470_06
PWR _ON 1
Z2128
+5VTP
R278
*470_06
Z2121
JTP_2
*87151-1207A
1
2
3
4
5
6
7
8
9
10
11
12
Z2125
Q38
2N7002
G
DS
JTP_1
85201-0405
1
2
3
4
+3VS
Q44
2N7002
G
DS
+V DD 5
LPC_FRAME# BT_LED
+5VS
+5VS
SOCKET PLCC32
LED_BAT_FULL20
Synaptics
Q42
2N7002
G
DS
SW2
*TC031-AA1G-A160T
3
1
4
2
5 6
R274
*470_06
BATT_CHAR1
Z2113
+VD D 5
C138
*22p/50V
Flash Mode
+5VS
HD _L ED #
R439 100_04
Q40
2N7002
G
DS
Z2119
Z2127
Z2140
VENDOR
LED_EMAIL20
TPBU TTON _R
R103
10K_ 04
BATT_FU LL1
TP_CLK 20
PCIRST#13,16,20,24
Z2126
Z2115
RN44
10K_04_8P4R
1
2
3
4 5
6
7
8
Z2107
LPC_AD015,20
C137
*22p/50V
BT LED
TP_C LK
ACIN _SU S1
Z2117
EMAI L1
Z2106
LED
Z2112
R217 1K_04
+5VTP
TP_DATA 20
Q43
2N 7002
G
DS
+VD D 5 20, 26 ,27 ,2 8,2 9, 30
BT_LED
+5VTP
LED_PWR20
R275
*470_06
Remember M550S/M540S Install Component.
LPC _AD 3 15, 20
HD_LED#17
FWH_INIT#
C139
0.1u/16V_04
R250
10K_04
TOUCH PAD
C397
22p/50V
+3VS
TOUCH PAD
C365
0.1u/16V_04
C593
0.1u/ 16V_04
JLB1
85201-1205
1
2
3
4
5
6
7
8
9
10
11
12
+5VTP
PWR _ON 1
SG
Y
D26
*KPB-3025YSGC
1 3
2 4
Z2118
SG
Y
D22
*K PB-302 5Y SGC
1 3
2 4
Enable
+5V
TP _D A TA
E-MAIL LED
Z2103
+5VS
TP_DATA
+V DD 5
Z2124
R276
*470_06
SG
Y
D23
*K PB-3 025Y SGC
1 3
2 4
+VDD 5
Z2114
Q41
2N7002
G
DS
Low
WLAN LED
LPC_AD215,20
BT_EN20,21
+3VS
Z2123
EMAIL1
LPC_Flash#
LPC_AD3
800409-5102
Z2122
Z2116
+5VS
Z2120
WLAN1
+5VS 10,11,14,16,17,20,21,22,23,25,26
TP BU TTO N _R
+3VS
+5V 16,21,23,26,27,28,29
+3VS 2,6,7,8,10,11,12,13,14,15,16,17,21,22,24,25, 26,28,29
ACIN _SU S1
TP_D ATA
Z2104
HDD/CD-ROM
LED