Cypress CY8CPROTO-062S3-4343W User manual
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CY8CPROTO-062S3-4343W PSoC 62S3 Wi-Fi BT Prototyping Kit Guide, Doc. # 002-28070 Rev. *A 2
Copyrights
© Cypress Semiconductor Corporation, 2019. This document is the property of Cypress Semiconductor Corporation and its
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CY8CPROTO-062S3-4343W PSoC 62S3 Wi-Fi BT Prototyping Kit Guide, Doc. # 002-28070 Rev. *A 3
Contents
Safety and Regulatory Compliance Information 4
1. Introduction 8
1.1 Kit Contents .................................................................................................................9
1.2 Getting Started...........................................................................................................10
1.3 Board Details .............................................................................................................11
1.4 Additional Learning Resources..................................................................................14
1.5 Technical Support......................................................................................................14
1.6 Documentation Conventions......................................................................................14
1.7 Acronyms...................................................................................................................15
2. Kit Operation 16
2.1 Theory of Operation...................................................................................................16
2.2 KitProg3: On-Board Programmer/Debugger..............................................................20
2.2.1 Programming and Debugging using ModusToolbox IDE ...............................20
2.2.2 USB-UART Bridge..........................................................................................24
2.2.3 USB-I2C Bridge..............................................................................................24
3. Hardware 25
3.1 Schematics ................................................................................................................25
3.2 Hardware Functional Description...............................................................................25
3.2.1 CY8CMOD-062S3-4343W (MOD1) ...............................................................25
3.2.2 PSoC 5LP based KitProg3 (U2).....................................................................29
3.2.3 Serial Interconnection between PSoC 5LP and PSoC 6 MCU ......................30
3.2.4 Power Supply System ....................................................................................31
3.2.5 Expansion Connectors ...................................................................................35
3.2.6 CapSense Circuit ...........................................................................................36
3.2.7 LEDs ..............................................................................................................36
3.2.8 Push Buttons..................................................................................................37
3.2.9 Cypress Quad SPI NOR Flash.......................................................................37
3.3 Bill of Materials ..........................................................................................................37
3.4 Frequently Asked Questions......................................................................................38
Revision History 39
CY8CPROTO-062S3-4343W PSoC 62S3 Wi-Fi BT Prototyping Kit Guide, Doc. # 002-28070 Rev. *A 4
Safety and Regulatory Compliance
Information
The CY8CPROTO-062S3-4343W PSoC® 62S3 Wi-Fi BT Prototyping Kit is intended for
development purposes only. Users are advised to test and evaluate this kit in an RF development
environment.
This kit is not a finished product and when assembled may not be resold or otherwise marketed
unless all required authorizations are first obtained. Contact [email protected] for details.
The CY8CPROTO-062S3-4343W, as shipped from the factory, has
been verified to meet with the requirements of CE as a Class A
product.
PSoC 62S3 Wi-Fi BT Prototyping Boards contain electrostatic
discharge (ESD)- sensitive devices. Electrostatic charges readily
accumulate on the human body and any equipment, which can cause
a discharge without detection. Permanent damage may occur on
devices subjected to high-energy discharges. Proper ESD precautions
are recommended to avoid performance degradation or loss of
functionality. Store unused PSoC 62S3 Wi-Fi BT Prototyping Boards in
the protective shipping package.
End-of-Life/Product Recycling
The end-of-life cycle for this kit is five years from the date of
manufacture mentioned on the back of the box. Contact your nearest
recycler to discard the kit.
CY8CPROTO-062S3-4343W PSoC 62S3 Wi-Fi BT Prototyping Kit Guide, Doc. # 002-28070 Rev. *A 5
General Safety Instructions
ESD Protection
ESD can damage boards and associated components. Cypress recommends that you perform
procedures only at an ESD workstation. If an ESD workstation is unavailable, use appropriate ESD
protection by wearing an anti-static wrist strap attached to a grounded metal object.
Handling Boards
CY8CPROTO-062S3-4343W PSoC 62S3 Wi-Fi BT Prototyping Kit is sensitive to ESD. Hold the
board only by its edges. After removing the board from its box, place it on a grounded, static-free
surface. Use a conductive foam pad, if available. Do not slide the board over any surface.
Regulatory Compliance Information
The CY8CPROTO-062S3-4343W PSoC 62S3 Wi-Fi BT Prototyping Kit contains devices that
transmit and receive radio signals in accordance with the spectrum regulations for the 2.4-GHz
unlicensed frequency range.
Cypress Semiconductor Corporation has obtained regulatory approvals for this kit to be used in
specific countries. These countries include the United States (FCC Part 15), Canada (IC RSS210),
and Japan (JRF/TELEC). Additional regional regulatory agency approval may be required to operate
these throughout the world.
This kit, as shipped from the factory, has been tested and found to comply with the limits and
requirements for the following compliances:
■As a Class B digital device, pursuant to part 15 of the FCC Rules.
■As a Class B digital apparatus, compliant with Canadian ICES-003.
CAUTION:
Only antennas with a peak gain of less than or equal to 1.4 dBi may
be used with this device.
The manufacturer is not responsible for any radio or television
interference caused by unauthorized modifications to this
equipment. Such modifications could void the user's authority to
operate the equipment.
CY8CPROTO-062S3-4343W PSoC 62S3 Wi-Fi BT Prototyping Kit Guide, Doc. # 002-28070 Rev. *A 6
Regulatory Statements and Product Labeling
United States (FCC)
The CY8CPROTO-062S3-4343W contains LBEE5KL1DX modular transmitter that complies with
Part 15 of the Federal Communications Commission (FCC) Rules. The FCC ID for this device is
VPYLB1DX.
Operation is subject to the following two conditions:
■This device may not cause harmful interference
■This device must accept any interference received, including interference that may cause unde-
sired operation.
CAUTION: Changes or modifications not expressly approved by the party responsible for
compliance could void the user’s authority to operate the equipment. The antennas for this
transmitter must be installed to provide a separation distance of 20 cm from all persons and must not
be co-located or operating in conjunction with any other antenna or transmitter.
Canada (IC)
This device complies with the Industry Canada license-exempt RSS standard(s). Operation is sub-
ject to the following two conditions:
■This device may not cause interference.
■This device must accept any interference, including interference that may cause undesired oper-
ation of the device.
This equipment complies with radio frequency exposure limits set forth by Industry Canada for an
uncontrolled environment. This equipment should be installed and operated with minimum distance
20 cm between the device and the user or bystanders.
CAUTION: Any changes or modifications not expressly approved by the party responsible for com-
pliance could void the user’s authority to operate the equipment.
Contains IC: 772C-LB1DX
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio
exempts de licence. L'exploitation est autorisée aux deux conditions suivantes: (1) l'appareil ne doit
pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout brouillage radioélectrique
subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Cet équipement est conforme aux limites d'exposition aux radiofréquences définies par Industrie
Canada pour un environnement non contrôlé. Cet équipement doit être installé et utilisé avec un
minimum de 20cm de distance entre le dispositif et l'utilisateur ou des tiers.
Contains IC: 772C-LB1DX
CY8CPROTO-062S3-4343W PSoC 62S3 Wi-Fi BT Prototyping Kit Guide, Doc. # 002-28070 Rev. *A 7
Japan (TELEC)
This product has built-in specified radio equipment which authorized “Japan Radio Certification”
(certification number: 001-P00840) based on type approval system.
Manufactured by Murata Manufacturing
001-P00840
R
CY8CPROTO-062S3-4343W PSoC 62S3 Wi-Fi BT Prototyping Kit Guide, Doc. # 002-28070 Rev. *A 8
1. Introduction
Thank you for your interest in the CY8CPROTO-062S3-4343W PSoC 62S3 Wi-Fi BT Prototyping Kit
(hereafter called PSoC 62S3 Wi-Fi BT Kit). The PSoC 62S3 Wi-Fi BT Kit enables you to evaluate
and develop your applications using the PSoC 62 Series MCU (hereafter called “PSoC 6 MCU”) and
CYW4343W WICED Wi-Fi/BT combo device.
PSoC 6 MCU is Cypress’ latest, ultra-low-power PSoC specifically designed for wearables and IoT
products. PSoC 6 MCU is a true programmable embedded system-on-chip, integrating a 150-MHz
ARM® Cortex
®-M4 as the primary application processor, a 100-MHz ARM Cortex®-M0+ that
supports low-power operations, up to 2 MB Flash and 1 MB SRAM, Secure Digital Host Controller
(SDHC) supporting SD/SDIO/eMMC interfaces, CapSense® touch-sensing, and programmable
analog and digital peripherals that allow higher flexibility, in-field tuning of the design, and faster
time-to-market.
The PSoC 6 MCU on this kit has 512 KB of Flash and 256 KB of SRAM.
The PSoC 62S3 Wi-Fi BT Kit carries a PSoC 6 MCU and a CYW4343W based Wi-Fi and Bluetooth
combination module. In addition, the board features an onboard programmer/debugger (KitProg3), a
512-MB Quad SPI NOR flash, a Micro-B connector for USB device interface, a 5-segment
CapSense slider, two CapSense buttons, a user LED, and one push button. The board supports
operating voltages from 1.8 V to 3.3 V for PSoC 6 MCU.
You can use ModusToolbox™ to develop and debug your PSoC 6 MCU projects. ModusToolbox
software is a set of tools that enable you to integrate Cypress devices into your existing development
methodology. Application development using PSoC 62S3 Wi-Fi BT Kit is also supported in other
development environments such as Mbed OS.
If you are new to PSoC 6 MCU and ModusToolbox IDE, refer to the application note AN221774 -
Getting Started with PSoC 6 MCU to help you familiarize with the PSoC 6 MCU and help you create
your own design using the ModusToolbox IDE.
CY8CPROTO-062S3-4343W PSoC 62S3 Wi-Fi BT Prototyping Kit Guide, Doc. # 002-28070 Rev. *A 9
Introduction
1.1 Kit Contents
The PSoC 62S3 Wi-Fi BT Prototyping Kit package has the following contents, as shown in
Figure 1-1.
■PSoC 62S3 Wi-Fi BT Prototyping Board
■USB Type-A to Micro-B cable
■Quick Start Guide
Figure 1-1. Kit Contents
Inspect the contents of the kit; if you find any part missing, contact your nearest Cypress sales office
for help: www.cypress.com/support.
CY8CPROTO-062S3-4343W PSoC 62S3 Wi-Fi BT Prototyping Kit Guide, Doc. # 002-28070 Rev. *A 10
Introduction
1.2 Getting Started
This guide will help you to get acquainted with the PSoC 62S3 Wi-Fi BT Kit:
■The Kit Operation chapter on page 16 describes the major features of the PSoC 62S3 Wi-Fi BT
Kit and functionalities such as programming, debugging, and the USB-UART and USB-I2C
bridges.
■The Hardware chapter on page 25 provides a detailed hardware description, methods to use the
onboard NOR Flash, kit schematics, and the bill of materials (BOM).
■Application development using PSoC 62S3 Wi-Fi BT Kit is supported in various development
ecosystems such as ModusToolbox, and Mbed OS. For the latest software support for this
development kit including the different development ecosystems, refer to the kit webpage.
❐ModusToolbox is a free development ecosystem that includes the ModusToolbox IDE and the
PSoC 6 SDK. Using ModusToolbox IDE, you can enable and configure device resources,
middleware libraries; and program and debug the device. You can download the software
from the ModusToolbox home page. See the ModusToolbox Installation Guide for additional
information.
❐Mbed OS: Visit Cypress’ Mbed OS page on instructions to develop applications on Cypress’s
target board on the Mbed OS ecosystem.
■There are a wide range of code examples to evaluate the PSoC 62S3 Wi-Fi BT Kit. These
examples help you familiarize yourself with the PSoC 6 MCU and create your own design. These
examples are available in various development ecosystems such as ModusToolbox IDE, Mbed
OS, etc. Visit Cypress’s code example page to access examples for the following development
ecosystems:
❐ModusToolbox based examples
❐Mbed OS based examples
CY8CPROTO-062S3-4343W PSoC 62S3 Wi-Fi BT Prototyping Kit Guide, Doc. # 002-28070 Rev. *A 11
Introduction
1.3 Board Details
The PSoC 62S3 Wi-Fi BT Prototyping Kit that has the following features:
■CY8CMOD-062S3-4343W that contains
❐PSoC 6 MCU with SDHC
❐Murata Type 1DX ultra-small 2.4-GHz WLAN and Bluetooth module based on CYW4343W
■512-Mbit external Quad SPI NOR Flash that provides a fast, expandable memory for data and
code
■KitProg3 onboard SWD programmer/debugger, USB-UART and USB-I2C bridge functionality
■CapSense touch-sensing slider (5 elements) and two buttons, based on self-capacitance (CSD)
■A Micro-B connector for PSoC 6 MCU USB device interface
■1.8 V and 3.3 V operation of PSoC 6 MCU is supported
■One user LED, one user button, and a reset button for PSoC 6 MCU
■One Mode selection button and one Status LED for KitProg3
Refer to Figure 2-4 for more details of the kit features.
Figure 1-2 shows the pinout of the PSoC 62S3 Wi-Fi BT Kit.
Figure 1-2. Prototyping Kit Pinout
VCC_5V
VCC_3V6
J9
J4
J6
J2J1
GND
VBACKUP
GND
NC
NC
BT_I2S_DI
BT_I2S_DO
BT_I2S_WS
BT_I2S_CLK
BT_GPIO_5
BT_GPIO_4
BT_GPIO_3
NC
GND
P11_3
P11_4
P11_5
P11_6
P11_7
P11_2
P11_0
VCC_IO_FLASH
GND
VCC_FLASH
P11_1
P0_4
P6_5
P6_4
P6_VDD
GND
NC
NC
WL_IO_1
NC
NC
VDDIO_WL
GND
B_RTS
B_CTS
B_RX
B_TX
VREF
GND
P10_5
P10_4
P10_3
P10_2
GND
NC
NC
NC
GND
P8_1
P8_0
NC
P9_0
P7_3
P7_2
P7_1
P7_0
GND
NC
GND
VBAT_WL
P9_1
P12_7
P12_6
P6_3
P6_2
P5_7
P5_6
P6_VDD
VTRAG
GND
XRES
P6_7
P6_6
P5_1
P5_0
P10_1
P10_0
P8_1
P8_0
NC
P9_0
P7_3
P7_2
P7_1
P7_0
GND
NC
GND
RTS
CTS
RX
TX
J7
KP_VBUS
GND
VTARG
I2C_SCL
I2C_SDA
J5
VTRAG
GND
RESET
SWDCLK
SWDIO
CY8CPROTO-062S3-4343W PSoC 62S3 Wi-Fi BT Prototyping Kit Guide, Doc. # 002-28070 Rev. *A 12
Introduction
Table 1-1. Pioneer Board Pinout
Pin Primary On-board
Function
Secondary On-board
Function Connection details
PSoC 6 MCU Pins
XRES Hardware Reset – Remove R49 to disconnect it from
KitProg3 RESET.
P0[4]
User Button with
Hibernate wakeup
capability
– Configured as Active LOW switch
P5[0] GPIO – –
P5[1] GPIO – –
P5[6] GPIO – –
P5[7] GPIO – –
P6[4] I2C SCL – Remove R21 to disconnect from
KitProg3 I2C_SCL
P6[5] I2C SDA – Remove R30 to disconnect from
KitProg3 I2C_SDA
P6[6] SWDIO GPIO –
P6[7] SWDCLK GPIO –
P8[0] CapSense Button0 GPIO Connected to CapSense by default.
Remove R84 to disconnect CapSense.
P8[1] CapSense Button1 GPIO Connected to CapSense by default.
Remove R77 to disconnect CapSense.
P7[0] CapSense Silder0 GPIO Connected to CapSense by default.
Remove R82 to disconnect CapSense.
P7[1] CapSense Silder1 GPIO Connected to CapSense by default.
Remove R81 to disconnect CapSense.
P7[2] CapSense Silder2 GPIO Connected to CapSense by default.
Remove R80 to disconnect CapSense.
P7[3] CapSense Silder3 GPIO Connected to CapSense by default.
Remove R79 to disconnect CapSense.
P9[0] CapSense Silder4 GPIO Connected to CapSense by default.
Remove R78 to disconnect CapSense.
P9[1] GPIO – –
P7[7] CMOD – –
P10[0] UART RX GPIO
Connected to KitProg3 UART TX pin.
Remove R53 to disconnect from
KitProg3.
P10[1] UART TX GPIO
Connected to KitProg3 UART RX pin.
Remove R64 to disconnect from
KitProg3.
P10[2] GPIO UART RTS Populate R29 to connect to KitProg3
UART CTS.
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Introduction
P10[3] GPIO UART CTS Populate R33 to connect to KitProg3
UART RTS.
P10[4] GPIO – –
P10[5] GPIO – –
P11[0] GPIO – –
P11[1] Red User LED – –
P11[2] QSPI FLASH CS GPIO –
P11[3] QSPI Flash IO3 GPIO Remove R2 to isolate from external
memory and use as a GPIO
P11[4] QSPI Flash IO2 GPIO Remove R7 to isolate from external
memory and use as a GPIO
P11[5] QSPI Flash IO1 GPIO Remove R1 to isolate from external
memory and use as a GPIO
P11[6] QSPI Flash IO0 GPIO Remove R3 to isolate from external
memory and use as a GPIO
P11[7] QSPI FLASH CLK GPIO Remove R5 to isolate from external
memory and use as a GPIO
P12[6] GPIO – –
P12[7] GPIO – –
USB_DP USB-FS device
interface ––
USB_DM USB-FS device
interface ––
CYW4343 Pins
BT_UART_TXD
UART interface with
Host MCU (PSoC 6
MCU)
–
Connected to UART RX pin (P3.0) of
PSoC 6 MCU by default. To connect to
KitProg3, remove R64 and populate
R63
BT_UART_RXD
UART interface with
Host MCU (PSoC 6
MCU)
–
Connected to UART TX pin (P3.1) of
PSoC 6 MCU by default. To connect to
KitProg3, remove R53 and populate
R52
BT_UART_CTS
UART interface with
Host MCU (PSoC 6
MCU)
–
Connected to UART RTS pin (P9.2) of
PSoC 6 MCU by default. To connect to
KitProg3, remove R33 (if loaded) and
populate R26
BT_UART_RTS
UART interface with
Host MCU (PSoC 6
MCU)
–
Connected to UART CTS pin (P9.3) of
PSoC 6 MCU by default. To connect to
KitProg3, remove R29 (if loaded) and
populate R24
BT_I2S_WS I2S Word Select – –
BT_I2S_CLK I2S Clock – –
BT_I2S_DI I2S Data Input – –
Table 1-1. Pioneer Board Pinout (continued)
Pin Primary On-board
Function
Secondary On-board
Function Connection details
CY8CPROTO-062S3-4343W PSoC 62S3 Wi-Fi BT Prototyping Kit Guide, Doc. # 002-28070 Rev. *A 14
Introduction
1.4 Additional Learning Resources
Cypress provides a wealth of data at www.cypress.com/psoc6 to help you to select the right PSoC
device for your design and to help you to quickly and effectively integrate the device into your
design.
1.5 Technical Support
For assistance, visit Cypress Support or contact customer support at +1(800) 541-4736 Ext. 3 (in the
USA) or +1 (408) 943-2600 Ext. 3 (International).
You can also use the following support resources if you need quick assistance:
■Self-help (Technical Documents).
■Local Sales Office Locations.
1.6 Documentation Conventions
BT_I2S_DO I2S Data Output – –
BT_GPIO_2 NC –
BT_GPIO_2 pin is not routed on to the
castellated pads on
CY8CMOD-062S3-4343W carrier
module. Hence this pin is NC on the kit.
BT_GPIO_3 Bluetooth GPIO – –
BT_GPIO_4 Bluetooth GPIO – –
BT_GPIO_5 Bluetooth GPIO – –
WL_IO_1 GPIO – –
Table 1-2. Document Conventions for Guides
Convention Usage
Courier New Displays file locations, user entered text, and source code:
C:\...cd\icc\
Italics Displays file names and reference documentation:
Read about the sourcefile.hex file in the PSoC Creator User Guide.
[Bracketed, Bold]Displays keyboard commands in procedures:
[Enter] or [Ctrl] [C]
File > Open Represents menu paths:
File > Open > New Project
Bold Displays commands, menu paths, and icon names in procedures:
Click the File icon and then click Open.
Times New Roman Displays an equation:
2 + 2 = 4
Text in gray boxes Describes cautions or unique functionality of the product.
Table 1-1. Pioneer Board Pinout (continued)
Pin Primary On-board
Function
Secondary On-board
Function Connection details
CY8CPROTO-062S3-4343W PSoC 62S3 Wi-Fi BT Prototyping Kit Guide, Doc. # 002-28070 Rev. *A 15
Introduction
1.7 Acronyms
Table 1-3. Acronyms Used in this Document
Acronym Definition
ADC Analog-to-Digital Converter
BLE Bluetooth Low Energy
BOM Bill of Materials
CMOD Modulator Capacitor
CPU Central Processing Unit
CSD CapSense Sigma Delta
DC Direct Current
Del-Sig Delta-Sigma
DMA Direct Memory Access
ECO External Crystal Oscillator
ESD Electrostatic Discharge
GPIO General-Purpose Input/Output
HID Human Interface Device
I2C Inter-Integrated Circuit
I2S Inter-IC Sound
IC Integrated Circuit
IDE Integrated Development Environment
IoT Internet of Things
LED Light-emitting Diode
LPO Low Power Oscillator
OOB Out Of Box
PC Personal Computer
PSoC Programmable System-on-Chip
PWM Pulse Width Modulation
QSPI Quad Serial Peripheral Interface
SAR Successive Approximation Register
SDHC Secure Digital Host Controller
SDIO Secure Digital Input Output
SDK Software Development Kit
SMIF Serial Memory Interface
SPI Serial Peripheral Interface
SRAM Serial Random Access Memory
SWD Serial Wire Debug
UART Universal Asynchronous Receiver Transmitter
USB Universal Serial Bus
WCO Watch Crystal Oscillator
CY8CPROTO-062S3-4343W PSoC 62S3 Wi-Fi BT Prototyping Kit Guide, Doc. # 002-28070 Rev. *A 16
2. Kit Operation
This chapter introduces you to various features of the PSoC 62S3 Wi-Fi BT Prototyping Board,
including the theory of operation and the onboard programming and debugging functionality,
KitProg3 USB-UART and USB-I2C bridges.
2.1 Theory of Operation
The PSoC 62S3 Wi-Fi BT Prototyping Board is built around PSoC 6 MCU. Figure 2-1 shows the
block diagram of the PSoC 6 MCU device used in the PSoC 62S3 Wi-Fi BT Prototyping Board. For
details of device features, see the device datasheet.
Figure 2-1. PSoC 6 MCU Block Diagram
WCO
RTC BREG
Back up
Backup Control
IO Subsystem
Peripheral Interconnect (MMIO,PPU)
IOSS GPIO
PCLK
16x GPIO w. AMUX Bus, 2X GPIO OVT, 46x GPIO
CPU Subsystem
System Interconnect (Multi Layer AHB, IPC, MPU/SMPU)
CRYPTO
AES,SHA,CRC,
TRNG,RSA,ECC
Initiator/MMIO
High Speed I/O Matrix, Smart I/O, Boundary Scan
1x SCB
I2C,SPI
PSoC 62
CY8C62x5
Digital DFT
Test
Analog DFT
System Resources
Power
Rese t
Slee p Control
PWRSYS-LP/ULP
REF
POR
Reset Control
TestMode Entry
XRES
LVD
BOD
Deep Sleep
Hibernate
Active/Sleep
LowePowerActive/Sleep
Power Modes
Backup
OVP
Clock
Clock Control
IMO
WDT
1xPLL
ECO
ILO
FLL
SWJ/MTB/CTI
MUL, NVIC, MPU
Cortex M0+
100 MHz (1.1V)
25 MHz (0.9V)
2x Smar t IO
eFUSE
1024 bit
Prog.
Analog
SAR
ADC
(12-bit)
x1
SARMUX
SWJ/ETM/ITM/CTI
Cortex M4
150 MHz (1.1V)
50 MHz (0.9V)
FPU, NVIC, MPU
SONOS
FLASH
512+32 KB
FLASH Controller
8 KB $ 8 KB $
SRAM0
256 KB
SRAM Controller
ROM
64 KB
ROM Controller
Serial Memory I/F
QSPI with OTF Encryption/Decryption
1x SDHC
SD/SDIO/eMMC
2x LPCOMP
Low Power Co mpa rator
CSD
CapSense
Buck
1x CAN FD
DMA
MMIO
USB-FS
Host + Device
FS/LS
PHY
DMA
2 cha nnels
DW1
22 chann els
LCD
12x TCPWM
TIMER,CTR,QD, PWM
6x SCB
I2C,SPI,UART
DW0
22 chann els
CY8CPROTO-062S3-4343W PSoC 62S3 Wi-Fi BT Prototyping Kit Guide, Doc. # 002-28070 Rev. *A 17
Kit Operation
Figure 2-2. Block Diagram of Prototyping Kit
Figure 2-3. Block Diagram of CY8CMOD-062S3-4343W (Carrier Module)
User
Button
I/O
Headers
KitProg3
(PSoC5LP)
Reset
Button
SWD CY8CMOD‐062S3‐4343W
(CarrierMoudle)
UARTTX,RX
I2C
VBUS
3.3V
CypressPart LoadedParts NoLoadParts
1.8V
3.6V
5V PSoC 6
Section
KitProg3
Section
VDDIO2
VTARG
VBAT
UARTCTS,RTS
P6_VDD
VTAR
G
SWD
Current
limit
Switch
2xCapSense
button
5‐Segment
CapSenseSlider
I2CEEPROM
QSPI
Flash
User
LED
Micro‐USB
Voltage
SelectionJumper
Current
Measurement
1.8V
LDO
3.3V
LDO
3.6V
Buck
4.7K
Pull‐up
4.7K
Pull‐up
Power
LED
Mode
Switch
Status
LED
IO
Header
UARTH/WFlowControl
LevelTranslator
Power
LED
Micro‐
USB
Currentlimit
Switch
5‐pin
Header
5‐pin
Header
USB
10‐pinJTAG/
SWD
Cypress
PSoC6MCU
Oscillator
32KHz
Crystal
32.768KHz
CMOD
Carrier
Module
Footprint
(0.8mm
castellatedpads)
RFSwitch
UMC
Connector
RF
Matching
Network UMC
Connector
VDDUSB
VDDx,VDDIOx
CYW4343W
1DXModule
VBAT
VDDIO
SDIO(6I/Os)
UART(4I/Os)
Control(5I/Os)
35I/Os
USB
XRES 13I/Os
3.3V
1.8~3.3V
3.6V
1.8~3.3V
CY8CPROTO-062S3-4343W PSoC 62S3 Wi-Fi BT Prototyping Kit Guide, Doc. # 002-28070 Rev. *A 18
Kit Operation
Figure 2-4. PSoC 62S3 Wi-Fi BT Prototyping Board - Top View
The PSoC 62S3 Wi-Fi BT Prototyping Board has the following peripherals:
1. KitProg3 I/O headers (J6, J7): These headers bring out the USB-UART and USB-I2C interface
pins of the KitProg3 respectively. If the KitProg3 section is broken away, it is also necessary to
connect VTARG and GND as this is used to voltage level translation.
2. KitProg3 programming mode selection button (SW3): This button can be used to switch
between various modes of operation of KitProg3 (CMSIS-DAP BULK, CMSIS-DAP HID or
DAPLink modes). For more details, see the KitProg3 User Guide.
3. KitProg3 USB connector (J8): The USB cable provided along with the PSoC 62S3 Wi-Fi BT Kit
connects between this USB connector and the PC to use the KitProg3 onboard programmer and
debugger and powers the board.
4. KitProg3 (PSoC 5LP) programmer and debugger (CY8C5868LTI-LP039, U2): The PSoC 5LP
device (CY8C5868LTI-LP039) serving as KitProg3, is a multi-functional system, which includes a
SWD programmer, debugger, USB-I2C bridge and USB-UART bridge. For more details, see the
KitProg3 User Guide.
5. KitProg3 5-pin programming header (J5): This header brings out the SWD interface pins of the
KitProg3. This is used to program and debug the PSoC 6 MCU. If KitProg3 section is broken
away, it can be used to program any device over the 5-pin interface. Please note that VTARG is
an input to KitProg3, and hence target must be powered externally. In the PSoC 62S3 Wi-Fi BT
Kit, the on-board regulators on the PSoC 6 MCU section provide VTARG.
6. KitProg3 status LED (LED2): Amber LED indicates the status of KitProg3. For details on the
KitProg3 status, see the KitProg3 User Guide.
7. PSoC 6 MCU I/O headers (J1, J2): These headers provide connectivity to PSoC 6 MCU GPIOs.
Most of these I/Os are also connected to on-board peripherals.
8. PSoC 6 MCU user button (SW2): This button can be used to provide an input to PSoC 6 MCU.
Note that by default the button connects the PSoC 6 MCU pin to ground when pressed, so you
need to configure the PSoC 6 MCU pin as a digital input with resistive pull-up for detecting the
button press. This button also provides a wake-up source from low-power modes of the device. In
addition, this button can be used to activate the regulator control output from PSoC 6 MCU.
1
2
3
4
5
6
7
7
8
9
11
12
13 14
15
16
17
18
19
20
212221
10
115
CY8CPROTO-062S3-4343W PSoC 62S3 Wi-Fi BT Prototyping Kit Guide, Doc. # 002-28070 Rev. *A 19
Kit Operation
9. Cypress PSoC 6 (512K) with CYW4343W Carrier Module (CY8CMOD-062S3-4343W, MOD1):
This kit is designed to highlight the features of the PSoC 6 MCU on the CY8CMOD-062S3-
4343W. For details refer to Hardware chapter on page 25.
10. CYW4343W based Murata 1DX Module: The Type 1DX module is an ultra-small module that
includes 2.4 GHz WLAN and Bluetooth functionality. Based on the Cypress CYW4343W, the
module provides high-efficiency RF front end circuits. To ease Wi-Fi certification, the Type 1DX
module complies with IEEE 802.11b/g/n and Bluetooth Version 4.2 plus EDR, Power Class
(10 dBm max) + BLE.
11. PSoC 6 MCU: This kit is designed to highlight the features of the PSoC 6 MCU. For details on
PSoC 6 MCU pin mapping, refer to Table 1-1 on page 12.
12. PSoC 6 MCU user LED (LED4): The red user LED can operate over the entire operating
voltage range of PSoC 6 MCU. The LED is active LOW, so the pins must be driven to ground to
turn ON the LED.
13. PSoC 6 MCU program and debug header (J11): This 10-pin header allows you to program and
debug the PSoC 6 MCU using an external programmer such as MiniProg4. Please note that this
is not loaded by default.
14. External Power Supply VIN connector (J9): This connector connects an external DC power
supply input to the onboard regulators. The voltage input from the external supply should be
between 3.6 V and 5 V. Note that this is not required when powering via one of the two Micro-
USB connectors on the board.
15. Power LEDs (LED1, LED3): LED1 and LED3 are amber LEDs that indicate the status of power
supplied to PSoC 5LP and PSoC 6 MCU respectively.
16. PSoC 6 USB device connector (J10): The USB cable provided with the PSoC 62S3 Wi-Fi BT
Prototyping Kit can be connected between this USB connector and the PC to use the PSoC 6
MCU USB device applications.
17. PSoC 6 MCU reset button (SW1): This button is used to reset PSoC 6 MCU. This button
connects the PSoC 6 MCU reset (XRES) pin to ground.
18. System Power selection jumper (J3): This switch is used to select the PSoC 6 MCU’s supply
voltage (P6_VDD) between 1.8 V and 3.3 V.
19. Cypress 512-Mbit serial NOR flash memory (S25FL512S, U1): The S25HL512T NOR flash of
512Mbit capacity is connected to the Quad SPI interface of the PSoC 6 MCU. The NOR device
can be used for both data and code memory with execute-in-place (XIP) support and encryption.
20. CapSense header (J4): CapSense section is independent and can be broken away from the
PSoC 6 MCU section.
21. CapSense buttons (BTN0 and BTN1): CapSense touch-sensing buttons, capable of
self-capacitance (CSD) operation, let you evaluate Cypress’ fourth-generation CapSense
technology.
22. CapSense slider (SLIDER): CapSense touch-sensing slider capable of self-capacitance (CSD)
operation. The slider and the buttons have a 1-mm acrylic overlay for smooth touch sensing.
See Hardware Functional Description on page 25 for details on various hardware blocks.
CY8CPROTO-062S3-4343W PSoC 62S3 Wi-Fi BT Prototyping Kit Guide, Doc. # 002-28070 Rev. *A 20
Kit Operation
2.2 KitProg3: On-Board Programmer/Debugger
The PSoC 62S3 Wi-Fi BT Prototyping Board can be programmed and debugged using the onboard
KitProg3. KitProg3 is an onboard programmer/debugger with USB-UART and USB-I2C. Mass
Storage programming is supported in DAPLink mode. A Cypress PSoC 5LP device is used to
implement KitProg3 functionality. For more details on the KitProg3 functionality, see the KitProg3
User Guide.
2.2.1 Programming and Debugging using ModusToolbox IDE
This section presents a quick overview of programming and debugging using ModusToolbox IDE.
For detailed instructions, see Help > ModusToolbox IDE Documentation > User Guide.The steps
below use the PSoC 6 MCU: Hello World example, which is the Out Of Box (OOB) project of this kit,
to illustrate programming and debugging in ModusToolbox IDE.
1. Connect the board to the PC using the USB cable, as shown in Figure 2-5. It enumerates as a
USB Composite Device if you are connecting it to your PC for the first time. KitProg3 can operate
either in CMSIS-DAP Bulk mode (default) or CMSIS-DAP HID mode or DAPLink mode.
Programming is faster with the Bulk mode. The status LED (Amber) is always ON in Bulk mode,
ramping at 1 Hz rate in HID mode, and ramping at 2 Hz rate in DAPLink mode. Press and release
the Mode select button (SW3) to switch between these modes. If you do not see the desired LED
status, see the KitProg3 User Guide for details on the KitProg3 status and troubleshooting
instructions.
Figure 2-5. Connect USB Cable to USB Connector on the Board
2. In the ModusToolbox IDE, import the desired code example (application) into a new workspace.
a. Click on New Application from the Quick Panel.
Figure 2-6. Create New Application
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