Cypress CYW9P62S1-43012EVB-01 User manual

CYW9P62S1-43012EVB-01
PSoC 62S1 Wi-Fi BT Pioneer Kit Guide
Doc. # 002-28722 Rev. *B
Cypress Semiconductor
198 Champion Court
San Jose, CA 95134-1709
www.cypress.com

Copyrights
CYW9P62S1-43012EVB-01 PSoC 62S1 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28722 Rev. *B 2
Copyrights
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and its subsidiaries (“Cypress”). This document, including any software or firmware included or referenced in this document
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Cypress, the Cypress logo, Spansion, the Spansion logo, and combinations thereof, WICED, PSoC, CapSense, EZ-USB, F-
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respective owners.

CYW9P62S1-43012EVB-01 PSoC 62S1 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28722 Rev. *B 3
Contents
Safety and Regulatory Compliance Information 4
1. Introduction 6
1.1 Kit Contents .................................................................................................................7
1.2 Getting Started.............................................................................................................8
1.3 Board Overview ...........................................................................................................8
1.4 Additional Learning Resources....................................................................................9
1.5 Technical Support........................................................................................................9
1.6 Documentation Conventions........................................................................................9
1.7 Acronyms.....................................................................................................................9
2. Kit Operation 11
2.1 Board Details .............................................................................................................11
2.2 KitProg3: On-Board Programmer/Debugger..............................................................20
2.2.1 Programming and Debugging using ModusToolbox ......................................20
2.2.2 USB-UART Bridge..........................................................................................24
2.2.3 USB-I2C Bridge..............................................................................................25
3. Hardware 26
3.1 Schematics ................................................................................................................26
3.2 Hardware Functional Description...............................................................................26
3.2.1 CYW9P62S1-43012CAR-01 (MOD1) ............................................................26
3.2.2 PSoC 5LP-based KitProg3 (U2).....................................................................31
3.2.3 Serial Interconnection between PSoC 5LP and PSoC 6 MCU ......................32
3.2.4 Serial Interconnection Between PSoC 5LP and CYW43012 .........................33
3.2.5 Power Supply System ....................................................................................33
3.2.6 I/O Headers....................................................................................................37
3.2.7 CapSense Circuit ...........................................................................................38
3.2.8 LEDs ..............................................................................................................39
3.2.9 Push Buttons..................................................................................................40
3.2.10 Cypress Quad SPI NOR Flash.......................................................................40
3.2.11 Cypress Quad SPI F-RAM .............................................................................41
3.2.12 PSoC 6 USB ..................................................................................................41
3.3 PSoC 62S1 Wi-Fi BT Pioneer Kit Rework .................................................................42
3.3.1 U.FL (UMCC) Connector for External Antenna ..............................................42
3.3.2 U.FL (UMCC) Connector for Antenna Diversity..............................................42
3.4 Bill of Materials ..........................................................................................................42
3.5 Frequently Asked Questions......................................................................................43
Revision History 44

CYW9P62S1-43012EVB-01 PSoC 62S1 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28722 Rev. *B 4
Safety and Regulatory Compliance
Information
The CYW9P62S1-43012EVB-01 PSoC® 62S1 Wi-Fi BT Pioneer Kit is intended for development
purposes only. Users are advised to test and evaluate this kit in an RF development environment.
This kit is not a finished product and when assembled may not be resold or otherwise marketed
unless all required authorizations are first obtained. Contact [email protected] for details.
The CYW9P62S1-43012EVB-01, as shipped from the factory, has been verified to meet with the
requirements of CE as a Class A product.
PSoC 62S1 Wi-Fi BT Pioneer Boards contain electrostatic discharge
(ESD)- sensitive devices. Electrostatic charges readily accumulate on
the human body and any equipment, which can cause a discharge
without detection. Permanent damage may occur on devices
subjected to high-energy discharges. Proper ESD precautions are
recommended to avoid performance degradation or loss of
functionality. Store unused PSoC 62S1 Wi-Fi BT Pioneer Boards in the
protective shipping package.
End-of-Life/Product Recycling
The end-of-life cycle for this kit is five years from the date of
manufacture mentioned on the back of the box. Contact your nearest
recycler to discard the kit.

CYW9P62S1-43012EVB-01 PSoC 62S1 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28722 Rev. *B 5
General Safety Instructions
ESD Protection
ESD can damage boards and associated components. Cypress recommends that you perform
procedures only at an ESD workstation. If an ESD workstation is unavailable, use appropriate ESD
protection by wearing an anti-static wrist strap attached to a grounded metal object.
Handling Boards
PSoC 62S1 Wi-Fi BT Pioneer Board is sensitive to ESD. Hold the board only by its edges. After
removing the board from its box, place it on a grounded, static-free surface. Use a conductive foam
pad, if available. Do not slide the board over any surface.

CYW9P62S1-43012EVB-01 PSoC 62S1 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28722 Rev. *B 6
1. Introduction
Thank you for your interest in the CYW9P62S1-43012EVB-01 PSoC 62S1 Wi-Fi BT Pioneer Kit. The
PSoC 62S1 Wi-Fi BT Pioneer Kit enables you to evaluate and develop your applications using the
PSoC 62 Series MCU (hereafter called “PSoC 6 MCU”) and CYW43012 WICED Wi-Fi/BT combo
device.
PSoC 6 MCU is Cypress’ latest, ultra-low-power PSoC specifically designed for wearables and IoT
products. PSoC 6 MCU is a true programmable embedded system-on-chip, integrating a 150-MHz
Arm® Cortex®-M4 as the primary application processor, a 100-MHz Arm Cortex-M0+ that supports
low-power operations, up to 2 MB Flash and 1 MB SRAM, CapSense® touch-sensing, and
programmable analog and digital peripherals that allow higher flexibility, in-field tuning of the design,
and faster time-to-market. The PSoC 6 MCU on this kit, CY8C6247FDI-D52 has 1 MB Flash and
288 KB SRAM.
The PSoC 62S1 Wi-Fi BT Pioneer Board offers compatibility with Arduino™ shields. The board
features a PSoC 6 MCU, and a CYW43012 Wi-Fi/Bluetooth combo module. Cypress CYW43012 is
a 28-nm, ultra-low-power device that supports single-stream, dual-band IEEE 802.11n-compliant
Wi-Fi MAC/baseband/radio and Bluetooth 5.0 BR/EDR/LE. The WLAN section supports SDIO
interface to the host MCU (PSoC 6 MCU), and the Bluetooth section supports high-speed 4-wire
UART interface to the host MCU. In addition, the board features an onboard programmer/debugger
(KitProg3), a 512-Mbit Quad SPI NOR flash, a 4-Mbit Quad SPI F-RAM, a micro-B connector for
USB device interface, a 5-segment CapSense slider, two CapSense buttons, two user LEDs, and
one push button.
You can use ModusToolbox™ to develop and debug your PSoC 6 MCU projects. ModusToolbox
software is a set of tools that enable you to integrate Cypress devices into your existing development
methodology.
If you are new to PSoC 6 MCU and ModusToolbox IDE, refer to the application note AN228571 -
Getting Started with PSoC 6 MCU on ModusToolbox to help you familiarize with the PSoC 6 MCU
and help you create your own design using the ModusToolbox IDE.

CYW9P62S1-43012EVB-01 PSoC 62S1 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28722 Rev. *B 7
Introduction
1.1 Kit Contents
The CYW9P62S1-43012EVB-01 PSoC 62S1 Wi-Fi BT Pioneer Kit has the following contents, as
shown in Figure 1-1.
■PSoC 62S1 Wi-Fi BT Pioneer Board
■USB Type-A to Micro-B cable
■Four jumper wires (4 inches each)
■Two jumper wires (5 inches each)
■Quick Start Guide
Figure 1-1. Kit Contents
Inspect the contents of the kit; if you find any part missing, contact your nearest Cypress sales office
for help: www.cypress.com/support.

CYW9P62S1-43012EVB-01 PSoC 62S1 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28722 Rev. *B 8
Introduction
1.2 Getting Started
This guide will help you get acquainted with the PSoC 62S1 Wi-Fi BT Pioneer Kit:
■The Kit Operation chapter on page 11 describes the major features of the PSoC 62S1 Wi-Fi BT
Pioneer Kit and functionalities such as programming, debugging, and the USB-UART and USB-
I2C bridges.
■The Hardware chapter on page 26 provides a detailed hardware description, methods to use the
onboard NOR flash, kit schematics, and the bill of materials (BOM).
■Application development using PSoC 62S1 Wi-Fi BT Pioneer Kit is supported in various
development ecosystems such as ModusToolbox and Mbed OS. For the latest software support
for this development kit including the different development ecosystems, refer to the kit webpage.
❐ModusToolbox software is a free development ecosystem that includes the ModusToolbox
IDE. Using ModusToolbox IDE, you can enable and configure device resources, middleware
libraries, and program and debug the device. You can download the software from the
ModusToolbox home page. See the ModusToolbox User Guide for additional information.
❐Mbed OS: Visit Cypress’ Mbed OS page on instructions to develop applications on Cypress’
target board on the Mbed OS platform.
■There is a wide range of code examples to evaluate the PSoC 62S1 Wi-Fi BT Pioneer Board.
These examples help you familiarize yourself with the PSoC 6 MCU and create your own design.
These examples are available in various development ecosystems such as ModusToolbox IDE
and Mbed OS. Visit Cypress’ code example page to access examples for the following
development ecosystems:
❐ModusToolbox based examples
❐Mbed OS based examples
1.3 Board Overview
The PSoC 62S1 Wi-Fi BT Pioneer Board has the following features:
■CYW9P62S1-43012CAR-01 carrier module that contains WM-BAC-CYW-50 System in Package
(SiP) module by Universal Global Scientific Industrial (USI), which has
❐PSoC 6 MCU (CY8C6247FDI-D52)
❐CYW43012 module which supports 2.4/5.0-GHz WLAN and Bluetooth functionality
■512-Mbit external Quad SPI NOR Flash that provides a fast, expandable memory for data and
code
■4-Mbit Quad SPI ferroelectric random-access memory (F-RAM)
■KitProg3 onboard SWD programmer/debugger with USB-UART and USB-I2C bridge functionality
■CapSense touch-sensing slider (5 elements), two buttons, based on self-capacitance (CSD) and
mutual-capacitance (CSX) sensing
■A micro-B connector for USB device interface for PSoC 6 MCU
■1.8 V operation of PSoC 6 MCU is supported
■Two user LEDs, one user button, and a reset button for PSoC 6 MCU
■One Mode selection button and one Status LED for KitProg3

CYW9P62S1-43012EVB-01 PSoC 62S1 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28722 Rev. *B 9
Introduction
1.4 Additional Learning Resources
Cypress provides a wealth of data at www.cypress.com/psoc6 to help you to select the right PSoC
device for your design and to help you to quickly and effectively integrate the device into your
design.
1.5 Technical Support
For assistance, visit Cypress Support or contact customer support at [phone] Ext. 3 (in the
USA) or [phone] Ext. 3 (International).
You can also use the following support resources if you need quick assistance:
■Self-help (Technical Documents).
■Local Sales Office Locations.
1.6 Documentation Conventions
1.7 Acronyms
Table 1-1. Document Conventions for Guides
Convention Usage
Courier New Displays file locations, user entered text, and source code:
C:\...cd\icc\
Italics Displays file names and reference documentation:
Read about the sourcefile.hex file in the PSoC Creator User Guide.
File > Open Represents menu paths:
File > Open > New Project
Bold Displays commands, menu paths, and icon names in procedures:
Click the File icon and then click Open.
Times New Roman Displays an equation:
2 + 2 = 4
Text in gray boxes Describes cautions or unique functionality of the product.
Table 1-2. Acronyms Used in this Document
Acronym Definition
ADC Analog-to-Digital Converter
BLE Bluetooth Low Energy
BOM Bill of Materials
BT Bluetooth
CINT Integration Capacitor
CMOD Modulator Capacitor
CPU Central Processing Unit
CSD CapSense Sigma Delta
CSX CapSense Crosspoint
DC Direct Current
Del-Sig Delta-Sigma

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Introduction
DMA Direct Memory Access
ECO External Crystal Oscillator
ESD Electrostatic Discharge
GPIO General-Purpose Input/Output
HID Human Interface Device
I2C Inter-Integrated Circuit
I2S Inter-IC Sound
IC Integrated Circuit
IDE Integrated Development Environment
IoT Internet of Things
LED Light-emitting Diode
LPO Low Power Oscillator
MAC Medium Access Control
OOB Out-of Box
PC Personal Computer
PDM Pulse Density Modulation
PSoC Programmable System-on-Chip
PWM Pulse Width Modulation
QSPI Quad Serial Peripheral Interface
SAR Successive Approximation Register
SDIO Secure Digital Input Output
SiP System in Package
SPI Serial Peripheral Interface
SRAM Serial Random Access Memory
SWD Serial Wire Debug
UART Universal Asynchronous Receiver Transmitter
USB Universal Serial Bus
WCO Watch Crystal Oscillator
WLAN Wireless Local Area Network
Table 1-2. Acronyms Used in this Document (continued)
Acronym Definition

CYW9P62S1-43012EVB-01 PSoC 62S1 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28722 Rev. *B 11
2. Kit Operation
This chapter introduces you to various features of the PSoC 62S1 Wi-Fi BT Pioneer Board, including
the theory of operation and the onboard KitProg3 programming and debugging functionality,
USB-UART and USB-I2C bridges.
2.1 Board Details
The PSoC 62S1 Wi-Fi BT Pioneer Board is built around a PSoC 6 MCU. Figure 2-1 shows the block
diagram of the PSoC 6 MCU device used on the board. For details of device features, see the device
datasheet.
Figure 2-1. PSoC 6 MCU Block Diagram
CPU Subsystem
System Interconnect (Multi Layer AHB, MPU/SMPU, IPC)
ROM
128 KB
ROM Controller
CRYPTO
DES/TDES,
AES,SHA,CRC,
TRNG,RSA/ECC
Accelerator
Initiator/MMIO
SWJ/MTB/CTI
8KB Cache
Cortex M0+
100 MHz (1.1V)
25 MHz (0.9V)
MUL, NVIC, MPU
IO Subsystem
Peripheral Interconnect (MMIO, PPU)
IOSS GPIO
PCLK
104 GPIOs (6 of these are OVT Pins)
EFUSE (1024 bits)
PSoC 62
Serial Memory I/F
(QSPI with OTF Encryption/Decryption))
DMA
MMIO
USB-FS
Host + Device
FS/LS
PHY
FLASH
1024+32 KB
FLASH Controller
SWJ/ETM/ITM/CTI
FPU, NVIC, MPU, BB
Cortex M4
150 MHz (1.1V)
50 MHz (0.9V)
8KB Cache
SRAM
9x 32 KB
SRAM Controller
Energy Profiler
x12
UDB...
Programmable
Digital
UDB
8x Serial Comm
(I2C,SPI,UART,LIN,SMC)
CapSense
32x TCPWM
(TIMER,CTR,QD, PWM)
1x Serial Comm
(I2C,SPI, Deep Sleep)
DAC
(12-bit)
SAR ADC
(12-bit)
x1
CTB/CTBm
x12x OpAmp
Programmable
Analog
x1
SARMUX
LP Comparator
Port Interface & Digital System Interconnect (DSI)
High Speed I/O Matrix, Smart I/O, Boundary Scan
I2S Master/Slave
PDM/PCM
Audio
Subsystem
LCD
DataWire/
DMA
2x 16 Ch
Initiator/MMIO
WCO
RTC BREG
Backup
Backup Control
Digital DFT
Test
Analog DFT
System Resources
Power
Reset
Sleep Control
PWRSYS-LP/ULP
REF
Reset Control
TestMode Entry
XRES
DeepSleep
Hibernate
Power Modes
Backup
Active/Sleep
LowePowerActive/Sleep
Buck
POR
LVD
BOD
OVP
Clock
Clock Control
IMO
WDT
1xPLL
ECO
ILO
FLL

CYW9P62S1-43012EVB-01 PSoC 62S1 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28722 Rev. *B 12
Kit Operation
Figure 2-2 shows the block diagram of the CYW9-BASE-01 Pioneer Board (modified for
CYW9P62S1-43012EVB-01).
Figure 2-3 shows the block diagram of the CYW9P62S1-43012CAR-01 Carrier Module.
Figure 2-2. Block Diagram of Pioneer Board
Figure 2-3. Block Diagram of CYW9P62S1-43012CAR-01 Carrier Module
USB
(Micro‐B) KitProg3
(PSoC5LP)
KitProg3Mode
Switch&LED
Carrier
Module
10‐pinSWD/
JTAGHeader
20‐pinETM
Header
Reset
Button
microSDCard
Slot
PSoC6MCU
I/OHeaders
(Arduino)
UserLEDs
(Red,Orange)
I2C/UART_RX/UART_TX
SWD
SWD
JTAG
TRACE
QSPINOR
Flash
SWD
JTAG
P5LP_VDD
VDDIO0
1xUserButton
2xCapSenseButtons,
1x5‐segment
CapSenseSlider
1.8~3.3V
VTARG_REF
UART_RTS
Level
Translator
USBDevice
1.8~3.3V
VTARG_REF
VTARG
Monitoring
CYW9‐BASE‐01ArchitectureBlockDiagram
UART_CTS
Level
Translator BT_UARTTX,RX,CTS,RTS
WL_UARTTX,RX,KP_GPIO_0
VDDIO_WL
P5LP_VDD
VDDIO0
I2CEEPROM
QSPIF‐RAM
VDDIO0
CypressDevice
NoLoad
LoadedDevice
Potentiometer
P5LP_VDD VTARG
VDDA
3.3V,VTARG
KP_VBUS
I/OHeaders
(NonArduino)
VBACKUP
Carrier
Module
Footprint
Crystals
32.768KHz&
17.2032MHz
CINTA,CINTB
CMOD
RFSwitch
UMC
Connector
RF
Matching
Network UMC
Connector
USISiP
Module
SDIO(6I/Os)
BTUART(4I/Os)
Control(3I/Os)
VDDA(1.8V)
PSoC6MCUGPIOs(39I/Os)
XRES
USB
WLUART(2I/Os)
BTI2S(4I/Os)
VDDD(1.8V–3.3V)
VDDIO0(1.8V)
VDDIO1(1.8V)
VDD_NS(1.8V–3.3V)
VBACKUP(1.8V–3.3V)
VDDUSB(3.3V)
VBAT(3.2V–4.2V)
VDDIO_WL(1.8V)

CYW9P62S1-43012EVB-01 PSoC 62S1 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28722 Rev. *B 13
Kit Operation
Figure 2-4 shows the pinout of the PSoC 62S1 Wi-Fi BT Pioneer Board.
Figure 2-4. PSoC 62S1 Wi-Fi BT Pioneer Board Pinout
Table 2-1. PSoC 62S1 Wi-Fi BT Pioneer Board Pinout
Pin Primary On-board
Function
Secondary On-board
Function Connection details
PSoC 6 MCU Pins
XRES Hardware Reset – –
P0[2] Arduino D11 (J3.4) – –
P0[3] Arduino D12 (J3.5) – –
P0[4] Arduino D13 (J3.6) – –
P0[5] Arduino D10 (J3.3) – –
P1[0] I2C SCL Arduino (J3.10) Remove R58 to disconnect from KitProg3.
P1[1] I2C SDA Arduino (J3.9) Remove R59 to disconnect from KitProg3.
P1[4]
User button with
Hibernate wakeup
capability
GPIO on non-Arduino
header (J21.9) –
Arduino Uno R3
LEGEND
PSoC 6 I/Os
WL/BT I/Os
NC
VTARG/IOREF
XRES/RESET
V 3.3/3.3V
V 5.0/5V
GND/GND
GND/GND
VIN/Vin
P1_0/SCL
P1_1/SDA
VREF/AREF
GND/GND
P0_4/D13
P0_3/D12
P0_2/D11
P0_5/D10
NC/D9
NC/D8
P5_7/D7
P5_6/D6
P5_5/D5
P5_4/D4
P5_3/D3
P5_2/D2
P5_1/D1
P5_0/D0
NC
P1_4
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
P10_0/A0
P10_1/A1
P6_4/A2
P6_5/A3
P10_4/A4
P10_5/A5
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
BT_UART_RXD
BT_UART_TXD
BT_UART_CTS
BT_UART_RTS
WL_UART_RX
WL_UART_TX
NC
NC
NC
NC
NC
NC
P11_0
P1_5
BT_I2S_CLK
BT_I2S_WS
BT_I2S_DO
BT_I2S_DI
NC
NC
NC
NC

CYW9P62S1-43012EVB-01 PSoC 62S1 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28722 Rev. *B 14
Kit Operation
P1[5] Orange user LED
(LED8)
GPIO on non-Arduino
header IO7 (J24.2) –
P5[0] UART_RX Arduino D0 (J4.1) Remove R21 to disconnect from KitProg3.
P5[1] UART_TX Arduino D1 (J4.2) Remove R61 to disconnect from KitProg3.
P5[2] UART_RTS Arduino D2 (J4.3) Remove R19 to disconnect from KitProg3.
P5[3] UART_CTS Arduino D3 (J4.4) Remove R18 to disconnect from KitProg3.
P5[4] Arduino D4 (J4.5) – –
P5[5] Arduino D5 (J4.6) – –
P5[6] Arduino D6 (J4.7) – –
P5[7] Arduino D7 (J4.8) – –
P6[4] Arduino A2 (J2.5) PSoC 6 MCU JTAG
TDO/SWD SWO
Remove R4 to disconnect from Arduion A2.
Populate R3 to connect to PSoC 6 MCU
JTAG TDO/SWD SWO.
P6[5] Arduino A3 (J2.7) PSoC 6 MCU JTAG
TDI
Remove R8 to disconnect from Arduino A3.
Populate R7 to connect to PSoC 6 MCU
JTAG TDI.
P6[6] PSoC 6 MCU JTAG
TMS/SWD SWDIO ––
P6[7] PSoC 6 MCU JTAG
TCK/SWD SWCLK ––
P7[0] CapSense Button1
TX
GPIO on non-Arduino
header IO9 (J21.2)
Remove R25 to disconnect from CapSense.
Populate R143 to connect to GPIO on non-
Arduino header.
P7[1] CapSense CINTA – –
P7[2] CapSense CINTB – –
P7[7] CapSense CMOD – –
P9[0] CapSense Slider0
RX
GPIO on non-Arduino
header IO10 (J21.3)
Remove R28 to disconnect from CapSense.
Populate R142 to connect to GPIO on non-
Arduino header.
P9[1] CapSense Slider1
RX
GPIO on non-Arduino
header IO11 (J21.4)
Remove R29 to disconnect from CapSense.
Populate R152 to connect to GPIO on non-
Arduino header.
P9[2] CapSense Slider2
RX
GPIO on non-Arduino
header IO12 (J21.5)
Remove R30 to disconnect from CapSense.
Populate R153 to connect to GPIO on non-
Arduino header.
P9[3] CapSense Slider3
RX
GPIO on non-Arduino
header IO13 (J21.6)
Remove R31 to disconnect from CapSense.
Populate R151 to connect to GPIO on non-
Arduino header.
P9[4] CapSense Slider4
RX
GPIO on non-Arduino
header IO14 (J21.7)
Remove R32 to disconnect from CapSense.
Populate R149 to connect to GPIO on non-
Arduino header.
Table 2-1. PSoC 62S1 Wi-Fi BT Pioneer Board Pinout (continued)
Pin Primary On-board
Function
Secondary On-board
Function Connection details

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Kit Operation
P9[7] CapSense Button0
TX
GPIO on non-Arduino
header IO8 (J21.1)
Remove R24 to disconnect from CapSense.
Populate R144 to connect to GPIO on non-
Arduino header.
P10[0] Arduino A0 (J2.1) – –
P10[1] Arduino A1 (J2.3) – –
P10[4] Arduino A4 (J2.9) – –
P10[5] Arduino A5 (J2.11) – –
P11[0] Red user LED
(LED9)
GPIO on non-Arduino
header (J24.4) –
P11[1] QSPI F-RAM CS – –
P11[2] QSPI Flash CS – –
P11[3:6] QSPI Flash IO[3:0] – –
P11[7] QSPI Flash CLK – –
P12[6] ECO Crystal XIN – –
P12[7] ECO Crystal XOUT – –
CYW43012 Pins
BT_UART_TXD
UART interface with
Host MCU (PSoC 6
MCU)
––
BT_UART_RXD
UART interface with
Host MCU (PSoC 6
MCU)
––
BT_UART_CTS
UART interface with
Host MCU (PSoC 6
MCU)
––
BT_UART_RTS
UART interface with
Host MCU (PSoC 6
MCU)
––
BT_I2S_CLK I2S serial clock – –
BT_I2S_WS I2S serial word select – –
BT_I2S_DO I2S serial data out – –
BT_I2S_DI I2S serial data in – –
WL_UART_RX Wi-Fi debug UART
Rx Pin ––
WL_UART_TX Wi-Fi debug UART
Tx Pin ––
Table 2-1. PSoC 62S1 Wi-Fi BT Pioneer Board Pinout (continued)
Pin Primary On-board
Function
Secondary On-board
Function Connection details

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Kit Operation
The CYW9P62S1-43012EVB-01 PSoC 62S1 Wi-Fi BT Pioneer Kit comes with the PSoC 62S1 Wi-Fi
BT Pioneer Board. Figure 2-5 and Figure 2-6 show the markup of the Pioneer Board.
Figure 2-5. PSoC 62S1 Wi-Fi BT Pioneer Board - Top View
1
2
3
4
5
6
7
8
9101112131415
18
17
16
19
20
21
22
23
24
25
26
25
27
28
29 1426
26
143031

CYW9P62S1-43012EVB-01 PSoC 62S1 Wi-Fi BT Pioneer Kit Guide, Doc. # 002-28722 Rev. *B 17
Kit Operation
Figure 2-6. PSoC 62S1 Wi-Fi BT Pioneer Board - Bottom View
The PSoC 62S1 Wi-Fi BT Pioneer Board has the following components:
1. Power LED (LED1): This Yellow LED indicates the status of power supplied to board.
2. KitProg3 USB connector (J6): The USB cable provided along with the PSoC 62S1 Wi-Fi BT
Pioneer Board connects between this USB connector and the PC to use the KitProg3 onboard
programmer and debugger and to provide power to the board.
3. PSoC 6 MCU VDD power selection jumper (J14): This jumper is used to select the PSoC 6
MCU VDD supply voltage between 1.8 V and 3.3 V. J14 is not loaded for this kit and R82 is
loaded, due to which only 1.8 V operation is supported.
4. KitProg3 programming mode selection button (SW3): This button can be used to switch
between various modes of operation of KitProg3 (CMSIS-DAP BULK, CMSIS-DAP HID or
DAPLink modes). For more details, see the KitProg3 User Guide.
5. PSoC 6 MCU VDD current measurement jumper (J15): An ammeter can be connected to this
jumper to measure the current consumed by the PSoC 6 MCU VDD power domain. Please refer
to Power Supply System on page 33 for details on power domains that are monitored by current
measurement jumpers.
6. PSoC 6 MCU VDDIO2 and CYW43012 VDDIO power selection jumper (J16): This jumper is
used to select the PSoC 6 MCU VDDIO2 and CYW43012 VDDIO supply voltage between 1.8 V
and 3.3 V. This is not loaded by default. This board supports operation of VDDIO at 1.8 V.
7. PSoC 6 MCU VDDIO0 current measurement jumper (J19): An ammeter can be connected to
this jumper to measure the current consumed by the PSoC 6 MCU VDDIO0 power domain. This
is not loaded by default. Before populating the jumper for current measurements, ensure that R97
is removed.
8. External power supply VIN connector (J5): This connector connects an external DC power
supply input to the onboard regulators.

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Kit Operation
9. PSoC 6 MCU user button (SW2): This button can be used to provide an input to the PSoC 6
MCU. Note that by default it connects the PSoC 6 MCU pin to ground when pressed, so you need
to configure the PSoC 6 MCU pin as a digital input with resistive pull-up for detecting the button
press. It also provides a wake-up source from low-power modes of the device.
10. Arduino-compatible power header (J1): This header powers the Arduino shields. It also has a
provision to power the kit though the VIN input.
11. PSoC 6 MCU reset button (SW1): This button is used to reset the PSoC 6 MCU. It connects the
PSoC 6 MCU reset (XRES) pin to ground.
12. PSoC 6 MCU debug and trace header (J12): This header can be connected to an Embedded
Trace Macrocell (ETM)-compatible programmer/debugger. This is not loaded by default.
13. PSoC 6 MCU program and debug header (J11): This 10-pin header allows you to program and
debug the PSoC 6 MCU using an external programmer such as MiniProg4.
14. Arduino Uno R3-compatible I/O headers (J2, J3, and J4): These I/O headers bring out pins
from the PSoC 6 MCU to interface with Arduino shields. Some of these pins are multiplexed with
onboard peripherals and are not connected to the PSoC 6 MCU by default. For a detailed infor-
mation on how to rework the kit to access these pins, see Table 2-1 on page 13.
15. CapSense slider (SLIDER) and buttons (BTN0 and BTN1): The CapSense touch-sensing
slider and two buttons, all of which are capable of both self-capacitance (CSD) and mutual-
capacitance (CSX) operation, allow you to evaluate Cypress’ fourth-generation CapSense tech-
nology. The slider and buttons have a 1-mm acrylic overlay for smooth touch sensing.
16. PSoC 6 MCU VDDIO2 current measurement jumper (J18): An ammeter can be connected to
this jumper to measure the current consumed by the PSoC 6 MCU VDDIO2 power domain. This
jumper is not loaded by default on the board. Before populating the jumper for current measure-
ments, ensure that R94 is removed.
17. CYW43012 VDDIO current measurement jumper(J17): An ammeter can be connected to this
jumper to measure the current consumed by the CYW43012 VDDIO power domain.
18. Cypress serial NOR flash memory (S25FS512S, U3): A S25FS512S NOR flash of 512-Mbit
capacity is connected to the Quad SPI interface of the PSoC 6 MCU. The NOR device can be
used for both data and code memory with execute-in-place (XIP) support and encryption.
19. Cypress PSoC 6 (1M) with CYW43012 USI SiP Carrier Module (CYW9P62S1-43012CAR-01,
MOD1): This kit is designed to highlight the features of the PSoC 6 MCU on the CYW9P62S1-
43012CAR-01. For details, see CYW9P62S1-43012CAR-01 (MOD1) on page 26. This kit is
designed to highlight the features of the PSoC 6 MCU. For details on PSoC 6 MCU pin mapping,
refer to Table 2-1 on page 13.
20. USI WM-BAC-CYW-50 SiP module: WM-BAC-CYW-50 is an SiP module that includes the
PSoC 6 MCU, CY8C6247FDI-D52 and CYW43012 (Wi-Fi + Bluetooth combo device). The mod-
ule provides 2.4 GHz and 5 GHz dual-band WLAN and Bluetooth functionality and complies with
IEEE 802.11a/b/g/n and Bluetooth Version 5.0.
21. Wi-Fi/BT antenna: This is an onboard antenna connected to the Wi-Fi and Bluetooth module.

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Kit Operation
22. Cypress Quad SPI Ferroelectric-RAM (CY15V104QSN, U4): The CY15V104QSN is a 4-Mbit
nonvolatile memory employing an advanced ferroelectric process. F-RAM is nonvolatile and per-
forms reads and writes similar to a RAM. It provides reliable data retention for 151 years and is
connected to the Quad SPI interface of the PSoC 6 MCU.
23. CYW43012 VBAT current measurement jumper (J8): An ammeter can be connected to this
jumper to measure the current consumed by the CYW43012 VBAT power domain.
24. CYW43012 VBAT power selection jumper (J9): This board supports VBAT voltages of 3.3 V
and 3.6 V. VBAT is 3.3 V when the jumper is not inserted and 3.6 V when the jumper is inserted.
25. PSoC 6 MCU user LEDs (LED8 and LED9): These two user LEDs can operate at the entire
operating voltage range of the PSoC 6 MCU. The LEDs are active LOW, so the pins must be
driven to ground to turn ON the LEDs.
26. PSoC 6 I/O header (J21, J22, J24): These headers provide connectivity to PSoC 6 MCU GPIOs
that are not connected to the Arduino compatible headers. Some of these I/Os are also
connected to on-board peripherals see Table 2-1 on page 13 for pin mapping.
27. Wi-Fi/BT GPIO header (J23): This header brings out a few IOs of the CYW43012 for general
purpose applications.
28. PSoC 6 USB device connector (J7): The USB cable provided with the PSoC 62S1 Wi-Fi BT
Pioneer Kit can also be connected between this USB connector and the PC to use the PSoC 6
MCU USB device applications.
29. Optional USB Host power supply header (J10): This header provides an option to supply
external power to the PSoC 6 USB when used as a USB Host. This is not loaded by default.
30. KitProg3 status LED (LED2): This Yellow LED indicates the status of KitProg3. For details on
the KitProg3 status, see the KitProg3 User Guide.
31. KitProg3 (PSoC 5LP) programmer and debugger (CY8C5868LTI-LP039, U2): The PSoC 5LP
device (CY8C5868LTI-LP039) serving as KitProg3, is a multi-functional system, which includes
a SWD programmer, debugger, USB-I2C bridge and USB-UART bridge. For more details, see
the KitProg3 User Guide.
See Hardware Functional Description on page 26 for details on various hardware blocks.

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Kit Operation
2.2 KitProg3: On-Board Programmer/Debugger
The PSoC 62S1 Wi-Fi BT Pioneer Board can be programmed and debugged using the onboard
KitProg3. KitProg3 is an onboard programmer/debugger with additional USB-UART and USB-I2C
functionality. A Cypress PSoC 5LP device is used to implement the KitProg3. For more details on the
KitProg3 functionality, see the KitProg3 User Guide.
2.2.1 Programming and Debugging using ModusToolbox
This section presents a quick overview of programming and debugging using ModusToolbox. For
detailed instructions, see Help > ModusToolbox IDE Documentation > User Guide.
1. Connect the board to the PC using the USB cable, as shown in Figure 2-7. It enumerates as a
USB Composite Device. KitProg3 can operate either in CMSIS-DAP Bulk mode (default),
CMSIS-DAP HID mode or DAPLink mode (DAPLink mode is required for programing using Mbed
CLI). KitProg3 also supports CMSIS-DAP Bulk with two UARTs. Programming is faster with the
Bulk mode. The status LED (Yellow) is always ON in Bulk mode, ramping at a 1 Hz rate in HID
mode, and ramping at a 2 Hz rate in DAPLink mode. Press and release the Mode select button
(SW3) to switch between these modes. If you do not see the desired LED status, see the
KitProg3 User Guide for details on the KitProg3 status and troubleshooting instructions.
Figure 2-7. Connect USB Cable to USB Connector on the Board
2. In the ModusToolbox IDE, import the desired code example (application) into a new workspace.
a. Click on New Application from Quick Panel.
Figure 2-8. Create New Application