Digital Equipment DTR01 User manual

DTR01/DR01
Channel Interface Subsystem
Technical Manual
digital equipment corporation •marlboro, massachusetts

EK-DTR01-TM-001
DTR01/DR01
Channel Interface Subsystem
Technical Manual
digital equipment corporation •mariboro, massacliusetts

1st Edition, October 1978
Copyright ®1978 by Digital Equipment Corporation
The material in this manual is for informational purposes and is
subject to change without notice.
Digital Equipment Corporation assumes no responsibility for any
errors which may appear in this manual.
Printed in U.S.A.
This document was set on DIGITAL'S DECset-8000 computerized
typesetting system.
The following are trademarks of Digital Equipment Corporation,
Maynard, Massachusetts:
DIGITAL DECsystem-10 MASSBUS
DEC DECSYSTEM-20 OMNIBUS
PDP DIBOL OS/8
DECUS EDUSYSTEM RSTS
UNIBUS VAX RSX
VMS IAS
11/78-38

CONTENTS
Page
CHAPTER 1INTRODUCTION
1.1
1.2
1.3
1.4
1.4.1
1.4.2
1.4.3
1.4.4
CHAPTER 2
2.1
2.2
2.3
CHAPTER 3
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
3.10
CHAPTER 4
4.1
4.1.1
4.1.2
4.2
4.2.1
PURPOSEAND USE 1-1
GENERAL DESCRIPTION 1-2
FEATURES AND CAPABILITIES 1-2
SPECIFICATIONS 1-3
Mechanical Specifications 1-3
Electrical Specifications 1-4
Operational Specifications 1-5
Environmental Operating Specifications 1-5
SITE PREPARATION AND PLANNING
SITE CONSIDERATIONS 2-1
USER INTERFACE CABLING 2-1
SYSTEM CONFIGURATION GUIDELINES 2-4
INSTALLATION
DTROl INSTALLATION PROCEDURES 3-1
RH2p CLOCK DESKEW PROCEDURE 3-1
RH20/CHANNEL CONTROL LOGIC DIAGNOSTICS 3-1
USER INTERFACE CABLING 3-2
GROUNDING 3-2
POWER UP UNIT 3-2
DEVICE NUMBER SELECTION 3-2
MAXIMUM TRANSFER RATE ADJUSTMENT 3-2
M5903 ENABLE SWITCHES 3-3
CHECKOUTAND ACCEPTANCE 3-3
OPERATION/PROGRAMMING
DTROl OPERATION .4-1
Single-Word Transfer -Write .4-1
Single-Word Transfer -Read .4-1
PROGRAMMING .4-2
Communication Between the DTROl and the KLIO-B, C, D
or EProcessor .4-2
m

CONTENTS (Cont)
Page
4.2.1.1 Loading DROl/DTROl External Registers 4-2
4.2.1.2 DATAO .4-2
4.2.1.3 DATAI .4-3
4.2.2 Programmable Registers in DROl-CL Channel Interface Unit .4-6
4.2.2.1 Control and Status 1Register (RHCSl) 4-6
4.2.2.2 Interface Status Register(RHlS)- REG 14-6
4.2.2.3 Input Buffer Register (RHIB)- REG 2.4-8
4.2.2.4 Attention Summary Register (RHAS)- REG4.4-8
4.2.2.5 User Function and Status Register (RHFS)- REG 54-10
4.2.2.6 Drive Type Roister (RHDT)- REG 64-10
4.2.2.7 Output Buffer Register (RHB)- REG 7..4-10
4.2.3 Link Operation 4-10
4.2.3.1 DR01-C/RH20 Registers Link Configuration 4-12
4.2.3.2 DROl-C/DRU-B Registers Link Configuration ...4-15
CHAPTER 5TECHNICAL DESCRIPTION
5.1 SYSTEM DESCRIPTION 5-1
5.2 DATA TRANSFERS 5-1
5.2.1 REGO (RHCSl) Control and Status Register Signal Flow 5-1
5.2.2 REG 1(RHIS) Interface Status Register Signal Flow 5-5
5.2.3 REG 2(RHIB) Input Buffer Register Signal Flow 5-9
5.2.4 REG 4(RHAS) Attention Summary Register Signal Flow 5-9
5.2.5 REG 5(RHFS) User Function and Status Register Signal Flow 5-9
5.2.6 REG 6(RHDT) Drive Type Register Signal Flow 5-13
5.2.7 REG 7(RHOB) Output Buffer Register Signal Flow 5-13
5.3 LINK OPERATION 5-14
CHAPTER 6PREVENTIVE MAINTENANCE
6.1 GENERAL 6-1
6.2 HIGH PERFORMANCE CHECKOUT 6-2
CHAPTER 7SERVICE
7.1 GENERAL 7-1
7.2 CORRECTIVE MAINTENANCE 7-1
APPENDIX ADTROl INSTALLATION CONSIDERATION
A.l POST INSTALLATION CONSIDERATIONS A-1
IV

CONTENTS (Cont)
Page
APPENDIX BLD»^KING PROCEDURE
B.l
B.2
APPENDIX C
C.l
C.1.1
c.l.
2
C.1.2.1
C.l.2.2
DROl/DRll-B LINKING PROCEDURE B-I
DROl/DROl LINKING PROCEDURE B-2
USER E^TERFACE SPEaFICATION
USER INPUT/OUTPUT SIGNALS C-1
Signals List C-1
Timing Considerations C-1
Read Operation C-I
Write Operation C-5
FIGURES
Figure No. Title Page
1-1
2-1
2-2
2-3
3-1
3-2
4-1
4-2
4-3
4-4
4-5
4-6
4-7
4-8
4-9
4-10
4-11
4-12
4-13
5-1
5-2
Possible DTROl Subsystem Configurations 1-1
DROl User Interface Connector Slot View Shown from Backplane 2-1
Module M9760-YA 2-5
DTROl Maximum and Minimum Configuration 2-6
Massbus Cabling 3-1
25 MHz KLIO-B, C, Dor ESystem SCLK Setting 3-3
Communications Between DTROl and KLlO-B, C, Dor EProcessor 4-4
DATAO External Register. 4-5
DATAI Bit Format 4-5
RHCSl(REGO)BitMap 4-7
RHIS (REG 1) Bit Map 4-7
RHIB(REG2)BitMap 4-9
RHAS(REG4)BitMap 4-9
RHFS (REG 5) Bit Map 4-11
RHOB (REG 7) Bit Map 4-11
RHIS(REGl)LinkA 4-13
RHFS (REG 5) Link A4-13
RHIS (REG 1) Link B4-16
RHFS (REG 5) Link B4-16
ATypical DTROl System 5-2
Communication Between DTROl and KLIO-B, C, Dor EProcessor 5-3

FIGURES
Figure No. Title Page
5-3 DTROl Subsystem Data How Block Diagram 5-4
5-4 REG O(RHCSl) Control and Status Register Circuit Block Diagram 5-5
5-5 REG 1(RHIS) Interface Status Register Circuit Block Diagram 5-6
5-6 DTROl Timing 5-7
5-7 Data Format 5-10
5-8 REG 2(RHIB) Input Buffer Register Circuit Block Diagram 5-10
5-9 REG 4(RHAS) Attention Summary-Register Qrcuit Block Diagram 5-1
1
5-10 REG 5(RHFS) User Function and Status Register Circuit Block Diagram 5-12
5-11 REG 6(RHDT) Drive Type Register Circuit Block Diagram 5-13
5-12 REG 7(RHOB) Output Buffer Register Circuit Block Diagram 5-13
5-13 DTROl Link Connectors 5-14
5-14 DTROl Back-to-Back Signal Connections 5-15
7-1 M8432 Buffer/Test Module Block Diagram 7-1
C-1 Read and Write Timing Diagrams C-4
TABLES
Table No. Title Page
1-1 Electrical Specifications 1-4
2-1 Interface Signal Pin Assignments 2-2
4-1 ATA Bit Status 4-10
5-1 DROl to DROl Signal Connections 5-16
5-2 DRll-Bto DROl Signal Connections 5-17
6-1 Left Half Switches -Standard Definition 6-1
6-2 Right Half Switches -Standard Definition 6-2
6-3 Command Data Commands 6-3
C-1 User Input Signals C-2
C-2 User Output Signals C-3
VI

CHAPTER 1
INTRODUCTION
1.1 PURPOSE AND USE
The DTROl is achannel port system which provides ageneral-purpose access to the KLIO-B, C, Dor
Emain memory unit via auser high-speed port interface.
The DTROl subsystem enables auser interface/device to perform high-speed block transfers to or
from the system's main memory unit via the mass storage bus and appropriate RH20 controller.
Although the maximum subsystem rate within ablock is one megabyte, the transfer rate is primarily
determined by the user interface. Therefore, an adjustment for limiting the maximum transfer rate of
the DROl has been provided so that it will not exceed the bandwidth of the system.
The DROl-C and DTROl subsystems can also be used to establish ahigh-speed interprocessor link
between aKLlO-B, C, Dor Eand another KLlO-B, C, Dor E, aPDP-1 1,or aPDP-1 1/70. (See Figure
1-1.)
INTERFACE
1
INTERFACE
2
INTERFACE
3
INTERFACE
4
8INTERFACES
MAXIMUM
USER DEVICE
DRUB UNIBUS
PDP-11
DR70A 11/70
DTROl KL10
Figure 1-1 Possible DTROl Subsystem Configurations
1-1

12 GENERAL DESCRIPTION
Communication and control between the DTROl subsystem and the host processor is implemented
with seven programmable registers located in each DROl-CL. Communication and control of the user
interface/device is implemented via 8status bits, 8user function bits, 4attention bits, and 1user error
bit along with 18 separate data in and out lines plus optional parity.
13 FEATURES AND CAPABILITIES
The DTROl provides the following features.
•Performs high-speed block transfers (block can be any size to the maximum amount of core in
the system) between main memory and user devices.
•Provides ahigh-speed channel interface with access to KLIO-B, C, Dor Emain memory unit.
•Establishes high-speed interprocessor links between separate computer systems as follows.
KLlO-B, C, Dor Eto KLlO-B, C, Dor E
KLlO-B, C, Dor Eto Unibus PDP-11 system
KLlO-B, C, Dor Eto PDP-1 1/70 system
•Currently provides an interface from any user device interfaced through adirect memory ac-
cess device interface (DRll-B) to aPDP-11 Unibus.
•Provides an interface expanded beyond aPDP-11 Unibus direct memory access interface
(DRll-B) with the following additional features.
Enables data input and output as either word or byte (switch selectable). Byte data is in the
low order bits on 8lines.
Provides optional parity checking for data transferred with the user device.
Provides for additional user-defined status and function bits.
•Amaximum of 8channel interfaces are available to user devices or computers.*
The user interface connects to dedicated slots in the DROl -CL interface unit. The user device currently
interfaced through the DRll-B to the Unibus can be connected to the DTROl subsystem with a
minimum of changes, since the physical signal pins out of these connector slots are almost identical.
In addition to the standard interface connector, asecond expanded interface connector slot is provided
in the DROl-CL unit to increase the flexibility of the user interface.
*For link configurations, DRll-Bs or DR70As are not supplied. They are mounted externally in aPDP-11 cabinet or
mounting box, not a part of the DTROl system.
1-2

1.4 SPEaFICATIONS
1.4.1 Mechanical Specifications
There are three configurations of DTROl Channel Interface Subsystems and two configurations of
DROl Channel Interfaces available. They are as follows.
DTROl-AA/AB
Description
Prerequisitef
Dimensions
Weight
DTROl-CA/CB
Description
Prerequisitef
Dimensions
H9502 cabinet containing power control, DROl mounting box
and DROl-CL logic plus RH20 option set. Contains space for
two additional DROl-CL options and cabinet space for two ad-
ditional DROl mounting boxes (either DTROl-CC/CD or
DROl-CA/CB).*
KLIO-B, C, Dor E
152 cm X76 cm X66 cm
(60 in X30 in X26 in)
204 kg (450 lb)
H950 cabinet containing power control, DROl mounting box,
and DROl-CL logic plus RH20 option set. Contains space for
two additional DROl-CL options and cabinet space for two ad-
ditional mounting boxes (either DTROl-CC/CD or DROl-
CA/CB).*
KLlO-B, C, Dor E
175 cm X48 cm X68 cm
(69 in X19 in X27 in)
Weight 159 kg (350 lb)
DTROl-CC/CD (Second System Box)
Description
Prerequisitesf
Dimensions
Weight
Mounting box containing DROl-CL logic plus RH20 option
set. Only one DTROl-CC/CD may be added to aDTROl
CA/CB, AA/AB. Contains space for two additional DROl CL
options.
KLIO-B, C, Dor Eand DTROl-CA/CB or AA/AB (space per-
mitting)
27 cm X48 cm X69 cm
(11 in X19 in X27 in)
50 kg (110 lb)
Only one DTROl-CC/CD mounting box may be added to aDTROl-CA/CB, AA/AB cabinet.
fSystem prerequisite requires the KLIO-B, C, Dor ECPU to be at revision level 10 or greater.
1-3