Elan eSL Series User manual

eSL/eSLS Series
(+ eSLZ000)
16 Bits DSP
16 Bits DSP16 Bits DSP
16 Bits DSP
Sound Processor
Sound ProcessorSound Processor
Sound Processor
USER’S MANUAL
ELAN
MICROELECTRONICS CORP.
December 2009
Doc. Version
1.
7

Trademark Acknowledgments:
IBM is a registered trademark and PS/2 is a trademark of IBM
Windows is a trademark of Microsoft Corporation
E AN and E AN logo are trademarks of E AN Microelectronics Corporation
Copyright © 2006 ~ 2009 by E AN Microelectronics Corporation
All Rights Reserved
Printed in Taiwan
The contents of this User’s Manual (publication) are subject to change without further notice. E AN
Microelectronics assumes no responsibility concerning the accuracy, adequacy, or completeness of this
publication. E AN Microelectronics makes no commitment to update, or to keep current the information and
material contained in this publication. Such information and material may change to conform to each confirmed
order.
In no event shall E AN Microelectronics be made responsible for any claims attributed to errors, omissions, or
other inaccuracies in the information or material contained in this publication. E AN Microelectronics shall not
be liable for direct, indirect, special incidental, or consequential damages arising from the use of such information
or material.
The software (if any) described in this publication is furnished under a license or nondisclosure agreement, and
may be used or copied only in accordance with the terms of such agreement.
E AN Microelectronics products are not intended for use in life support appliances, devices, or systems. Use of
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NO PART OF THIS PUB ICATION MAY BE REPRODUCED OR TRANSMITTED IN ANY FORM OR BY
ANY MEANS WITHOUT THE EXPRESSED WRITTEN PERMISSION OF E AN MICROE ECTRONICS.
ELAN MICROELECTRONICS CORPORATION
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Tel: [phone]
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I
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Contents
eSL/eSLS Series (+ eSLZ000) User’s Manual Contents •
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Contents
Contents
ContentsContents
Contents iii
iiiiii
iii
Chapter 1
Chapter 1Chapter 1
Chapter 1 1
11
1
Introduction
IntroductionIntroduction
Introduction 1
11
1
1.1 Introduction to eS /eS S Series and eS Z000 ICs...................................................1
1.2 Features .....................................................................................................................2
1.3 Parts ist and Properties ............................................................................................3
1.3.1 eS Z000 and eS ICs Parts ist and Properties.............................................3
1.3.2 eS S ICs Parts ist and Properties ..................................................................4
1.3.3 Properties Comparison between eS Z000, eS , and eS S ICs .....................5
1.4 Algorithm Selection Table .........................................................................................6
1.4.1 eS Z000 and eS ICs Parts ist and Properties.............................................6
1.4.2 eS S ICs Parts ist and Properties ..................................................................8
1.5 Typical Applications..................................................................................................9
1.6 Pin Descriptions ......................................................................................................10
1.6.1 Power Supply................................................................................................10
1.6.2 System Control.............................................................................................. 11
1.6.3 DAC Output.................................................................................................. 11
1.6.4 Two Stage Amplifier & Touch Pad Positioning (Supports eS and eS Z000
ICs only)................................................................................................................... 11
1.6.5 I/O Port..........................................................................................................12
1.6.6 Data ROM Interface (eS Z000 only)...........................................................14
1.6.7 ICE Interface (eS Z000 only) ......................................................................14
Chapter 2
Chapter 2Chapter 2
Chapter 2 17
1717
17
Architecture
ArchitectureArchitecture
Architecture 17
1717
17
2.1 eS System Block Diagram ....................................................................................17
2.2 Program ROM and Data RAM Description............................................................18
2.2.1 Program ROM/RAM.......................................................................................18
2.2.2 Data RAM and Bank Select Register..............................................................19
2.3 Addressing Modes....................................................................................................20
2.3.1 Register Direct Addressing ...........................................................................20
2.3.2 Register Indirect Addressing.........................................................................20

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2.3.3 Indirect Addressing with Post-Decrement ....................................................21
2.3.4 Indirect Addressing with Post-Increment......................................................21
2.3.5 I/O Direct Addressing ...................................................................................21
2.3.6 RAM (Data) Direct Addressing ....................................................................22
2.3.7 Immediate Addressing ..................................................................................23
2.3.8 Relative Program Addressing .......................................................................23
2.3.9 Data Indirect Addressing with Displacement ...............................................24
2.4 Register Architecture................................................................................................25
2.4.1 General Purpose Registers ............................................................................26
2.4.2 Program Counter (PC) ..................................................................................26
2.4.3 Stack Pointer (SP).........................................................................................26
2.4.4 Repeat and oop Registers ...........................................................................26
2.4.5 Status Register (SR) ......................................................................................27
2.5 Instruction Set ..........................................................................................................29
2.5.1 ogic and Mathematic Instructions ..............................................................30
2.5.2 Conditional Branch Instruction.....................................................................31
2.5.3 Shift and Rotation Instructions .....................................................................32
2.5.4 Data Transfer Instruction ..............................................................................33
2.5.5 Bit Operation Instruction ..............................................................................34
2.5.6 Control Instructions ......................................................................................35
2.5.7 DSP Instruction .............................................................................................36
2.6 Power Supply Circuit ...............................................................................................39
2.6.1 Power Supply Attributes and Features..........................................................39
2.7 Oscillator System .....................................................................................................40
2.7.1 Block Diagram ..............................................................................................40
2.7.2 Operation.......................................................................................................41
2.7.3 CPU Control Registers..................................................................................44
2.8 Reset System ...........................................................................................................44
2.8.1 Block Diagram ..............................................................................................45
2.8.2 Operation.......................................................................................................46
2.8.3 Power-On Reset (POR).................................................................................47
2.8.4 Brown-Out Reset (BOR)...............................................................................48
2.9 System Mode Operation...........................................................................................49
2.9.1 Block Diagram ..............................................................................................49
2.9.2 Operation.......................................................................................................49
2.9.4 Registers........................................................................................................50
2.9.5 System Mode Operation Examples...............................................................51
2.10 Exception-Handling .................................................................................................51
2.10.1 Reset..............................................................................................................51
2.10.2 Trap Instruction (TRAP)...............................................................................51
2.10.3 Interrupts .......................................................................................................51
2.11 External Interrupt ....................................................................................................57
2.11.1 External Interrupt Control Register ..............................................................57

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2.11.2 Application Examples...................................................................................58
2.12 Stack Pointer imit (SP IM)..................................................................................59
2.12.1 General Description......................................................................................59
2.12.2 Block Diagram .............................................................................................60
2.12.3 Register Description.....................................................................................61
2.12.4 Operation Description ..................................................................................61
Chapter 3
Chapter 3Chapter 3
Chapter 3 63
6363
63
Periphera Contro
Periphera ControPeriphera Contro
Periphera Contro 63
6363
63
3.1 Watchdog Timer (WDT) .........................................................................................63
3.1.1 Block Diagram ..............................................................................................64
3.1.2 Watchdog Control Register...........................................................................64
3.1.3 Examples ........................................................................................................65
3.2 Real Time Clock (RTC) ..........................................................................................66
3.2.1 Real Time Clock and Interrupt Block Diagram ............................................66
3.2.2 Real Time Clock Control Register................................................................67
3.2.3 RTC Timing....................................................................................................68
3.2.4 Examples.......................................................................................................70
3.3 Timer .......................................................................................................................71
3.3.1 Timer 0/1.......................................................................................................71
3.3.2 Timer 2/3.......................................................................................................74
3.4 Pulse Width Modulation (PWM) .............................................................................84
3.4.1 Features.........................................................................................................84
3.4.2 Block Diagram ..............................................................................................85
3.4.3 Operation.......................................................................................................85
3.4.4 Registers........................................................................................................87
3.4.5 Examples.......................................................................................................89
3.5 Digital to Analog Converter (DAC)........................................................................90
3.5.1 Features.........................................................................................................90
3.5.2 Operation.......................................................................................................90
3.5.3 Registers........................................................................................................90
3.5.4 Application Example ....................................................................................91
3.5.5 Examples.......................................................................................................91
3.6 Analog to Digital Converter (eS and eS Z000 only)............................................92
3.6.1 Features.........................................................................................................93
3.6.2 Registers........................................................................................................93
3.6.3 Operation.......................................................................................................95
3.6.4 Examples.......................................................................................................97
3.7 Data ROM ..............................................................................................................100
3.7.1 Features.......................................................................................................100

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3.7.2 Block Diagram ............................................................................................100
3.7.3 Register Description....................................................................................101
3.7.4 Examples.....................................................................................................102
3.8 Serial Peripheral Interface (eS and eS Z000 only) .............................................104
3.8.1 Features.......................................................................................................104
3.8.2 Block Diagram ............................................................................................106
3.8.3 Pin Description............................................................................................106
3.8.4 SPI Register ................................................................................................109
3.8.5 SPI Transfer Format.................................................................................... 111
3.8.6 SPI Timing Diagrams.................................................................................. 112
3.8.7 Master Mode Operation .............................................................................. 115
3.8.8 Slave Mode Operation ................................................................................ 116
3.8.9 SPI Master Initial Flow Chart ..................................................................... 117
3.8.10 SPI Boot Flash (Interface) and SPI Data Flash (Interface) ...................... 117
3.8.11 Examples..................................................................................................... 118
3.9 Microphone Front End (eS and eS Z000 only)................................................... 119
3.9.1 Registers...................................................................................................... 119
3.9.2 Examples .....................................................................................................122
3.10 I/O Pad Architecture .............................................................................................123
3.10.1 CMOS Pad Cofiguration Diagrams............................................................124
3.11 General Purpose Input Output ..............................................................................128
3.11.1 Features.......................................................................................................128
3.11.2 I/O Port Register Descriptions ...................................................................129
3.11.3 Input Mode with Pull Up Resistor Delay Time ..........................................132
3.11.4 I/O Port Application Examples...................................................................132
3.12 Voltage Regulator 5V / 3V....................................................................................134
Chapter 4
Chapter 4Chapter 4
Chapter 4 137
137137
137
E
EE
E ectrica Characteristics
ectrica Characteristicsectrica Characteristics
ectrica Characteristics 137
137137
137
4.1 CPU Voltage – Frequency Graph ..........................................................................137
4.2 Absolute Maximum Ratings..................................................................................138
4.2.1 eS and eS S..............................................................................................138
4.2.2 eS Z000......................................................................................................138
4.3 DC Characteristics ................................................................................................139
4.3.1 For eS , eS S and eS Z000 ......................................................................139
4.3.2 For eS and eS S Only ..............................................................................140
4.3.3 For eS Z000 Only ......................................................................................141
Chapter 5
Chapter 5Chapter 5
Chapter 5 143
143143
143

Contents
eSL/eSLS Series (+ eSLZ000) User’s Manual Contents •
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App ication Circuits
App ication CircuitsApp ication Circuits
App ication Circuits 143
143143
143
5.1 eS Application Circuit ..........................................................................................143
5.2 eS S Application Circuit........................................................................................144
5.3 eS Z000 Application Circuit..................................................................................145
Chapter 6
Chapter 6Chapter 6
Chapter 6 147
147147
147
Instruction Set Summary
Instruction Set SummaryInstruction Set Summary
Instruction Set Summary 147
147147
147
6.1 Symbol Summary..................................................................................................147
6.1.1 General Symbol ..........................................................................................147
6.1.2 Operand.......................................................................................................147
6.1.3 Operator ......................................................................................................148
6.1.4 Flag status (SR)...........................................................................................148
6.1.4 Operation Explainations..............................................................................148
6.2 Instruction Set Tables ............................................................................................149
6.2.1 Data Transfer Instructions...........................................................................149
6.2.2 Arithmetic Operation Instructions ..............................................................150
6.2.3 ogic Operation Instructions ......................................................................152
6.2.4 Bit Operation Instructions*.........................................................................153
6.2.5 Program Jump Instructions .........................................................................154
Appendix
AppendixAppendix
Appendix 157
157157
157
eSL and eSLZ000 Specia Function Registers
eSL and eSLZ000 Specia Function RegisterseSL and eSLZ000 Specia Function Registers
eSL and eSLZ000 Specia Function Registers 157
157157
157
A.1 ist of eS & eS Z000 Special Function Registers..............................................157
A.2 ist of eS S Special Function Registers...............................................................159
Appendix
AppendixAppendix
Appendix 161
161161
161
F ash Memory Compatibi ity List
F ash Memory Compatibi ity ListF ash Memory Compatibi ity List
F ash Memory Compatibi ity List 161
161161
161
A.1 ist of eS & eS Z000 Flash Memory Compatibility ..........................................161

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Contents
eSL/eSLS Series (+ eSLZ000) User’s Manual Contents •
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User’s Manual Revision History
Doc. Version
Revision Description Date
1.0
Official Version Release with following changes
• Revised ADC iming Diagram in Section 3.6.3
• Revised MOV description in Section 4.5.2
• Add clock system description in Section 2.5
• Add interrupt description in Section 2.8.3
• Revised SPI description in Section 3.4
• Revised Opening emperature Range in Section 4.1.2
2006/12/11
1.1
Revised Appliation circuits in Section 4.2.2
Add comment in Section 4.3.2
Modified OSCO in Section 2.7.2.1
Add comment in Selection table in Section 1.3.1
Modified Boot SPI in Section 1.3.3
Add R C timing information in Section 3.2
Modified interrupt vector address width in Section 2.10.3
Modified description and figure in Section 2.12
Modified layout hierarchy in Section 4
Modified the Sampleing Rate Range in Section 1.3.1
Added the IOVDD, IOVSS, AVDD, AVSS in Section 1.5.1
2007/03/26
1.2
Modified long MOV instruction description in Section 6.2.1
Modified DROM code example in Section 3.7.4
Added eSL032
Modified SPI transmitter/receiver only in Section 3.8.7 and 3.8.8
Modified the emperature Range in Section 4.2
Modified the Power supply voltage in Section 4.3.1
Modified the example in Section 3.6.4 and 3.5.5
Modified the IP attributes and definiations in Section 3
Added algorithm support such as beat tracking, sound location,
speech control, pitch control in Section 1.2 and 1.3
Added the note about power optimization in Section 2.9.2 and 3.4.4
Added ADC input resistance and capacitance in Section 3.6
2007/08/10
1.3
Added package information in Section 1.3
Modified PWMP and PWMD initial value in Section 3.4.4
Modified Application Circuit in Section 5
Modified Figure number in Section 3.10
2007/11/10
1.4
SPI serial clock consideration in Section 3.8.3.1 and 3.8.8
Modified PWM current in Section 4.3
Modified BSR description in Section 2.2.2
Modified data direct address mode in Section 2.3.6
Modified mov instruction in Section 2.5.4.1
Added PortC DC characteristic in Section 4.1.3
2008/01/10
1.5
Modify LSA, LEA initlal value in Appendix
Modify Application Circuit diagram in Section 5
Added EXIN wake-up comment in Section 2.11
Added FSR change comment in Section2.7.2
Add Regulator comment in Section 3.12
Added flash memory support table in Appendix
Modified Algorithm support in Section 1.2 and 1.3
2008/10/15

Contents
x •
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Modified Regulator comment in Section 3.12 and Section 5
1.6
Modify WD example in Section 3.1.3
Modify Definition of CN 2 and CN 3 in Appendix A
Added Algorithm-related section in Section 1.4
2009/04/15
1.7
Modify DROM example code in Section 3.7.4
Modify PC[7:0] pull-up resister in Section 4.3.1
Added ADC convertion time in Section 3.6.2
Added ADC enable timing in Section 3.6.2
2009/12/01

Contents
eSL/eSLS Series (+ eSLZ000) User’s Manual Contents •
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Chapter 1
eSL/eSLS Series (+ eSLZ000) User’s Manual Introduction •
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• 1
Chapter 1
Introduction
1.1 Introduction to eSL/eSLS Series and eSLZ000 ICs
The eS /eS S Series and eS Z000 ICs (or “eS Series” for short) differ from
each other in the following manner:
 eS ICs fully comply with all features of the eS Series.
 eS S ICs is the simplified version of the eS ICs. Hence, these chips
have simpler performance than the eS ICs.
 eS Z000 IC is the eS Z000 ICE kernel chip used to emulate the eS /eS S
Series.
E AN eS Series ICs are 16-bit DSP Sound Processor with multi-channel
speech and instrument playback based on Elan 16-bit DSP platform. The series
has a powerful 16-bit DSP architecture that handles most of the speech/melody
functions. Speech and melody can be played back simultaneously with the
speech synthesis implemented by software. A wide range of compression bit
rates and various volume levels are supported. eS Series chips are equipped
with real instrument waveform which enable the chips to obtain good quality
melody. E AN eS peripherals include RTC, Timer, WDT, DAC, PWM, etc.
The eS Series ICs offer FAST, S EEP, GREEN, and S OW modes of
operation. The use of GREEN and S OW mode further reduces power
consumption. Moreover, GREEN mode also provides RTC function for
wake-up propose.
The chips are designed as a cost effective processors offering optimized
performance and are ideal for such applications as high compression rate digital
voice signal, high quality instrument melody, voice recognition, digital sound
effect, etc. The eS Series constructive features motivate exploration into wide
variety of new creative ideas for more innovative products.
E AN eS Series perform extremely well in speech application based on
powerful DSP architecture and are endowed with good algorithm for audio
compression.

Chapter 1
2 •
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• Introduction eSL/eSLS Series (+ eSLZ000) User’s Manual
1.2 Features
 MCU
• 16-bit RISC CPU architecture
• CPU clock: 20MHz @ 3.3V (eS and eS S only)
• CPU clock: 18MHz @ 3.3V (eS Z000 only)
• Programmable P
• 4 CPU operation modes (Fast, Slow, Green, & Sleep)
• Powerful DSP Instruction Set (MAC, DIV, RPT, OOP)
• Saturation mode supported
• 8 general purpose registers (GPR)
• 20 interrupt sources with 2-level priority (eS and eS Z000 only)
• 17 interrupt source with 2-level priority (eS S only)
 Memory
• 32K-word program memory
• 2K-word data RAM (eS and eS S only)
• 8K-word data RAM (eS Z000 only)
• 32/128/256/512K-word data ROM (eS only)
• 128/256/512K-word data ROM (eS S only)
• External data ROM up to 32MB (eS Z000 only)
 Peripherals
• Real Time Clock (RTC) with wake up function
• Four 8-bit timers, two general purpose timer, two multiple-function timer
• 8-bit Watch Dog Timer (WDT) with general purpose timer capability
• 40 GPIO + 8 Output (eS and eS Z000 only)
• 24 GPIO (eS S only)
• Serial Peripheral Interface (eS and eS Z000 only)
• 12-bit Analog to Digital Converter with touch panel and MIC inputs
(eS and eS Z000 only)
• Built-in regulator
• 12-bit current-steering Digital to Analog Converter (DAC)
• 10-bit resolution Pulse Width Modulation (PWM)

Chapter 1
eSL/eSLS Series (+ eSLZ000) User’s Manual Introduction •
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1.3 Parts List and Properties
1.3.1 eSLZ000 and eSL ICs Parts List and Properties
Product
No. eSLZ000
eSL032
eSL128
eSL256
eSL512
eSL032
A/B *
eSL128
A/B *
eSL256
A/B *
eSL512
A/B/C*
Pin Count
138 81 81 81 81 81 81 81 81
Program
ROM
32K *16
(SRAM) 32K*16 32K*16 32K*16 32K*16 32K *16 32K *16 32K *16 32K *16
Data RAM
8K *16 2K *16 2K *16 2K *16 2K *16 2K *16 2K *16 2K *16 2K *16
Data ROM
External
(Up to 16M*16)
32K * 16
128K*16
256K*16
512K*16
32K * 16 128K * 16
256K * 16
512K * 16
Timer 4*8-bit 4*8-bit 4*8-bit 4*8-bit 4*8-bit 4*8-bit 4*8-bit 4*8-bit 4*8-bit
Watch Dog
Yes Yes Yes Yes Yes Yes Yes Yes Yes
PWM 10-bit 10-bit 10-bit 10-bit 10-bit 10-bit 10-bit 10-bit 10-bit
Current
D/A 12-bit 12-bit 12-bit 12-bit 12-bit 12-bit 12-bit 12-bit 12-bit
A/D 12-bit 12-bit 12-bit 12-bit 12-bit 12-bit 12-bit 12-bit 12-bit
SPI 1 sets 1 set 1 set 1 set 1 set 1 set 1 set 1 set 1 set
I/O 40 I/O ports + 8 Output ports
* The product number with an “A,B,C” means the chip supports advanced audio algorithm.

Chapter 1
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• Introduction eSL/eSLS Series (+ eSLZ000) User’s Manual
1.3.2 eSLS ICs Parts List and Properties
Product No.
eSL128S eSL256S eSL512S eSL128SA
*
eSL256SA *
eSL512SA *
Pin Count 45 45 45 45 45 45
Program ROM
32K *16 32K *16 32K *16 32K *16 32K *16 32K *16
Data RAM 2K *16 2K *16 2K *16 2K *16 2K *16 2K *16
Data ROM 128K * 16 256K * 16 512K * 16 128K * 16 256K * 16 512K * 16
Timer 4*8-bit 4*8-bit 4*8-bit 4*8-bit 4*8-bit 4*8-bit
Watch Dog Yes Yes Yes Yes Yes Yes
PWM 10-bit 10-bit 10-bit 10-bit 10-bit 10-bit
Current D/A 12-bit 12-bit 12-bit 12-bit 12-bit 12-bit
I/O 24 I/O ports
* The product number with an “A” means the chip supports advanced audio algorithm.

Chapter 1
eSL/eSLS Series (+ eSLZ000) User’s Manual Introduction •
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1.3.3 Properties Comparison between eSLZ000, eSL,
and eSLS ICs
Product No. eSLZ000 eSL eSLS
JTAG ICE Yes No No
Boot SPI Yes No No
Total I/O number 48 48 24
(PortA + PortB0~7)
Large Current I/O number
8+4 8+4 4 (PortA 12~15)
Wake Up Pin 16+5 16+5 8+4
SPI Yes Yes No
MIC Front-end AGC Yes Yes No
ADC Yes Yes No

Chapter 1
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• Introduction eSL/eSLS Series (+ eSLZ000) User’s Manual
1.4 Algorithm Selection Table
The E AN eS Series algorithm feature
• Built-in software voice synthesizer (0.8K ~ 96Kbps@8kHz)
• Multiple flash with volume level option
• Control port output value directly by waveform (waveform control port)
• Support mark number in waveform with ROM optimized configuation
• Up to 2-channel speech with different channel sample rate or 1-channel
speech + 8-channel melody
• Voice recording in 12, 16, 20, and 32 Kbps@8KHz
• Support beat tracking function to detect music tempo
• Support speed control to adjust playback speed
• Support pitch control to change voice pitch
• Support sound source detection function to detect the angle of sound
position
• Support speaker dependent recognition to recognize voice command &
control function which is dependent on speaker
• Support speaker independent recognition to recognize voice command &
control function which is independent on speaker
• Support handwriting recognition engine to recognize characters, numeral,
symbols, and gestures.
1.4.1 eSLZ000 and eSL ICs Parts List and Properties
Product No. eSL032 eSL128 eSL256 eSL512
Audio** Up to 2-channel speech with different channel sample rate or
1-channel speech + 8-channel melody
Coding Type** 12K/16K/20K/32K/40K/48K/96K bps @ 8KHz
Sampling Rate
Range** 6kHz ~ 48KHz
Recording Yes

Chapter 1
eSL/eSLS Series (+ eSLZ000) User’s Manual Introduction •
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Product
No. eSL032A*
eSL128A*
eSL256A*
eSL512A*
eSL032B*
eSL128B*
eSL256B*
eSL512B*
eSL512C*
Audio** Up to 2-channel speech with different channel sample rate or 1-channel speech + 8-channel melody
Coding
Type** 0.8K~96K bps @ 8KHz
12K/16K/20K
/32K/40K
/48K/96K bps
@8KHz
Sampling
Rate
Range**
6kHz ~ 48KHz
Recording Yes Yes Yes Yes Yes Yes Yes Yes No
Beat
Tracking Yes Yes Yes Yes Yes Yes Yes Yes No
Speaker
Independent
Recognition
No No No No Yes Yes Yes Yes No
Speaker
Dependent
Recognition
No No No No Yes Yes Yes Yes No
Recording Yes Yes Yes Yes Yes Yes Yes Yes No
Sound
Source
Detection
Yes Yes Yes Yes Yes Yes Yes Yes No
Speech
Speed/Pitch
Control
Yes Yes Yes Yes Yes Yes Yes Yes Yes
Hand
Writing
Recognition
No No No No No No No No Yes

Chapter 1
8 •
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• Introduction eSL/eSLS Series (+ eSLZ000) User’s Manual
1.4.2 eSLS ICs Parts List and Properties
Product No.
eSL128S eSL256S eSL512S
Audio ** UP to 2-channel speech with different channel sample rate or 1-channel speech + 8-channel
melody
Coding
Type ** 12K/16K/20K/24K/32K/40K/96K bps @8KHz
Sampling Rate
Range ** 6KHz ~ 48KHz
Product No.
eSL128SA * eSL256SA * eSL512SA *
Audio ** UP to 2-channel speech with different channel sample rate or 1-channel speech + 8-channel
melody
Coding
Type ** 0.8K~96K bps @8kHz
Sampling Rate
Range ** 6KHz ~ 48KHz
Speech
Speed/Pitch
Control
Yes
* The product number with an “A,B,C” means the chip supports advanced algorithm. A series support vocal high
compress application. B series support vocie recognition (SI SD) application, C series support hand write
recognition (HWR) application.
** For further details, refer to the pertinent eSL Series Assembler Reference Guide, eSL Series C Macro
Reference Guide and related Application note.