Embedded Artists LPC3131 User manual

LPC3131/41 Developer’s Kit - User’s Guide
Copyright 2012 © Embedded Artists AB
EA2-USG-0901 Rev K
LPC3131/41 Developer’s Kit
User’s Guide
Get Up-and-Running Quickly and
Start Developing Your Applications On Day 1!

LPC3131/41 Developer’s Kit - User’s Guide
Page 2
Copyright 2012 © Embedded Artists AB
Embedded Artists AB
Davidshallsgatan 16
SE-211 45 Malmö
Sweden
[e-mail]
http://www.EmbeddedArtists.com
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specifically disclaim any implied warranties or merchantability or fitness for any particular purpose.
Information in this publication is subject to change without notice and does not represent a
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comments to [e-mail].
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LPC3131/41 Developer’s Kit - User’s Guide
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Copyright 2012 © Embedded Artists AB
Table of Contents
1Document Revision History 5
2Introduction 6
2.1 Features 6
2.2 ESD and Handling Precaution 7
2.3 LPC3131/41 Core Voltage Precaution 7
2.4 CE Assessment 8
2.5 Other Products from Embedded Artists 8
2.5.1 Design and Production Services 8
2.5.2 OEM / Education / QuickStart Boards and Kits 8
3LPC3131/41 OEM Board Design 9
3.1.1 Page 2: Powering 9
3.1.2 Page 3: LPC3131/41 CPU 10
3.1.3 Page 4: External Memories 11
3.1.4 Page 5: Expansion Connector 12
3.2 Usage of CPU Pins 12
3.3 LPC3131/41 OEM Board Mechanical Dimensions and Connector 15
3.4 Things to note about the LPC3131/41 OEM Board 15
3.4.1 NAND FLASH Bad Block 15
3.4.2 Brand of Memory Chips 15
4LPC31xx Base Board Design 16
4.1 Usage of CPU Pins 16
4.2 Known Limitation / Things to note about the LPC31xx Base Board 18
4.2.1 Codec Usage and Boot Mode 18
4.2.2 NAND Booting 18
4.2.3 SD/MMC card detect 19
4.2.4 USB Host applications –power supply 19
4.2.5 USB Host applications –over current sense 19
4.3 Jumpers 20
4.3.1 Default Jumper Positions 21
4.3.2 Illegal Jumper Combinations 21
4.4 Connectors 22
4.5 Important Components 23
4.6 NAND Boot Problem Fix 24
5Getting Started 26
5.1 Initial Setup and Powering 26
5.2 FTDI USB Driver 26
5.2.1 USB Driver Behavior 29
5.3 Booting 29
5.3.1 Jumper Settings 30
5.3.2 Creating a Boot Image 31

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Copyright 2012 © Embedded Artists AB
5.3.3 Booting via UART 35
5.3.4 Booting via SPI NOR flash 35
5.3.5 Booting via USB DFU class 36
5.3.6 LED on GPIO2 37
5.3.7 Booting via NAND Flash 38
6Further Information 39

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1 Document Revision History
Revision
Date
Description
A
2009-03-09
First complete version.
Add description about booting and correct language and spelling
errors.
B
2009-04-11
Update description of MMC/SD card detect fix and codec handling.
C
2009-05-05
Update description for LPC31xx Base Board v2.0 (with Ethernet).
D
2009-06-18
Update with description for EWARM.
E
2009-09-09
Added information about LPC3141.
Added information about NAND boot and LCD/Ethernet problem
(section 5.3.6).
F
2009-11-27
Changed title of manual to ‘Developer’s Kit” manual.
Updated OEM Board schematic to v1.2.
Replaced earlier section 5.3.6 with new section about NAND boot
and LCD/Ethernet problem (section 4.6 ).
G
2010-07-05
Added information in section 4.2 about things to note about the
LPC31xx Base Board (UDA1380 I2C address, SD card detect logic,
USB Host powering).
H
2010-11-15
Updated information about NAND boot problem.
I
2011-08-24
Added information about VBUS over-current sense for USB Host
applications (section 4.2.5 ).
J
2011-12-19
Added note about CE marking.
Removed schematics from document.
K
2012-05-10
Updated section 5.3.4 about SPI NOR boot. Added section 5.3.7
about booting from NAND flash.

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2 Introduction
Thank you for buying Embedded Artists’ LPC3131/41 Developer’s Kit based on NXP’s ARM926EJ-S
LPC3131/41 microcontroller.
This document is a User’s Guide that describes the LPC3131/41 OEM Board and the LPC31xx Base
Board hardware design. It is the User’s Manual for both the LPC3131/41Developer’s Kit as well as for
just the LPC3131/41 OEM Board.
2.1 Features
Embedded Artists’LPC3131/41 Developer’s Kit with NXP’s ARM926EJ-S LPC3131/41 microcontroller
lets you get up-and-running quickly. The small sized OEM board offers many unique features that ease
your learning curve and speed up your program development. The board has also been designed for
OEM applications with volume discount available. The features of the LPC3131/41 OEM board are:
NXP's ARM926EJ-S LPC3131/41 microcontroller in BGA package, with 192 KByte internal
RAM
External data memory: 64 MB SDRAM (16-bit databus width)
External FLASH memories: 256 MB (2Gbit) NAND FLASH and 4 MB (32Mbit) SPI-NOR
FLASH
12.0000 MHz crystal for maximum execution speed and standard serial bit rates, including
CAN and USB requirements
256 Kbit I2C E2PROM for storing non-volatile parameters
Buffered 16-bit data bus for external expansion
200 pos expansion connector (SODIMM-200 format, 0.6mm pitch)
All LPC3131/41 pins available (except dedicated pins for on-board memories)
+5V only powering
Onboard reset generation
Compact SODIMM size: 66 x 48 mm
Six layer PCB design for best noise immunity
There is an accompanying LPC31xx Base Board that can be used for initial prototyping work. The
features of the board are:
Connectors
200 pos, 0.6mm pitch SODIMM connector for LPC3131/41 OEM Board
RJ45 Ethernet connector (available on base board from v2.0)
Expansion connector to 3.2 inch QVGA TFT color LCD with touch panel
Three expansion connectors with all SODIMM signals
MMC/SD interface and connector
USB OTG or Host connectors
Four 3.5mm audio connectors (mic in, line in, line out, headphone out)
JTAG connector
2.1mm power input

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Power
Power supply, either via USB or external 9-15V DC
(LPC3131/41 OEM Board is powered with +5V)
Current monitors on input voltages
Other
100/10Mbps Ethernet interface base on DM9000A chip (available on base board from
v2.0)
UDA1380 I2S codec with mic in, line in, line out, and headphone out
5-key joystick (via I2C)
3-axis accelerometer
8 LEDs (via I2C)
Trimpot analog input
USB-to-serial bridge on UART (FT232R)
RS232 alternative interface on UART
XBee™ RF-module alternative interface on UART
(note that XBee module is not included in bundle)
Reset push-button and LED
205x135 mm in size
2.2 ESD and Handling Precaution
Please note that the LPC3131/41 OEM Board and LPC31xx Base Board come without any case/box
and all components are exposed for finger touches –and therefore extra attention must be paid to
ESD (Electro-Static Discharge) precaution.
Make it a habit to always first touch the metal surface of one of the USB or SC/MMC connectors
for a few seconds with both hands before touching any other parts of the boards. That way, you
will have the same electrical potential as the board and therefore minimize the risk for ESD.
Never touch directly on the LPC3131/41 OEM Board and in general as little as possible on the
LPC31xx Base Board. The keys on the LPC31xx Base Board have grounded shields to minimize the
effect of ESD.
Note that Embedded Artists does not replace boards that have been damaged by ESD.
In case you have also connected the QVGA Display Module to the LPC31xx Base Board, do not
exercise excessive pressure on the LCD glass area. That will damage the display. Also, do not apply
pressure on the two flex cables connecting the LCD. These are relatively sensitive and can be
damaged if too much pressure is applied to them.
Note that Embedded Artists do not replace QVGA Display Modules where the LCD has been
improperly handled.
2.3 LPC3131/41 Core Voltage Precaution
The core voltage for the LPC3131/41 can be dynamically changed, via I2C commands sent to the
LTC3447 voltage converter. The voltage can be set to up to 2V. Note that this is above the limits of the
core voltage. See LPC3131/41 datasheet for details (the maximum core voltage is 1.30V).

LPC3131/41 Developer’s Kit - User’s Guide
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Note that Embedded Artists do not replace LPC3131/41 OEM boards where the core voltage
(VDD(CORE)) has been raised above 1.30 Volt. It is the user’s responsibility not to exceed the
voltage specification found in the datasheet.
On version 1.1 boards, two zero ohm resistors/jumpers must be soldered to the LPC3131/41 OEM
Board in order to connect the I2C communication channel of the LTC3447 to I2C channel#1. See the
schematic for details.
2.4 CE Assessment
The LPC3131/41 Developers Kit (consisting of the LPC3131/41 OEM Board and LPC31xx Base
Board) is CE marked. See separate CE Declaration of Conformity document.
The LPC3131/41 Developers Kit is a class A product. In a domestic environment this product may
cause radio interference in which case the user may be required to take adequate measures.
EMC emission test has been performed on the LPC3131/41 Developers Kit. Standard interfaces like
Ethernet, USB, serial have been in use. General expansion connectors where internal signals are
made available (for example processor pins) have been left unconnected. Connecting other devices to
the product via the general expansion connectors may alter EMC emission. It is the user’s
responsibility to make sure EMC emission limits are not exceeded when connecting other devices to
the general expansion connectors of the LPC3131/41 Developers Kit.
Due to the nature of the LPC3131/41 Developers Kit –an evaluation board not for integration into an
end-product –fast transient immunity tests and conducted radio-frequency immunity tests have not
been executed. Externally connected cables are assumed to be less than 3 meters. The general
expansion connectors where internal signals are made available do not have any other ESD protection
than from the chip themselves. Observe ESD precaution.
Note that the LPC3131/41 OEM board is classified as a component and is hence not CE marked
separately. It can perform different functions in different integrations and it does not have a direct
function. It is therefore not in the scope of the CE Directive. An end product, where an OEM Board is
integration into, is however very likely to need CE marking.
2.5 Other Products from Embedded Artists
Embedded Artists have a broad range of LPC1xxx/LPC2xxx/LPC3xxx/LPC4xxx based boards that are
very low cost and developed for prototyping / development as well as for OEM applications.
Modifications for OEM applications can be done easily, even for modest production volumes. Contact
Embedded Artists for further information about design and production services.
2.5.1 Design and Production Services
Embedded Artists provide design services for custom designs, either completely new or modification to
existing boards. Specific peripherals and I/O can be added easily to different designs, for example,
communication interfaces, specific analog or digital I/O, and power supplies. Embedded Artists has a
broad, and long, experience in designing industrial electronics in general and with NXP’s LPC2xxx
microcontroller family in specific. Our competence also includes wireless and wired communication for
embedded systems. For example IEEE802.11b/g (WLAN), Bluetooth™, ZigBee™, ISM RF, Ethernet,
CAN, RS485, and Fieldbuses.
2.5.2 OEM / Education / QuickStart Boards and Kits
Visit Embedded Artists’ home page, www.EmbeddedArtists.com, for information about other OEM /
Education / QuickStart boards / kits or contact your local distributor.

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3 LPC3131/41 OEM Board Design
This chapter contains detailed information about the electrical and mechanical design of the
LPC3131/41 OEM Board. Note that it is version 1.2 of the board that is presented. Differences from
version 1.1 and 1.0 are small and can be seen in the schematic (first page). The schematic can be
downloaded in pdf format from the support page, and is recommended to have printed out while
reading this chapter.
The following subsections describe in more detail each part of the design.
3.1.1 Page 2: Powering
Page 2 of the schematic contains the power supplies of the LPC3131/41 OEM Board.
3.1.1.1 1.8V and 3.3V Voltages
The LPC3131/41 requires three voltages; 1.2V for the core, 1.8V for the memory interface and 3.3V for
the rest of the i/o interfaces. The 1.8V and 3.3V voltages are fixed and generated by two LM3671MF
step-down switching regulators from National Semiconductor. These regulators are capable of
generating 600mA, which by far exceed the needed current by the LPC3131/41 and other components
on the LPC3131/41 OEM Board.
3.1.1.2 1.2V Adjustable Core Voltage
The core 1.2V voltage is adjustable and is generated by the step down switching regulator LTC3447
from Linear Technologies. This regulator is capable of generating 600mA, which also by far exceed the
needed current by the LPC3131/41. The adjustment is done via an I2C channel, I2C1 in the
LPC3131/41 case. The core voltage can be adjusted as a power save feature. By lowering the voltage,
the total power consumption can be lowered but the clock frequency of the core must then also be
lowered. This is a trade-off that is important for hand held equipment. Note that it is the user’s
responsibility not to program the LTC3447 to generate too high core voltage, which is possible.
The LTC3447 can generate voltages up to 2V, which by far exceed the limits for the LPC3131/41. To
minimize the risk of accidentally setting the voltage the I2C channel is disconnected via R56/R57
(which are 0 ohm resistors/jumpers that are not mounted). R56/R57 is the only thing that differs
between v1.0 and v1.1 of the board. On v1.0, the I2C1 of the LPC3131/41 is always connected to the
LTC3447.
See the LPC3131/41 datasheet for exact details about ranges, but it is in the region of 1.1-1.3V. Also
see the LTC3447 datasheet for details about how to adjust the voltage (it is a write-only register). The
I2C address for the LTC3447 is indicated in the schematic.
3.1.1.3 Input Voltage
The input voltage to the LPC3131/41 OEM Board is given by the requirements of the LM3671 and
LTC3447. A recommended input voltage range is 3.4 –5.5V. The input supply must be stable but there
are no special needs for bulk capacitors close to the power pins on the expansion connectors. The
needed capacitors are placed close to the step down switching regulators on the LPC3131/41 OEM
Board.
3.1.1.4 OTP VPP Voltage
The VPP power to the LPC3131 is fixed to 1.2V. The LPC3141 has on-chip OTP (One-Time
Programmable) fuses that can be programmed. 3.3V must be applied to VPP during programming.
The OTP voltage switch (U4) is mounted on LPC3141 OEM Boards, but not on LPC3131 OEM
Boards.

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3.1.2 Page 3: LPC3131/41 CPU
Page 3 of the schematic contains the core part of the design, which of course is the LPC3131/41
microcontroller. It is an ARM926EJ-S cpu core with a lot of different peripheral units and on-chip
memory (192 KByte SRAM).
3.1.2.1 12MHx Crystal and PLLs
The microcontroller crystal frequency is 12.0000 MHz. This frequency is the recommended from NXP.
There is dual on-chip PLLs on the LPC3131/41 in order to generate different needed frequencies for
the chip. Note that the clocking structure is very different from the LPC2xxx family. It is a more
complex structure but also much more versatile and flexible. There is no shortcut but to read
the LPC3131/41 User’s Manual in detail and understand the options and settings.
The main thing differing between the LPC3131 and the LPC3141 is the maximum core frequency for
the processor. See datasheet for details.
3.1.2.2 Booting
The LPC3131/41 starts executing from an on-chip ROM, containing the bootloader. Note that the
LPC3131/41 does not contain any on-chip FLASH memory. Program code must be loaded from an
external source into the on-chip SRAM.
There are multiple boot options, as indicated in the schematic. The default is set to UART mode
booting. Normally the default boot option can be controlled/changed from the LPC31xx Base Board,
but the default resistors can also be changed for special orders of the board. The LPC3131/41 OEM
Board contains both SPI NOR flash and NAND flash in order to support stand alone booting.
Section 4.6 contains important information if NAND boot is used.
3.1.2.3 JTAG interface
The JTAG interface is a standard ARM-compatible JTAG interface. There is a special feature on the
LPC3131/41 that can bypass the ARM core scan chain (i.e. the debug access), by pulling JTAGSEL
low. In that case, the JTAG interface is used for boundary scan access. The multiplexer (U17) selects
the different scan chain outputs depending on the JTAGSEL signal. Normally this has no affect on the
operation since the input signal JTAG_DBGEN (connected to JTAGSEL) is held high.
3.1.2.4 SPI NOR FLASH
There is a 32Mbit (4 MByte) NOR flash connected to the SPI bus. There is an option to mount one of
two different manufacturers; either S25FL032 from Spansion or AT45DB321 from Atmel. Embedded
Artists can choose to mount any one of these chips (or similar) on the board and it depends on
component availability at the time of production. Both are compatible for the relevant commands. In
case special commands are used, it is possible to read out chip id and determine type.
3.1.2.5 Reset Generation
The reset generation is handled by a standard voltage supervisor chip, CAT811R from Catalyst
Semiconductor. The reset signal will be held active (i.e., low) until the supply voltages, +3.3V, is within
margins (above 2.63V). The reset duration is typically 200 mS (consult the CAT811R datasheet for
exact details). The output reset signal is push/pull output that is converted to an open-collector / open-
drain output via the 74LVC1G125 buffer. An external reset source can pull the reset signal low (with an
open-collector/open-drain output).
3.1.2.6 I2C E2PROM
There is a 256 kbit E2PROM accessible via the I2C interface. The LPC3131/41 has two on-chip I2C
communication channels. Channel #0 is used for communicating with the E2PROM. More peripheral
units are easily connected to the two-wire I2C bus, just as long as the addresses do not collide. The
address of the 256kbit E2PROM is 0xA0, which is also indicated in the schematic.

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There are 1.5 kohm pull-up resistors (pull-ups are always needed on I2C busses) included on the board
on I2C channel #0.
3.1.2.7 USB Interface
There is a high-speed USB 2.0 (OTG, Host, Device) interface with on-chip PHY on the LPC3131/41.
Note that special care must be taken for layout of the USB signals. This also applies for the external
connector, connected to the expansion interface of the LPC3131/41 OEM Board.
3.1.2.8 Analog Inputs
The LPC3131/41 contains a 10-bit ADC (Analog to Digital Converter). The positive reference voltage is
ADC_VREFP (found on page 2 of the schematic). It is a filtered version of the 3.3V voltage. The
voltage ADC_VREFP is available on the expansion connector. There is also an associated analog
ground reference available on the expansion connector (connected to pin ADC10B_GND on the
LPC3131/41).
3.1.3 Page 4: External Memories
Page 4 of the schematic contains the external memory interface and the external memories. There are
two memory components connected to the external 16-bit memory bus interface. Note that the LCD
interface and external memory bus interface are multiplexed over the same pins. It is the memory bus
interface that is used in the LPC3131/41 OEM Board. The LCD interface cannot be used and shall not
be enabled in the cpu.
Also note that three different types of memories share the same bus interface:
Dynamic memories (SDRAM)
Using signals RAS/CAS/DQM0/DQM1/ CLOCKOUT/CKE, etc.
Static memories or general peripherals
Using signals OE/WE/BLOUT0/BLOUT1, etc.
NAND Flash memories
Using signals CLE/ALE, etc.
Many of the signals are multiplexed on the same pins. The memory interface operates at 1.8V level,
which minimizes power consumption.
3.1.3.1 Memory Layout
The external memory controller on the LPC3131/41 defines a number of memory regions, as listed
below:
External SDRAM bank 0 (0x3000 0000 –0x33FF FFFF)
16-bit databus width and 64MByte in size.
External SRAM bank 0 (0x2000 0000 –0x2000 FFFF / 0x2001 FFFF)
128 kByte in size for 16-bit databus width and 64 kByte in size for 8-bit databus.
External SRAM bank 1 (0x2002 0000 –0x2002 FFFF / 0x2003 FFFF)
128 kByte in size for 16-bit databus width and 64 kByte in size for 8-bit databus.
NAND band 0-3 (accessible via NAND flash controller, not directly via memory address)
The LPC3131/41 OEM Board uses the external SDRAM bank 0 as well as NAND bank 0. It is mainly
the two external SRAM banks that are available for the off-board external memory interface of the
LPC3131/41 OEM Board. Chip select signals N_STCS0 and N_STCS1 are free for external use via
the buffered memory interface. Both the address and the data busses are buffered.

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3.1.3.2 SDRAM
A 512 MBit (64 MByte) Mobile SDRAM is used, MT48H32M16LF from Micron. The chip is powered by
1.8V and is organized as 32Mbitx16, i.e. it has 16-bit databus width. The chip occupies the only
available memory bank for dynamic RAM at address range 0x3000 0000 –0x33FF FFFF.
3.1.3.3 NAND Flash
A 2 Gbit (256) NAND flash is used, MT29F2G08ABDHC from Micron. The chip is powered by 1.8V and
has 8-bit databus width. The NAND flash builds on a single-level cell (SLC) technology and has a page
size of 2112 bytes (2,048 + 64 bytes). The chip is connected to NAND bank 0. Note that the chip is not
directly accessible via the memory bus. Instead, all accesses must be done via the on-chip NAND
flash controller of the LPC3131/41. Embedded Artists can choose to mount a different brand of NAND
flash dependent on component availability at the time of production. The application program should
always read out the NAND flash chip id and determine type and features.
3.1.3.4 Buffers to External Interface
The LPC3131/41 memory interface is available on the expansion connector. The data bus width is 16-
bits on the external interface. The relevant signals are buffered. The buffers are disabled by default
unless enabled by external signals.
By pulling signal N_ABUF_EN low, the two buffers for address and control signals are enabled and act
as outputs (from the LPC3131/41 OEM Board).
The data bus buffer is controlled by the signal N_DBUF_EN. By pulling this signal low, the data bus
buffer is enabled. The buffered version of the LPC3131/41 signal OE controls the direction of the data
bus buffer. During read operations the buffer acts as an input and during write operations it acts as an
output.
Note that N_DBUF_EN must not be pulled low constantly. In that case the buffer will collide with the
board’s internal data bus. N_DBUF_EN must only be pulled low when an external memory/IO device is
accessed. If only one of the static chip selects is used externally, just connect that signal to
N_DBUF_EN. If more than one chip select signal is used, (logically) AND all chip select signal together
before driving the N_DBUF_EN signal, in this case, just AND the two signals B_N_STCS0 and
B_N_STCS1.
There is an additional important note when booting from NAND flash, read section 4.6 for details about
the N_DBUF_EN signal.
If the external memory interface is not used, leave ABUS_EN and DBUS_EN unconnected.
The buffers are dual voltage buffers and act as level translators between the internal 1.8V signal levels
and the external levels. Connect the external bus voltage to VDD_EXT. See the datasheet of
74AVCA164245 for exact details about voltage range. Normally 3.3V powering is used.
3.1.4 Page 5: Expansion Connector
The LPC3131/41 OEM Board integrates the core part of a typical LPC3131/41 board design with a
reasonable large amount of external memories. All relevant signals of LPC3131/41 are available on the
200 pos, 0.6mm pitch expansion connector (SODIMM-200 format). See next section for a detailed list
of available pins.
3.2 Usage of CPU Pins
Almost all pins of the LPC3131/41 are directly available on the expansion connectors. Only in a few
cases pins are used for dedicated functionality like (dynamic) memory control signals and chip select
signals. Such pins are not available on the expansion connector. The table below lists all pins and their
possible restrictions.

LPC3131 OEM Board - User’s Guide
Copyright 2009 © Embedded Artists AB
EA2-USG-0901 v0.1 Rev A
Pin
Available on expansion connector
USB_VBUS
USB_DM
USB_DP
USB_ID
Yes
I2C_SDA0
I2C_SCL0
Yes, but I2C E2PROM connected to these pins.
I2C_SDA1
I2C_SCL1
Yes, but LTC3447 is connected to these pins on v1.0
boards. Can be connected on v1.1 boards.
SPI_CS_OUT0
No, signal used for chip select of SPI NOR flash (U7 or
U10).
SPI_SCK
SPI_MISO
SPI_MOSI
SPI_CS_IN
Yes, but note that SPI NOR flash is connected to SPI_SCK,
SPI_MISO, SPI_MOSI.
UART_RXD
UART_TXD
UART_CTS/SPI_CS_OUT1
UART_RTS/SPI_CS_OUT2
Yes
I2SRX_DATA0
I2SRX_WS0
I2SRX_BCK0
I2STX_DATA0
I2STX_WS0
I2STX_BCK0
Yes
I2SRX_DATA1
I2SRX_WS1
I2SRX_BCK1
I2STX_DATA1
I2STX_WS1
I2STX_BCK1
Yes
GPIO0
GPIO1
GPIO2
Yes, but pull-ups/pull-downs are used to set default boot
mode to booting from the UART.
GPIO3-GPIO20
Yes
PWM_DATA
Yes
ADC10B_GPA0-ADC10B_GPA3
Yes
CLK_256FS_O
CLOCK_OUT
Yes

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SYSCLK_O
EBI_D0-EBI_D15
Yes, but only available via the data bus buffer
MLCD_A0/ALE
MLCD_A1/CLK
MLCD_DB2/EBI_A2
MLCD_DB3/EBI_A3
MLCD_DB4/EBI_A4
MLCD_DB5/EBI_A5
MLCD_DB6/EBI_A6
MLCD_DB7/EBI_A7
MLCD_DB8/EBI_A8
MLCD_DB9/EBI_A9
MLCD_DB10/EBI_A10
MLCD_DB11/EBI_A11
MLCD_DB12/EBI_A12
MLCD_DB13/EBI_A13
MLCD_DB14/EBI_A14
MLCD_DB15/EBI_A15
Yes, but only available via the address bus buffer
EBI_DQM0/NOE
EBI_NWE
EBI_NCAS/BLOUT0
EBI_NRAS/BLOUT1
MLCD_CSB/EBI_NSTCS0
MLCD_DB1/EBI_NSTCS1
Yes, but only available via the buffer
NAND_NCS0
MNAND_RYBN0/MCI_DATA4
No, used for internal NAND flash memory.
NAND_NCS1
NAND_NCS2
NAND_NCS3
MNAND_RYBN1/MCI_DATA5
MNAND_RYBN2/MCI_DATA6
MNAND_RYBN3/MCI_DATA7
Yes
MLCD_DB0/EBI_CLKOUT
MLCD_RS/EBI_NDYCS
MLCD_RW_WR/EBI_DQM1
MLCD_E_RD/EBI_CKE
No, used for internal SDRAM.
ADC_REFP
ADC_REFN
Yes. Note that VDDA is connected to +3.3V power supply
FFAST_IN
FFAST_OUT
No, directly connected to on-board crystals
JTAG signals
Yes, except for BUF_TRTS_N, BUF_TCK, BUF_TMS
RESET_IN
Yes

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The LPC31xx Base Board illustrates how to typically connect external interfaces (like USB, external
memory devices, etc) to the LPC3131/41 OEM Board. Study this schematic for details.
3.3 LPC3131/41 OEM Board Mechanical Dimensions and Connector
Figure 1 below contains a drawing of the board that includes mechanical measures. See SODIMM-200
standard for exact measures. 1.8V keying is used (SODIMM-200 boards are either 1.8V or 2.5V
keyed).
Figure 1 –LPC3131/41 OEM Board Mechanical Dimensions
The SODIMM-200 format is a standard and there exist many connectors that are suitable from many
different manufactures. The many sources also keep the connector cost very low. Note that the
connector should be 1.8V keyed.
See document OEM Board Integration Guide for more information about suitable connectors, but
basically any SODIMM, DDR2, 200pos, 1.8V, right-angled connector will do.
3.4 Things to note about the LPC3131/41 OEM Board
3.4.1 NAND FLASH Bad Block
The NAND Flash is the MT29F2G08ABDHC from Micron and contains 2 GBit capacity. The chip may
include invalid blocks when shipped from factory. A maximum of 40 invalid blocks may exist initially,
i.e., 2008-2048 valid blocks. Additional invalid blocks may develop while being used. Invalid blocks are
defined as blocks that contain one or more bad bits. Do not erase or program factory-marked bad
blocks. More information about appropriate management of invalid blocks can be found in technical
notes and datasheet from Micron.
3.4.2 Brand of Memory Chips
Note that there is no guarantee for a certain brand or version of memory chips; SPI-NOR flash, parallel
NAND flash and SDRAM. The lifetime of memory chips is limited and availability can also be limited
from time to time. Embedded Artists make every effort to mount the original design chip on the board.
In case that is impossible a compatible chip will instead be mounted without any prior notice. There
can be small programming differences between mounted brands. The application program shall always
read the chip id of flash devices to make certain which chip is actually mounted on the board.
The support page contains datasheets to the different memory devices and information about mounted
devices on different board versions.
66 mm
48 mm
1.8V keying of SODIMM board

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4 LPC31xx Base Board Design
This chapter contains detailed information about the electrical and mechanical design of the LPC31xx
Base Board, version 2.0. The difference between v1.1 and v2.0 is that a 100/10Mbps Ethernet
interface was added in v2.0. This new functionality is found on page 8 of the schematic. The
differences between version 1.0 and v1.1 are very small and can be seen on revision comments on the
first page of the schematic. The schematic can be downloaded in pdf format from the support page,
and is recommended to have printed out while reading this chapter.
The LPC31xx Base Board contains a number of interfaces and connectors to the LPC3131/41 OEM
Board. The design can be viewed as a reference schematic for custom designs around the
LPC3131/41 OEM Board.
Note that there is some future functionality on the LPC31xx Base Board, which does not directly apply
for the LPC3131/41 OEM Board.
4.1 Usage of CPU Pins
Almost all pins of the LPC3131/41 are directly available on the expansion connectors. Only in a few
cases are pins used for dedicated functionality like (dynamic) memory control signals and chip select
signals. Such pins are not available on the expansion connector. The table below lists all pins and their
possible restrictions.
Pin
Usage on LPC31xx Base Board
USB_VBUS
USB_DM
USB_DP
USB_ID
Connected to USB connectors; mini-AB and A.
I2C_SDA0
I2C_SCL0
Connected to PCA9532 port expander.
I2C_SDA1
I2C_SCL1
Connected to UDA1380 codec for controlling the codec.
SPI_SCK
SPI_MISO
SPI_MOSI
Can be connected to QVGA display for touch screen
controller SPI interface.
SPI_CS_IN
No usage.
UART_RXD
UART_TXD
Can be connected to the USB-to-serial bridge, RS232
interface or XBee module.
UART_CTS/SPI_CS_OUT1
Can be connected to QVGA display for touch screen
controller SPI interface (chip select).
Can be connected to RS232 interface or XBee module.
UART_RTS/SPI_CS_OUT2
Can be connected to RS232 interface or XBee module.
I2SRX_DATA0
Can be used to detect presence of +5V.
I2SRX_WS0
Can be used to detect USB power switch over-current
status
I2SRX_BCK0
No usage.

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I2STX_WS0
I2STX_DATA0
Can be used to control powering of MMC/SD memory card
interface.
I2STX_BCK0
Can be used to detect MMC/SD memory card presence.
I2SRX_DATA1
I2SRX_WS1
I2SRX_BCK1
I2STX_DATA1
I2STX_WS1
I2STX_BCK1
Can be connected to UDA1380 codec.
GPIO0
GPIO1
GPIO2
Can be connected to jumpers for controlling boot mode.
GPIO3
No usage.
GPIO4
Can be used as QVGA display touch screen controller
interrupt pin.
GPIO5
Can be used as MCI_CLK (MMC/SD interface)
GPIO6
Can be used as MCI_CMD (MMC/SD interface)
GPIO7
Can be used as MCI_DAT0 (MMC/SD interface)
GPIO8
Can be used as MCI_DAT1 (MMC/SD interface)
GPIO9
Can be used as MCI_DAT2 (MMC/SD interface)
GPIO10
Can be used as MCI_DAT3 (MMC/SD interface)
GPIO11-GPIO20
No usage.
PWM_DATA
Can be used to control backlight intensity on QVGA display
ADC10B_GPA0
X-output from accelerometer.
ADC10B_GPA1
Y-output from accelerometer.
ADC10B_GPA2
Either z-output from accelerometer or trim pot.
ADC10B_GPA3
No usage.
CLK_256FS_O
256 Fs clock to UDA1380 codec.
CLOCK_OUT
SYSCLK_O
No usage.
EBI_D0-EBI_D15
Connect to QVGA display module connector and DM9000
Ethernet interface.
MLCD_A0/ALE
MLCD_A1/CLK
MLCD_DB2/EBI_A2
MLCD_DB3/EBI_A3
MLCD_DB4/EBI_A4
MLCD_DB5/EBI_A5
MLCD_DB6/EBI_A6
No usage.

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Copyright 2011 © Embedded Artists AB
MLCD_DB7/EBI_A7
MLCD_DB8/EBI_A8
MLCD_DB9/EBI_A9
MLCD_DB10/EBI_A10
MLCD_DB11/EBI_A11
MLCD_DB12/EBI_A12
MLCD_DB13/EBI_A13
MLCD_DB14/EBI_A14
MLCD_DB15/EBI_A15
Connect to QVGA display module connector and DM9000
Ethernet interface.
EBI_DQM0/NOE
EBI_NWE
MLCD_CSB/EBI_NSTCS0
Connect to QVGA display module connector and DM9000
Ethernet interface.
MLCD_DB1/EBI_NSTCS1
Connect to DM9000 Ethernet interface.
EBI_NCAS/BLOUT0
EBI_NRAS/BLOUT1
No usage.
NAND_NCS1
NAND_NCS2
NAND_NCS3
MNAND_RYBN1/MCI_DATA5
MNAND_RYBN2/MCI_DATA6
MNAND_RYBN3/MCI_DATA7
No usage.
ADC_REFP
ADC_REFN
Used as references to generate analog signal from trip pot.
JTAG signals
Connected to standard ARM 2x10 pos JTAG connector.
RESET_IN
Connected to Reset push-button and LED.
4.2 Known Limitation / Things to note about the LPC31xx Base Board
4.2.1 Codec Usage and Boot Mode
The codec, uda1380 (U12), communicate audio data over the I2S bus and command/setting data over
the I2C1 bus. Transferring I2S data reliable from the codec to the LPC3131/41 requires booting from
JTAG or USB. UART and SPI booting can create an unreliable connection. The problem is under
investigation. Transferring I2S data to the codec works.
The I2C address of the UDA1380 is also important to understand. The default I2C slave address of
LPC313x/4x/5x is the same as the address assigned to UDA1380 on LPC31xx Base Board. Due to
this whenever LPC313x/4x/5x as master tries to access UDA1380 the slave logic inside the
LPC313x/4x/5x is also reacting causing I2C bus errors. For write this is not a bit problem but for
register reads it is. The software running on the LPC313x/4x/5x should change the default I2C slave
address before doing any I2C transactions to the UDA1380 on the LPC31xx Base Board. This is done
by setting register I2C0_ADR (0x1300A014) & I2C1_ADR (0x1300A414) to 0x6E. The default value for
this register is 0x1A (earlier LPC313x User’s Manual has had wrong information about default address,
i.e., it is not 0x6E).
4.2.2 NAND Booting
Read section 4.6 for details about N_DBUF_EN signal during NAND boot.

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4.2.3 SD/MMC card detect
The pull-up on SD card detect pin is after the power switch. Due to this there is a need to enable power
to the SD/MMC slot to even detect the card insertion.
Note that this problem is fixed on v2.2 of the LPC31xx Base Board.
4.2.4 USB Host applications –power supply
When running USB Host applications where the external USB Device draw a considerable amount of
current (>100mA), the LPC31xx Base Board must be powered with an external power supply (as
opposed to being powered via the USB-to-UART mini-B USB connector). See section 5.1 for details
about the external power supply.
4.2.5 USB Host applications –over current sense
U3 is an over-current protected distribution switch for VBUS (+5V) –for feeding external USB devices.
There is a status flag feedback signal from U3. If this is used (for example by the latest Linux
distribution), a jumper must be inserted in J14, pin 9-10. This will bridge the status signal to pin
I2SRX_WS0. This jumper is not inserted by default.
If the over-current flag on VBUS circuit is not getting set (in case of an over-current situation) it is a
sign of too weak external power supply. The problem is typically that when the external load is
increasing (on VBUS) the power supply circuit is reducing the output voltage rather than keeping
voltage constant and increase the current draw. Due to this the over-current flag is not getting set and
eventually the complete board can go “down”, i.e., it resets since the supply voltage is out of range. A
possible workaround (if the external power supply cannot keep the voltage at correct level) is to
monitor the VBUS voltage to detect an over-current condition and switch VBUS off when it goes below
a certain level.

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4.3 Jumpers
The LPC31xx Base Board has a number of jumpers in order to be able to connect/disconnect and fully
utilize all functionality of the LPC3131/41 and the LPC31xx Base Board. Figure 2 below illustrates all
jumpers and explains to what part of the design they belong. Note that v2.0 of the board is shown.
V1.0 and v1.1 lack the Ethernet functionality but are equal in all other aspect.
Figure 2 –LPC31xx Base Board Jumper Positions
Audio jumpers
J41, J43/45, J47/49,
J50/51/52
Left pos: connect to codec
Right pos: connect directly
to sodimm board (future
functionality)
I2S interface
J46
Connect I2S
channel#1 to
codec
MMC/SD interface
Top J13: enable card
detect (note that J13 is
removed due to fix on
v1.1 boards)
Lower J10: select
always enabled or
controlled
UART select
J28,J30,J31,J32
Left pos: to RS232
Right pos: to XBee
module
QVGA interface config
From left to right:
J36, J33, J35, J34
UART select
J27/J29
Upper pos: UART to RS232/XBee
Lower pos: UART to USB-to-serial
bridge
USB Host always
J16
insert to always
force USB Host
UOS_VBAT
J23
Select source for
UOS_VBAT
(future functionality)
Boot select
J20/J19/J18
Left pos: pull high
Right pos: pull low
Optional
Connections
J14
( future
functionality)
QVGA interface
J39/J38
Connect QVGA display
to memory bus and SPI
bus (for touch panel)
Buffer powering
J4
Insert to power
buffers on sodimm
board with 3.3V
Enable buffers
J40
Insert to enable
external memory bus
USB device connect
J22/J21
Connect analog signals
to analog inputs
Current monitor
J3
Insert to power
sodimm board with 5V
Current monitor
J1
Insert to power sodimm
board with VBAT
(future functionality)
Ethernet
enable
J55