Espressif ESP01 User manual

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About This Guide
This document provides the specifications for the ESP01 module.
The document structure is as follows:
Chapter
Title
Subject
Chapter 1
Preface
An overview of ESP01
Chapter 2
Pin Definitions
Device pinout and pin descriptions
Chapter 3
Functional Description
Description of major functional modules
Chapter 4
Peripherals and Sensors
Description of peripherals
Chapter 5
Electrical Characteristics
Electrical characteristics and specifications of ESP01
Release Notes
Date
Version
Release notes
2017.10
V1.0
First release.
Documentation Change Notification
Certification
Disclaimer and Copyright Notice

1. O VERVIEW
Note:
* For details on the part number of the ESP32 series, please refer to the document ESP32 Datasheet.
1. Overview
ESP01 is a powerful, generic Wi-Fi MCU module that targets a wide variety of applications,
ranging from low-power sensor networks to the most demanding tasks, such as voice encoding, music streaming
and MP3 decoding. ESP01 integrates a U.FL connector.
At the core of this module is the ESP32-D0WD chip*. The chip embedded is designed to be scalable and adaptive.
There are two CPU cores that can be individually controlled, and the clock frequency is adjustable from 80 MHz
to 240 MHz. The user may also power off the CPU and make use of the low-power co-processor to constantly
monitor the peripherals for changes or crossing of thresholds. ESP32 integrates a rich set of peripherals, ranging
from capacitive touch sensors, Hall sensors, low-noise sense amplifiers, SD card interface, Ethernet, high-speed
SPI, UART, I2S and I2C.
The sleep current of the ESP32 chip is less than 5 µA, making it suitable for battery powered and wearable
electronics applications. As such the chip does offer industry-leading specifications and the best performance
for electronic integration, range, power consumption, and connectivity.
The operating system chosen for ESP32 is freeRTOS with LwIP; TLS 1.2 with hardware acceleration is built in as
well. Secure (encrypted) over the air (OTA) upgrade is also supported, so that developers can continually upgrade
their products even after theirrelease.
Table 2 provides the specifications of ESP01
Table 2: ESP01 Specifications
Categories
Items
Specifications
Wi-Fi
Protocols
802.11 b/g/n/e/i (802.11n up to 150 Mbps)
A-MPDU and A-MSDU aggregation and 0.4 µs guard
interval support
Frequency range 2412~2462 MHz

1. O VERVIEW
Categories
Items
Specifications
Hardware
Module interface
SD card, UART, SPI, SDIO, I2C, LED PWM, Motor
PWM, I2S, IR
GPIO, capacitive touch sensor, ADC, DAC, LNA pre-
amplifier
On-chip sensor
Hall sensor, temperature sensor
On-board clock
40 MHz crystal
Operating voltage/Power supply
2.7
~
3.6V
Operating current
Average: 80 mA
Minimum current delivered by
power supply
500 mA
Operating temperature range -40°C ~ +85°C
Ambient temperature range Normal temperature
Package size
18±0.2 mm x 19.2±0.2 mm x 3.2±0.15 mm
Software
Wi-Fi mode
Station/SoftAP/SoftAP+Station/P2P
Wi-Fi Security WPA/WPA2/WPA2-Enterprise/WPS
Encryption AES/RSA/ECC/SHA
Firmware upgrade
UART Download / OTA (download and write firmware
via network or host)
Software development
Supports Cloud Server Development / SDK for cus-
tom firmware development
Network protocols
IPv4, IPv6, SSL, TCP/UDP/HTTP/FTP/MQTT
User configuration
AT instruction set, cloud server, Android/iOS app

2 . PIN DEFINITIO NS
IO35 NC
39: GND
IO32 IO19
IO33
IO18
IO25 IO5
IO26
IO17
IO27 IO16
IO14 IO4
IO12 IO0
GND
IO23
IO22
TXD0
RXD0
IO21
GND
3V3
EN
SENSOR_VP
SENSOR_VN
IO34
Keepout Zone
GND
IO13
SD2 SD3
CMD
CLK
SD0 SD1
IO15
IO2
2. Pin Definitions
2.1 Pin Layout
1 38
2 37
3 36
4 35
5 34
6 33
7 32
8 31
9 30
10 29
11 28
12 27
13 26
14 25
Figure 1: ESP01 Pin layout
2.2 Pin Description
ESP01 has 38 pins. See pin definitions in Table 3.
Table 3: Pin Definitions
Name
No.
Type
Function
GND
1
P
Ground
3V3
2
P
Power supply.
EN 3 I Chip-enable signal. Active high.
SENSOR_VP 4 I GPIO36, SENSOR_VP, ADC_H, ADC1_CH0, RTC_GPIO0
SENSOR_VN 5 I GPIO39, SENSOR_VN, ADC1_CH3, ADC_H, RTC_GPIO3
IO34 6 I GPIO34, ADC1_CH6, RTC_GPIO4
IO35
7
I
GPIO35, ADC1_CH7, RTC_GPIO5
IO32 8 I/O
GPIO32, XTAL_32K_P (32.768 kHz crystal oscillator input), ADC1_CH4,
TOUCH9, RTC_GPIO9
15
16
17
18 19
20
21
22
23
24

2 . PIN DEFINITIO NS
Note:
* Pins SCK/CLK, SDO/SD0, SDI/SD1, SHD/SD2, SWP/SD3 and SCS/CMD, namely, GPIO6 to GPIO11 are connected
to the integrated SPI flash integrated on ESP01 and are not recommended for other uses.
Name No. Type Function
IO33 9 I/O GPIO33, XTAL_32K_N (32.768 kHz crystal oscillator output), ADC1_CH5,
TOUCH8, RTC_GPIO8
IO25
10
I/O
GPIO25, DAC_1, ADC2_CH8, RTC_GPIO6, EMAC_RXD0
IO26
11
I/O
GPIO26, DAC_2, ADC2_CH9, RTC_GPIO7, EMAC_RXD1
IO27
12
I/O
GPIO27, ADC2_CH7, TOUCH7, RTC_GPIO17, EMAC_RX_DV
IO14 13 I/O
GPIO14, ADC2_CH6, TOUCH6, RTC_GPIO16, MTMS, HSPICLK,
HS2_CLK, SD_CLK, EMAC_TXD2
IO12 14 I/O
GPIO12, ADC2_CH5, TOUCH5, RTC_GPIO15, MTDI, HSPIQ,
HS2_DATA2, SD_DATA2, EMAC_TXD3
GND 15 P Ground
IO13 16 I/O GPIO13, ADC2_CH4, TOUCH4, RTC_GPIO14, MTCK, HSPID,
HS2_DATA3, SD_DATA3, EMAC_RX_ER
SHD/SD2*
17
I/O
GPIO9, SD_DATA2, SPIHD, HS1_DATA2, U1RXD
SWP/SD3*
18
I/O
GPIO10, SD_DATA3, SPIWP, HS1_DATA3, U1TXD
SCS/CMD*
19
I/O
GPIO11, SD_CMD, SPICS0, HS1_CMD, U1RTS
SCK/CLK* 20 I/O GPIO6, SD_CLK, SPICLK, HS1_CLK, U1CTS
SDO/SD0* 21 I/O GPIO7, SD_DATA0, SPIQ, HS1_DATA0, U2RTS
SDI/SD1* 22 I/O GPIO8, SD_DATA1, SPID, HS1_DATA1, U2CTS
IO15 23 I/O GPIO15, ADC2_CH3, TOUCH3, MTDO, HSPICS0, RTC_GPIO13,
HS2_CMD, SD_CMD, EMAC_RXD3
IO2 24 I/O
GPIO2, ADC2_CH2, TOUCH2, RTC_GPIO12, HSPIWP, HS2_DATA0,
SD_DATA0
IO0 25 I/O GPIO0, ADC2_CH1, TOUCH1, RTC_GPIO11, CLK_OUT1,
EMAC_TX_CLK
IO4 26 I/O
GPIO4, ADC2_CH0, TOUCH0, RTC_GPIO10, HSPIHD, HS2_DATA1,
SD_DATA1, EMAC_TX_ER
IO16
27
I/O
GPIO16, HS1_DATA4, U2RXD, EMAC_CLK_OUT
IO17
28
I/O
GPIO17, HS1_DATA5, U2TXD, EMAC_CLK_OUT_180
IO5
29
I/O
GPIO5, VSPICS0, HS1_DATA6, EMAC_RX_CLK
IO18
30
I/O
GPIO18, VSPICLK, HS1_DATA7
IO19
31
I/O
GPIO19, VSPIQ, U0CTS, EMAC_TXD0
NC
32
-
-
IO21 33 I/O GPIO21, VSPIHD, EMAC_TX_EN
RXD0 34 I/O GPIO3, U0RXD, CLK_OUT2
TXD0
35
I/O
GPIO1, U0TXD, CLK_OUT3, EMAC_RXD2
IO22
36
I/O
GPIO22, VSPIWP, U0RTS, EMAC_TXD1
IO23
37
I/O
GPIO23, VSPID, HS1_STROBE
GND
38
P
Ground

2 . PIN DEFINITIO NS
Note:
Firmware can configure register bits to change the settings of ”Voltage of Internal LDO (VDD_SDIO)” and ”Timing of SDIO
Slave” after booting.
2.3 Strapping Pins
Please refer to ESP01 schematics.
ESP32 has five strapping pins, which can be seen in Chapter 6 Schematics:
• MTDI
• GPIO0
• GPIO2
• MTDO
• GPIO5
Software can read the value of these five bits from the register ”GPIO_STRAPPING”.
During the chip’s system reset (power-on reset, RTC watchdog reset and brownout reset), the latches of the
strapping pins sample the voltage level as strapping bits of ”0” or ”1”, and hold these bits until the chip is powered
down or shut down. The strapping bits configure the device boot mode, the operating voltage of VDD_SDIO and
other system initial settings.
Each strapping pin is connected with its internal pull-up/pull-down during the chip reset. Consequently, if a strap-
ping pin is unconnected or the connected external circuit is high-impendence, the internal weak pull-up/pull-down
will determine the default input level of the strapping pins.
To change the strapping bit values, users can apply the external pull-down/pull-up resistances, or apply the host
MCU’s GPIOs to control the voltage level of these pins when powering on ESP32.
After reset, the strapping pins work as the normal functions pins.
Refer to Table 4 for detailed boot modes’ configuration by strapping pins.
Table 4: Strapping Pins
Voltage of Internal LDO (VDD_SDIO)
Pin
Default
3.3V
1.8V
MTDI
Pull-down
0
1
Booting Mode
Pin Default SPI Boot Download Boot
GPIO0 Pull-up 1 0
GPIO2 Pull-down Don’t-care 0
Debugging Log on U0TXD During Booting
Pin Default U0TXD Toggling U0TXD Silent
MTDO
Pull-up
1
0
Timing of SDIO Slave
Pin Default
Falling-edge Input
Falling-edge Output
Falling-edge Input
Rising-edge Output
Rising-edge Input
Falling-edge Output
Rising-edge Input
Rising-edge Output
MTDO Pull-up 0 0 1 1
GPIO5 Pull-up 0 1 0 1

3 . FUN CTIO N AL D ESC RIPTIO N
3. Functional Description
This chapter describes the modules and functions integrated in ESP01.
3.1 CPU and Internal Memory
ESP32-D0WD contains two low-power Xtensa® 32-bit LX6 microprocessors. The internal memory includes:
• 448 kB of ROM for booting and core functions.
• 520 kB (8 kB RTC FAST Memory included) of on-chip SRAM for data and instruction.
– 8 kB of SRAM in RTC, which is called RTC FAST Memory and can be used for data storage; it is
accessed by the main CPU during RTC Boot from the Deep-sleep mode.
• 8 kB of SRAM in RTC, which is called RTC SLOW Memory and can be accessed by the co-processor during
the Deep-sleep mode.
• 1 kbit of eFuse, of which 256 bits are used for the system (MAC address and chip configuration) and the
remaining 768 bits are reserved for customer applications, including Flash-Encryption and Chip-ID.
3.2 External Flash and SRAM
ESP32 supports up to four 16-MB of external QSPI flash and SRAM with hardware encryption based on AES to
protect developers’ programs and data.
ESP32 can access the external QSPI flash and SRAM through high-speed caches.
• Up to 16 MB of external flash are memory-mapped onto the CPU code space, supporting 8, 16 and 32-bit
access. Code execution is supported.
• Up to 8 MB of external flash/SRAM are memory-mapped onto the CPU data space, supporting 8, 16 and
32-bit access. Data-read is supported on the flash and SRAM. Data-write is supported on the SRAM.
ESP01 integrates 4 MB of external SPI flash. The 4-MB SPI flash can be memory-mapped onto the CPU code
space, supporting 8, 16 and 32-bit access. Code execution is supported. The integrated SPI flash is connected
to GPIO6, GPIO7, GPIO8, GPIO9, GPIO10 and GPIO11. These six pins cannot be used as regular GPIO.
3.3 Crystal Oscillators
The ESP32 Wi-Fi firmware can only support 40 MHz crystal oscillator for now.

3 . FUN CTIO N AL D ESC RIPTIO N
3.4 RTC and Low-Power Management
With the use of advanced power management technologies, ESP32 can switch between different power modes
(see Table 5).
• Power modes
– Active mode: The chip radio is powered on. The chip can receive, transmit, or listen.
– Modem-sleep mode: The CPU is operational and the clock is configurable. The Wi-Fi base- band and
radio are disabled.
– Light-sleep mode: The CPU is paused. The RTC memory and RTC peripherals, as well as the ULP
co-processor are running. Any wake-up events (MAC, host, RTC timer, or external interrupts) will wake
up the chip.
– Deep-sleep mode: Only the RTC memory and RTC peripherals are powered on. Wi-Fi connection
data are stored in the RTC memory. The ULP co-processor can work.
– Hibernation mode: The internal 8-MHz oscillator and ULP co-processor are disabled. The RTC recovery
memory is powered down. Only one RTC timer on the slow clock and some RTC GPIOs are active.
The RTC timer or the RTC GPIOs can wake up the chip from the Hibernation mode.
• Sleep Patterns
– Association sleep pattern: The power mode switches between the Active mode, Modem- and Light-
sleep mode during this sleep pattern. The CPU, Wi-Fi and radio are woken up at predeter- mined
intervals to keep Wi-Fi connections alive.
– ULP sensor-monitored pattern: The main CPU is in the Deep-sleep mode. The ULP co-processor takes
sensor measurements and wakes up the main system, based on the data collected from sensors.
Table 5: Functionalities Depending on the Power Modes
Power mode
Active
Modem-sleep
Light-sleep
Deep-sleep
Hibernation
Sleep pattern Association sleep pattern
ULP sensor-
monitored pattern -
CPU
ON
ON
PAUSE
OFF
OFF
Wi-Fi baseband and radio ON OFF OFF OFF OFF
RTC memory and RTC pe-
ripherals
ON ON ON ON OFF
ULP co-processor ON ON ON ON/OFF OFF
Thepowerconsumption varies with differentpowermodes/sleeppatternsandwork statusesoffunctional modules.
Please see Table 6 for details.
Table 6: Power Consumption by Power Modes
Power mode Description Power consumption
Active (RF working)
Wi-Fi Tx packet 14 dBm
~
19.5 dBm
Please refer to ESP32 Datasheet.
Wi-Fi Tx packet 0 dBm
Wi-Fi Rx and listening
Association sleep pattern (by Light-sleep)
1 mA
~
4 mA @DTIM3

3 . FUN CTIO N AL D ESC RIPTIO N
Note:
• When Wi-Fi is enabled, the chip switches between Active and Modem-sleep mode. Therefore, power consumption
changes accordingly.
• In Modem-sleep mode, the CPU frequency changes automatically. The frequency depends on the CPU load and
the peripherals used.
• During Deep-sleep, when the ULP co-processor is powered on, peripherals such as GPIO and I2C are able to
work.
• When the system works in the ULP sensor-monitored pattern, the ULP co-processor works with the ULP sensor
periodically; ADC works with a duty cycle of 1%, so the power consumption is 100 µA.
Power mode Description Power consumption
Modem-sleep The CPU is powered on.
Max speed 240 MHz: 30 mA ~ 50 mA
Normal speed 80 MHz: 20 mA
~
25 mA
Slow speed 2 MHz: 2 mA
~
4 mA
Light-sleep - 0.8 mA
Deep-sleep
The ULP co-processor is powered on.
150 µ A
ULP sensor-monitored pattern
100 µA @1% duty
RTC timer + RTC memory
10 µ A
Hibernation
RTC timer only
5
µ
A
Power off
CHIP_PU is set to low level, the chip is powered off
0.1
µ
A

4 . P ERIP H ERALS AN D SENSO RS
4. Peripherals and Sensors
4.1 Peripherals and Sensors Description
Table 7: Description of Peripherals and Sensors
Interface
Signal
Pin
Function
ADC
ADC1_CH0
SENSOR_VP
Two 12-bit SAR ADCs
ADC1_CH3
SENSOR_VN
ADC1_CH4
IO32
ADC1_CH5
IO33
ADC1_CH6 IO34
ADC1_CH7 IO35
ADC2_CH0 IO4
ADC2_CH1
IO0
ADC2_CH2
IO2
ADC2_CH3
IO15
ADC2_CH4 IO13
ADC2_CH5 IO12
ADC2_CH6 IO14
ADC2_CH7
IO27
ADC2_CH8
IO25
ADC2_CH9
IO26
Ultra-Low Noise
Analog Pre-Amplifier
SENSOR_VP IO36 Provides about 60 dB gain by using larger
capacitors on PCB
SENSOR_VN
IO39
DAC
DAC_1
IO25
Two 8-bit DACs
DAC_2 IO26
Touch Sensor
TOUCH0
IO4
Capacitive touch sensors
TOUCH1
IO0
TOUCH2 IO2
TOUCH3 IO15
TOUCH4 IO13
TOUCH5
IO12
TOUCH6
IO14
TOUCH7
IO27
TOUCH8
IO33
TOUCH9 IO32
SD/SDIO/MMC Host
Controller
HS2_CLK
MTMS
Supports SD memory card V3.01 standard
HS2_CMD
MTDO
HS2_DATA0
IO2
HS2_DATA1 IO4
HS2_DATA2 MTDI
HS2_DATA3
MTCK
Espressif Systems 9 ESP01 Datasheet V1.0

4 . P ERIP H ERALS AN D SENSO RS
Interface
Signal
Pin
Function
Motor PWM
PWM0_OUT0~2
Any GPIOs*
Three channels of 16-bit timers generate
PWM waveforms. Each channel has a pair
of output signals, three fault detection
signals, three event-capture signals, and
three sync signals.
PWM1_OUT_IN0
~
2
PWM0_FLT_IN0
~
2
PWM1_FLT_IN0
~
2
PWM0_CAP_IN0~2
PWM1_CAP_IN0~2
PWM0_SYNC_IN0~2
PWM1_SYNC_IN0
~
2
LED PWM
ledc_hs_sig_out0
~
7
Any GPIOs* 16 independent channels @80 MHz
clock/RTC CLK. Duty accuracy: 16 bits.
ledc_ls_sig_out0~7
UART
U0RXD_in
Any GPIOs*
Two UART devices with hardware
flow-control and DMA
U0CTS_in
U0DSR_in
U0TXD_out
U0RTS_out
U0DTR_out
U1RXD_in
U1CTS_in
U1TXD_out
U1RTS_out
U2RXD_in
U2CTS_in
U2TXD_out
U2RTS_out
I2C
I2CEXT0_SCL_in
Any GPIOs* Two I2C devices in slave or master modes
I2CEXT0_SDA_in
I2CEXT1_SCL_in
I2CEXT1_SDA_in
I2CEXT0_SCL_out
I2CEXT0_SDA_out
I2CEXT1_SCL_out
I2CEXT1_SDA_out

4 . P ERIP H ERALS AN D SENSO RS
Interface Signal Pin Function
I2S
I2S0I_DATA_in0
~
15
Any GPIOs*
Stereo input and output from/to the audio
codec, and parallel LCD dataoutput
I2S0O_BCK_in
I2S0O_WS_in
I2S0I_BCK_in
I2S0I_WS_in
I2S0I_H_SYNC
I2S0I_V_SYNC
I2S0I_H_ENABLE
I2S0O_BCK_out
I2S0O_WS_out
I2S0I_BCK_out
I2S0I_WS_out
I2S0O_DATA_out0~23
I2S1I_DATA_in0
~
15
I2S1O_BCK_in
I2S1O_WS_in
I2S1I_BCK_in
I2S1I_WS_in
I2S1I_H_SYNC
I2S1I_V_SYNC
I2S1I_H_ENABLE
I2S1O_BCK_out
I2S1O_WS_out
I2S1I_BCK_out
I2S1I_WS_out
I2S1O_DATA_out0~23
Remote Controller
RMT_SIG_IN0
~
7
Any GPIOs* Eight channels of IR transmitter and
receiver for various waveforms
RMT_SIG_OUT0~7
11 ESP01 Datasheet V1.0

4 . P ERIP H ERALS AN D SENSO RS
Interface Signal Pin Function
Parallel QSPI
SPIHD
SHD/SD2
Supports Standard SPI, Dual SPI, and
Quad SPI that can be connected to the
external flash and SRAM
SPIWP
SWP/SD3
SPICS0
SCS/CMD
SPICLK
SCK/CLK
SPIQ SDO/SD0
SPID SDI/SD1
HSPICLK
IO14
HSPICS0
IO15
HSPIQ
IO12
HSPID
IO13
HSPIHD
IO4
HSPIWP IO2
VSPICLK IO18
VSPICS0
IO5
VSPIQ
IO19
VSPID
IO23
VSPIHD
IO21
VSPIWP IO22
General Purpose
SPI
HSPIQ_in/_out
Any GPIOs*
Standard SPI consists of clock,
chip-select, MOSI and MISO. These SPIs
can be connected to LCD and other
external devices. They support the
following features:
• both master and slavemodes;
• 4 sub-modes of the SPI format
transfer that depend on the clock
phase (CPHA) and clock polarity
(CPOL) control;
• configurable SPI frequency;
• up to 64 bytes of FIFO and DMA.
HSPID_in/_out
HSPICLK_in/_out
HSPI_CS0_in/_out
HSPI_CS1_out
HSPI_CS2_out
VSPIQ_in/_out
VSPID_in/_out
VSPICLK_in/_out
VSPI_CS0_in/_out
VSPI_CS1_out
VSPI_CS2_out
JTAG
MTDI
IO12
JTAG for software debugging
MTCK
IO13
MTMS IO14
MTDO IO15
12 ESP01 Datasheet V1.0

4 . P ERIP H ERALS AN D SENSO RS
Note:
• Functions of Motor PWM, LED PWM, UART, I2C, I2S, general purpose SPI and Remote Controller can be configured
to any GPIO except GPIO6, GPIO7, GPIO8, GPIO9, GPIO10 and GPIO11.
• For the items marked with ”Any GPIOs*” in the ”Pin” column, users should note that GPIO6, GPIO7, GPIO8, GPIO9,
GPIO10 and GPIO11 are connected to the integrated SPI flash of ESP01 and are not recommended for other
uses.
Interface Signal Pin Function
SDIO Slave
SD_CLK
IO6
SDIO interface that conforms to the
industry standard SDIO 2.0 card
specification.
SD_CMD
IO11
SD_DATA0
IO7
SD_DATA1
IO8
SD_DATA2 IO9
SD_DATA3 IO10
EMAC
EMAC_TX_CLK
IO0
Ethernet MAC with MII/RMII interface
EMAC_RX_CLK
IO5
EMAC_TX_EN IO21
EMAC_TXD0 IO19
EMAC_TXD1 IO22
EMAC_TXD2
IO14
EMAC_TXD3
IO12
EMAC_RX_ER
IO13
EMAC_RX_DV IO27
EMAC_RXD0 IO25
EMAC_RXD1 IO26
EMAC_RXD2
TXD0
EMAC_RXD3
IO15
EMAC_CLK_OUT
IO16
EMAC_CLK_OUT_180
IO17
EMAC_TX_ER IO4
EMAC_MDC_out Any GPIOs*
EMAC_MDI_in Any GPIOs*
EMAC_MDO_out
Any GPIOs*
EMAC_CRS_out
Any GPIOs*
EMAC_COL_out
Any GPIOs*
13 ESP01 Datasheet V1.0

5. Electrical Characteristics
5.1 Absolute Maximum Ratings
Table 8: Absolute Maximum Ratings
Parameter Symbol Min Typ Max Unit
Power supply
VDD
2.7
3.3
3.6
V
Minimum current delivered by
power supply
IV
DD 0.5 - -
A
Input low voltage
V
IL -0.3 -
0.25×V
IO
1
V
Input high voltage
V
IH
0.75×V
IO
1
- V
IO
1
+0.3
V
Input leakage current
I
I L - - 50 nA
Input pin capacitance
C
pad
-
-
2
pF
Output low voltage
V
OL
-
-
0.1×V
IO
1
V
Output high voltage
V
OH
0.8×V
IO
1
-
-
V
Maximum output drive capability
I
MAX
-
-
40
mA
Storage temperature range
T
STR
-40
-
85
°C
Operating temperature range
T
OPR
-40
-
85
°C
1. V
IO
is the power supply for a specific pad. More details can be found in the ESP32 Datasheet, Appendix IO_MUX. For
example, the power supply for SD_CLK is the VDD_SDIO.

FCC Statement:
Please take attention that changes or modification not expressly approved by the party responsible for
compliance could void the user’s authority to operate the equipment.
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions:
(1) This device may not cause harmful interference, and
(2) This device must accept any interference received, including interference that may cause undesired
operation.
This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment. This
equipment should be installed and operated with minimum distance 20cm between the radiator & your
body.
IC Statement:
This device complies with Industry Canada licence-exempt RSS standard(s). Operation is subject to the
following two conditions:
(1) this device may not cause interference, and
(2) this device must accept any interference, including interference that may cause undesired operation of
the device.
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radioexempts de
licence. L'exploitation est autorisée aux deux conditions suivantes :
(1) l'appareil ne doit pas produire de brouillage, et
(2) l'utilisateur de l'appareil doit accepter tout brouillage radioélectrique subi, même si le brouillage est
susceptible d'en compromettre le fonctionnement.
This equipment complies with IC RSS-102 radiation exposure limits set forth for an uncontrolled
environment. This equipment should be installed and operated with minimum distance 20cm between the
radiator & your body.
ce matériel est conforme aux limites de dose d'exposition aux rayonnements, CNR-102 énoncée dans un
autre environnement.cette eqipment devrait être installé et exploité avec distance minimale de 20 entre le
radiateur et votre corps.
(1) Operational use conditions
Module has professional users use condition limitations, Host product manufacturer please ensure
giving such warning like “Product is limited to professional users use” in your product’s instruction.
(2) Antenna used
Antenna
Type
Max. Antenna
Gain
Dipole
3dBi
(3) Labelling Instruction for Host Product Integrator
Please notice that if the FCC and IC identification number is not visible when the module is installed
inside another device, then the outside of the device into which the module is installed must also
display a label referring to the enclosed module. For FCC, this exterior label should follow “Contains FCC
ID: 2AZLQ-ESP01”. In accordance with FCC KDB guidance 784748 Labeling Guidelines. For IC, this
exterior label can use wording “Contains IC: 27189-ESP01”.
§ 15.19 and RSS-Gen Labelling requirements shall be complied on end user device. Labelling rules for
special device, please refer to §2.925, § 15.19 (a)(5) and relevant KDB publications. For E-label, please
refer to §2.935.

(4) Installation Notice to Host Product Manufacturer
The OEM integrator is responsible for ensuring that the end-user has no manual instruction to
remove or install module.
The module is limited to installation in mobile application, a separate approval is required for all
other operating configurations, including portable configurations with respect to §2.1093 and
difference antenna configurations.
(5) Antenna Change Notice to Host manufacturer
If you desire to increase antenna gain and either change antenna type or use same antenna type
certified, a Class II permissive change application is required to be filed by us, or you (host manufacturer)
can take responsibility through the change in FCC ID and IC ID (new application) procedure followed by
a Class II permissive change application.
(6) FCC other Parts, Part 15B Compliance Requirements for Host product manufacturer
This modular transmitter is only FCC authorized for the specific rule parts listed on our grant, host
product manufacturer is responsible for compliance to any other FCC rules that apply to the host not
covered by the modular transmitter grant of certification.
Host manufacturer in any case shall ensure host product which is installed and operating with the
module is in compliant with Part 15B requirements.
Please note that For a Class B or Class A digital device or peripheral, the instructions furnished the user
manual of the end-user product shall include statement set out in §15.105 Information to the user or
such similar statement and place it in a prominent location in the text of host product manual. Original
texts as following:
For Class B
Note: This equipment has been tested and found to comply with the limits for a Class B digital device,
pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against
harmful interference in a residential installation. This equipment generates, uses and can radiate radio
frequency energy and, if not installed and used in accordance with the instructions, may cause harmful
interference to radio communications. However, there is no guarantee that interference will not occur in a
particular installation. If this equipment does cause harmful interference to radio or television reception,
which can be determined by turning the equipment off and on, the user is encouraged to try to correct the
interference by one or more of the following measures:
—Reorient or relocate the receiving antenna.
—Increase the separation between the equipment and receiver.
—Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
—Consult the dealer or an experienced radio/TV technician for help.
For Class A
Note: This equipment has been tested and found to comply with the limits for a Class A digital device,
pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against
harmful interference when the equipment is operated in a commercial environment. This equipment
generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with
the instruction manual, may cause harmful interference to radio communications. Operation of this
equipment in a residential area is likely to cause harmful interference in which case the user will be
required to correct the interference at his own expense.