HOLT ADK-2130mPCIe User manual

QSG-2130mPCIe Rev. A Holt Integrated Circuits
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ADK-2130mPCIe
Quick Start Guide
June 26, 2023

QSG-2130mPCIe Rev. A Holt Integrated Circuits
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REVISION HISTORY
Revision Date Description of Change
QSG-2130mPCIe Rev. New 01/20/2019 Initial Release
Rev. A 06/26/2023 Updated for HPL 4.2 release

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Introduction
The Holt Mini PCIe Mini card reference design features one or two Holt HI-2130 MIL-STD 1553 multi-channel dual
redundant terminals with integrated transformers on a single size F2 Mini PCIe card. The card is designed to operate on a
PC with a Linux OS. The Demo software uses the Holt API Library functions, providing an abstraction layer that greatly
simplifies host programming. A console menu is presented in a terminal window where commands are executed. This
Quick Start Guide provides instructions on how to boot from the Holt Flash Drive and run the demonstration software.
Figure 1 – Mini PCIe card EV-2130mPCIe-2F
Figure 2 – Mini PCIe breakout board mPCIe_breakout-2F

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Kit Contents
Quick Start Guide (QSG-2130mPCIe).
Mini PCIe card, Single HI-2130: EV-2130mPCIe-1F or Dual HI-2130: EV-2130mPCIe-2F.
USB 3.0 128G flash drive with Bootable Ubuntu 18.04.3 LTS.
Holt Eclipse (2019-09 compatible) and Vivado projects.
Mini PCIe Technical Manual (AN-2130mPCIe).
Optional Break Out board:
omPCIe_Breakout-1F (single channel) or mMPCIe_Breakout-2F (dual channel).
Quick Start Demo Requirements
PC requirements:
oMini PCIe Slot.
oUSB 3.0 port. USB 2.0 may not be bootable or will operate very slow - not recommended.
o4G RAM minimum. 8-16G is recommended for Eclipse and Vivado use –not required for the QSG
demos presented here.
Demo configurations
The cables on the Breakout board should be connected to a MIL-STD 1553 bus coupler. See AN-551 for recommended bus
connections.
The Holt Break Out board is connected to the Mini PCIe card using a small ribbon cable. The cable connector strain reliefs
are delicate so care must be exercised to avoid damage. Since the HI-2130 shares the same 1553 bus pins (BUSA, nBUSA)
with all four internal terminals (BC, RT, RT2 and SMT) in each device, the RT responds to commands transmitted by the BC
in the same device.

QSG-2130mPCIe Rev. A Holt Integrated Circuits
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Tripple BUCK
Power supply
LTC3545 (1 spare)
3.3VMOSFET
switch
100MHz
MEMS
OSC
Quad SPI
FLASH
JTAG
8 pin
to
FPGA
3.3aux
VCCINT 1V
MGTAVCC1V
VCC1.8V
(JTAG)
VCCO
3V3
52 pin
PCIe
conn.
Xilinx ARTIX-7
XC7A127-2CPG238I
10 x 10
HI-2130
(36) 16 bit address/data EBI
(6) Int,int,RTxMC8
nCS, nWE, nRD, TEST,MCLK, nMR,
TXINHA/B
PCIe
x1 lane
2x1.6
4x4
14.99 sq.
14.99 sq.
3.3aux
Optional
TBD 6x LED’s:
done, init_b,
rst, urst,
pcie_link,
heartbeat.
Bank 34
HI-2130-1
HI-2130-2
PCIe TX,RX, REFCLK
Bank 14
Bank 14Bank 16
JTAG,Misc Bank 0
ACTIVE TP
14.99mm sq.
TXHIBx,BCENA,BCTRIG AND 1553 BUS
1V
reg
MGTAVTT1V2
1V
reg
1V5
GOOD
1V5
J4
Figure 3 – Mini PCIe board block diagram
Table 1 – LEDs
PWR D1, Green
VCCO3V3 switched power.
Done D2, Green
FPGA initialized from SPI Flash
Complete D3, Green
FPGA initializes complete.
LED D6, Green
FPGA rst signal
LED D7, Green
FPGA urst signal
LED D8, Green
FPGA PCIe Link Up – must be on for
the card to work.
LED D9, Green
FPGA Heartbeat

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The following Figure 4 depicts the placement of the LEDs on the 2130 Mini PCIe Reference Board:
Figure 4 – Mini PCIe board block diagram with LEDs

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Getting Started
The Holt USB 3.0 flash drive (FD) contains a bootable version of Ubuntu Linux. The Home folder contains the project
folders and script files to run the Demos. Booting from the Holt FD allows running the Demo in the fewest steps possible
since the Demo and kernel module were prebuilt for the Ubuntu and kernel version installed on the FD. The user cannot
just copy the files from the FD to the user’s PC and run the demo program following these instructions unless the OS and
kernel versions are the same as those that are on the demo.
This Quick Start Guide assumes the user boots from the Holt FD. If the user’s PC does not have a bootable USB 3.0 port
the following instructions cannot be used. Refer to the Holt Technical Manual for instructions on how to transfer the
projects to a new computer and install Eclipse and rebuild the kernel module and Demo program.
Quick Start Demo Instructions – using the Holt USB 3.0 Flash Drive booted on a PC
These instructions assume the user has Linux experience using BASH terminal commands.
1. Turn off the PC and install the Holt Mini PCIe card (or cards).
2. Carefully insert the small ribbon cable to the Mini Card J4 connector and the other end to the Breakout board.
The cable is fine pitched and the connector plastic fasteners are delicate so care must be exercised to avoid
damaging the connector.
3. Insert the Holt USB Flash drive into a USB 3.0 port.
4. For customers with a Source License Agreement, the full Software Development Kit (SDK) is on the flash drive.
Customers without an SLA have a pre-compiled Holt Portable Library, Demo source code, and Linux kernel module
(in source code form).
5. Before turning on the PC the user should be familiar with how to boot from the external USB FD. Typically, the
F11 or F12 key is quickly pressed after a BIOS screen is briefly displayed showing some boot options. The computer
shows a boot up menu showing possible drives that are bootable.
6. Use the up or down arrow keys to select the Holt USB FD to boot from. Identify the Holt USB FD by the
manufacturer name on the FD such as “SanDisk or Memorex.” Select the Holt USB FD and press enter. The
computer should begin the boot sequence from the Holt USB FD. An Ubuntu screen is displayed with an Ubuntu
selection at the top, the user can wait for it to boot or press the enter key to start the boot-up immediately.
7. When the desktop appears enter “holtpcie” for the password. The same password is used for some terminal
commands requiring sudo privileges.
8. Use the Ubuntu “Files” application shown on the launch menu on the left side of the desktop screen that looks
like a file cabinet to navigate to folders and view files in the Holt folder. The top-level directories are:
eclipse-workspace
HI-2130_Linux_API_Demo-sdk or HI-2130_Linux_API_Demo
PcieDual2130Vivado

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The file explorer shows the following for ADK distributions:
The program initializes the four RTs with the following RT addresses (these can be changed later using command
‘9’). In some demos and in the software RT1 may also be referred to as RT. RT2 will always be referred to RT2.
Table 2 – Device RT Addresses
DEVICE/IC
RT
RT ADDRESS
ADK Board
Dev 0 / U7
RT (RT1)
3
ADK-2130mPCIe-1F
Dev 0 / U7
RT2
1
ADK-2130mPCIe-1F
Dev 1 / U8
RT (RT1)
3
ADK-2130mPCIe-1F
ADK-2130mPCIe-2F
Dev 1 / U8
RT2
1
ADK-2130mPCIe-1F
ADK-2130mPCIe-2F

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9. Open a bash terminal window, change the working directory to ~/holt and execute the run script using the sh
cmd:
10. Linux will ask for the password since a bash sudo operation is required to load the module. Enter “holtpcie” and
press return. The ‘run’ script checks the OS to see if the Xilinx Device 7011 PCIe device is found then executes two
bash scripts: first to unload and then to (re)load the kernel module and lastly runs the Demo executable.
LED8 ‘LINK’ is an indicator that the PCIe OS link was successful. If this LED is not “on”, the board will not work. See
trouble shooting section at the end of this document. If the console shows the message below “…Xilinx
Corporation Device 7011” then it was OK.
holt@holt-desktop:~/holt$ sh run
[sudo] password for holt:
Holt Linux driver (HI2130_pcie) unloaded
dev='/dev/HI2130_pcie0' major='238' minor='0'
dev='/dev/HI2130_pcie1' major='238' minor='1'
dev='/dev/HI2130_pcie2' major='238' minor='2'
dev='/dev/HI2130_pcie3' major='238' minor='3'
crw-rw-rw- 1 root root 238, 0 May 16 11:25 /dev/HI2130_pcie0
crw-rw-rw- 1 root root 238, 1 May 16 11:25 /dev/HI2130_pcie1
crw-rw-rw- 1 root root 238, 2 May 16 11:25 /dev/HI2130_pcie2
crw-rw-rw- 1 root root 238, 3 May 16 11:25 /dev/HI2130_pcie3
Holt Linux driver (HI2130_pcie) loaded
bsp Demo makefile objects.mk sources.mk
Initializing all active HI-2130 for modes: BC RT RT2 MT RTMT
Device memory word size: 32768 words
The Holt PCIe driver indicates there are 2 device(s) found as follows:
Chan ___PCIe____ HI-2130
Id Bus BAR Irq Present Device File Note
==== === === === ======= ================= ========================================
0 8 0 42 Yes /dev/HI2130_pcie0 current channel being used by demo
1 8 1 43 Yes /dev/HI2130_pcie1
Initializing HPL for channel: 0... success.
Initializing HPL for channel: 1... success.
Reset HI-2130 on channel 0... Setting nMR LOW... HIGH...
(READY asserted) Success
Re-enabling all terminals to run: BCEna RT1Ena RT2Ena MTRUN Success.
All channels commencing polling operation.
********************************************************************************
Holt Integrated Circuits HI-2130 API Demo Project
Demonstration Rev 4.2 Compiled: May 11 2023 14:29:43
Holt Portable Library version: 4.2.0
Device-core version: 0.11.6
Configured demonstrations: BC RT RT2 MT RTMT Supplemental Comp-mode
********************************************************************************

QSG-2130mPCIe Rev. A Holt Integrated Circuits
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General Main menu commands
M: Display the PCIe driver device file to channel ID mapping
U: Use a specific HI-2130 device/channel
i: Use interrupt mode (disables polling mode; installs Host Buffers)
p: Use polling mode (disables interrupt mode; uninstalls Host Buffers)
(applies to all HI-2130 devices; use +- to incr/decr poll usecs)
+: Increase time betw poll intervals by 100us)
-: Decrease time betw poll intervals by 100us)
t: Toggle traffic display (on or off)
Terminal demonstration commands which apply to the currently used HI-2130
a: Run the BC asynchronous demonstration
h: Send a high priority BC asynch message
l: Send all low priority BC asynch messages
n: Run the BC Major-Minor-Frame demonstration
x: Stop BC transmissions
y: Reset the BC asynch pointer (needed to resend BC asynch low-prio msgs)
s: Run the SMT demonstration
b: Run the RT1 demonstration (uses 1K circular-buffer mode)
o: Run the RT using MT-stack-assist demonstration
B: Run the RT2 demonstration (uses 1K circular-buffer mode)
1: Set the RT1 address
2: Set the RT2 address
k: Run the RTMT demonstration (cannot be run concurrently with s, b, o, or B)
Note: this performs a HoltInitialize()
z: Reset the HI-2130 on the current channel; reinitialize all terminals
Supplemental Demonstrations (also applies to the currently used HI-2130)
c: Run the Comprehensive (COMP) Mode demonstration
d: Dump memory
m: Memory write
r: Register write
R: Display all of the HI-2130 registers (on all devices)
F: Display all of the FPGA Endpoint Control-Signal Registers
3: Toggle BCEna selector between connector (FPGA) and software (Demo) control
4: Toggle FPGA control of BCEna on/off
5: Read RT1 Mode Code data words
6: Read RT2 Mode Code data words
?: Show this menu
q: Quit (freeing and closing all devices)
Currently using device on channel 0
HI-2130:0 Poll:100us->
The demonstration is capable of running with up to four HI-2130 -1F cards, two -2F cards or a mix of both.
Currently the demonstration can support up to four HI-2130 devices but this is configurable and can be

QSG-2130mPCIe Rev. A Holt Integrated Circuits
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extended. In the current demonstration, a reference system had one HI-2130-2F MiniPCIe reference card in PCIe
bus 8.
This yielded a maximum of two HI-2130 devices, one on each channel in sequential order starting from channel
0. When the LKM is installed, it enumerates the PCIe bus by registering a probe function which is invoked by the
kernel at load time. The user can see all the Holt HI-2130 cards installed using the following command prior to
running the demonstration if they choose:
$ sudo lspci -vvv -d :7011
When the Demo starts operating via the sh run command above, it will display the channel map as enumerated
by the driver.
Initializing all active HI-2130 for modes: BC RT RT2 MT RTMT
Device memory word size: 32768 words
The Holt PCIe driver indicates there are 2 device(s) found as follows:
Chan ___PCIe____ HI-2130
Id Bus BAR Irq Present Device File Note
==== === === === ======= ================= ========================================
0 8 0 42 Yes /dev/HI2130_pcie0 current channel being used by demo
1 8 1 43 Yes /dev/HI2130_pcie1
Initializing HPL for channel: 0... success.
Initializing HPL for channel: 1... success.
Reset HI-2130 on channel 0... Setting nMR LOW... HIGH... (READY asserted) Success
Re-enabling all terminals to run: BCEna RT1Ena RT2Ena MTRUN Success.
All channels commencing polling operation.
11. Next, the Demo will display the manifest of how and when it was configured:
********************************************************************************
Holt Integrated Circuits HI-2130 API Demo Project
Demonstration Rev 4.2 Compiled: May 11 2023 14:29:43
Holt Portable Library version: 4.2.0
Device-core version: 0.11.6
Configured demonstrations: BC RT RT2 MT RTMT Supplemental Comp-mode
********************************************************************************
Followed by the main menu:
General Main menu commands
M: Display the PCIe driver device file to channel ID mapping
U: Use a specific HI-2130 device/channel
i: Use interrupt mode (disables polling mode; installs Host Buffers)
p: Use polling mode (disables interrupt mode; uninstalls Host Buffers)
(applies to all HI-2130 devices; use +- to incr/decr poll usecs)
+: Increase time betw poll intervals by 100us)
-: Decrease time betw poll intervals by 100us)
t: Toggle traffic display (on or off)
Terminal demonstration commands which apply to the currently used HI-2130
a: Run the BC asynchronous demonstration

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h: Send a high priority BC asynch message
l: Send all low priority BC asynch messages
n: Run the BC Major-Minor-Frame demonstration
x: Stop BC transmissions
y: Reset the BC asynch pointer (needed to resend BC asynch low-prio msgs)
s: Run the SMT demonstration
b: Run the RT1 demonstration (uses 1K circular-buffer mode)
o: Run the RT using MT-stack-assist demonstration
B: Run the RT2 demonstration (uses 1K circular-buffer mode)
1: Set the RT1 address
2: Set the RT2 address
k: Run the RTMT demonstration (cannot be run concurrently with s, b, o, or B)
Note: this performs a HoltInitialize()
z: Reset the HI-2130 on the current channel; reinitialize all terminals
Supplemental Demonstrations (also applies to the currently used HI-2130)
c: Run the Comprehensive (COMP) Mode demonstration
d: Dump memory
m: Memory write
r: Register write
R: Display all of the HI-2130 registers (on all devices)
F: Display all of the FPGA Endpoint Control-Signal Registers
3: Toggle BCEna selector between connector (FPGA) and software (Demo) control
4: Toggle FPGA control of BCEna on/off
5: Read RT1 Mode Code data words
6: Read RT2 Mode Code data words
?: Show this menu
q: Quit (freeing and closing all devices)
Currently using device on channel 0
HI-2130:0 Poll:100us->
12. The Demo has a prompt to indicate the mode that the demonstration is operating in. It is formatted as follows:
HI-2130:0 Poll:100us-> Note that this is a command prompt
HI-2130:0 This demonstration targets the HI-2130 family of devices and the
current device being used is device on channel 0. (The channel map is available at
any time using the ‘M’ key).
To use a different device, use the ‘U’ key to select one of the available channels
in the map. The prompt then reflects the current channel being used. In this way, a
user can start a BC on device channel 0, an RT1 on device channel 1; and RT2 on
device channel 2, and an MT on device channel 3 if they desired.
Poll:100us This demonstration is in polling (versus interrupt mode). The polling
mode can be increased or decreased using the ‘+’ or ‘-‘ keys respectively. The
minimal polling interval is 1us.
-> The demonstration is waiting for a command.
The menu commands related to terminal demonstrations are similar to other Holt ADK’s such as the ADK-6138,
ADK-6130-2 or ADK-6131. Characters ‘a’, ‘h’, ‘l’, ‘n’, ‘x’, ‘y’, s’, ‘b’, ‘B’, ‘k’, ‘o’ and ‘c’ select one demonstration on
the currently used channel’s HI-2130. Please note that menu commands are case sensitive.

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Commands ‘r’ and ‘m’ are used for register and memory write operations, respectively.
Command ‘R’ is used to display all the Channels HI-2130 system registers names and values on the screen.
HI-2130:0 Poll:100us-> R
Reg Description ch 0 ch 1 (Consult map (M) for device mapping)
====== =============================== ==== ====
0x0000 MASTER_CONFIG1_REG : 0 0
0x0001 STATUS_AND_RESET_REG : 8000 8000
0x0002 RT_CURR_CMD_REG : 0 0
0x0003 RT_CURR_CNTRL_WRD : 0 0
0x0004 RT2_CURR_CMD_WRD : 0 0
0x0005 RT2_CURR_CNTRL_WRD : 0 0
Note: reading the following four registers can affect runtime operations
(especially in polled mode) since these register autoclear on read.
0x0006 HDW_PENDING_INT_REG : 0 0
0x0007 BC_PENDING_INT_REG : 0 0
0x0008 SMT_IMT_PENDING_INT_REG : 0 0
0x0009 RT_PENDING_INT_REG : 0 0
0x000a INT_COUNT_AND_LOG_ADDR_REG : 382 382
0x000b HOLT_REG_613X_MEM_ADD_PTR1 : 0 0
0x000c HOLT_REG_613X_MEM_ADD_PTR2 : 0 0
0x000d HOLT_REG_613X_MEM_ADD_PTR3 : 0 0
0x000e HOLT_REG_613X_MEM_ADD_PTR4 : 0 0
0x000f HDW_INT_ENABLE_REG : 18 18
0x0010 BC_INT_ENABLE_REG : 0 0
0x0011 SMT_IMT_INT_ENABLE_REG : 0 0
0x0012 RT_INT_ENABLE_REG : 408 408
Etc.
Command ‘F’ is used to display all the Channels HI-2130’s FPGA register names and values on the screen.
HI-2130:0 Poll:100us-> F
Reg Description ch 0 ch 1 (Consult map (M) for device mapping)
====== ============================== ==== ====
0x8000 HOLT_FPGA_REG_BC_TRIG RW : 0 0
0x8002 HOLT_FPGA_REG_NMR RW : 1 1
0x8003 HOLT_FPGA_REG_TEST RW : 0 0
0x8004 HOLT_FPGA_REG_BCENA RW : 1 1
0x8005 HOLT_FPGA_REG_LED0 RW : 1 1
0x8006 HOLT_FPGA_REG_LED1 RW : 1 1
0x8007 HOLT_FPGA_REG_LED2 RW : 0 0
0x8008 HOLT_FPGA_REG_LED3 RW : 0 0
0x8009 HOLT_FPGA_REG_MTRUN RW : 1 1
0x800a HOLT_FPGA_REG_RT1ENA RW : 1 1
0x800b HOLT_FPGA_REG_RT2ENA RW : 1 1
0x800c HOLT_FPGA_REG_INHIBIT RO : 0 0
0x800d HOLT_FPGA_REG_INPUTCONTROL RW : 0 0
0:set by demo 1:set by fpga
0x800e HOLT_FPGA_REG_SPAREINPUT RO : 0 0
0x800f HOLT_FPGA_REG_MTPKTRDY RO : 1 1
0x8010 HOLT_FPGA_REG_ACTIVE RO : 0 0
0x8011 HOLT_FPGA_REG_RT1MC8 RO : 1 1
0x8012 HOLT_FPGA_REG_RT2MC8 RO : 1 1
0x8013 HOLT_FPGA_REG_READY RO : 1 1
HI-2130:0 Poll:100us->
HI-2130:0 Poll:100us-> U
Enter the new channel to use: (0..1): 1
HI-2130:1 Poll:100us->

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Command ‘d’ displays a memory dump of device memory showing up to 256 words. This is useful for viewing
other areas of memory such as the illegalization tables, control blocks and data buffers.
Demo exercises using HI-2130 Device 0
1. Demonstration of the device 0 BC transmitting 15 messages and RT1 capturing and displaying the traffic data
using RT with MT Stack Assistance.
Command ‘n’ initializes the BC to transmit 15 messages (numbered 0 to 14). To display RT data traffic some additional
commands must first be executed. Five sets of three repeating messages are transmitted by the BC. Sub-address 30 is
configured for data loop-back. So the data transmitted to the RT from the first Receive command is loaded into the
same buffer location the RT will reference when transmitting data back to the BC. Just these three commands verify
that both A and B buses are effectively communicating with the BC. The data word values will match the data from
the first Receive command.
BC -> RT Receive Cmd, SA30, 32 words, BusA: 03-R-30-00
RT -> BC Transmit Cmd, SA30, 32 words, BusB 03-T-30-00
RT -> BC Transmit Cmd, SA30, 32 words, BusA 03-T-30-00
Enter ‘o’ to enable Device 0 RT1 (using the MT Stack)
(or enter ‘k’ to enable Dev0 RT1 with SMT)
Enter ‘t’ to enable RT traffic data displayed on the screen.
Enter ‘n’ to transmit 15 messages and stop.
The display should look similar to this below. Note that only the first five messages are shown here out of the 15
total messages and that messages start with ID #0. Press '?' for menu or press any valid menu key.
HI-2130:0 Poll:100us-> o
Using RT address 3
Started RT Demo
HI-2130:0 Poll:100us -> t
Traffic Enabled
HI-2130:0 ( RT Poll:100us) -> n
MSG #0000. TIME = 00040628us BUS A TYPE0: BC to RT
CMD1 1BC0 --> 03-R-30-00
DATA 0101 0202 0303 0404 0505 0606 0707 0808
0909 1010 1111 1212 1313 1414 1515 1616
1717 1818 1919 2020 2121 2222 2323 2424
2525 2626 2727 2828 2929 3030 3131 3232
STA1 1800
MSG #0001. TIME = 00041324us BUS B TYPE1: RT to BC
CMD1 1FC0 --> 03-T-30-00
STA1 1800
DATA 0101 0202 0303 0404 0505 0606 0707 0808
0909 1010 1111 1212 1313 1414 1515 1616
1717 1818 1919 2020 2121 2222 2323 2424
2525 2626 2727 2828 2929 3030 3131 3232

QSG-2130mPCIe Rev. A Holt Integrated Circuits
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MSG #0002. TIME = 00042020us BUS A TYPE1: RT to BC
CMD1 1FC0 --> 03-T-30-00
STA1 1800
DATA 0101 0202 0303 0404 0505 0606 0707 0808
0909 1010 1111 1212 1313 1414 1515 1616
1717 1818 1919 2020 2121 2222 2323 2424
2525 2626 2727 2828 2929 3030 3131 3232
MSG #0003. TIME = 00042720us BUS A TYPE0: BC to RT
CMD1 1BC0 --> 03-R-30-00
DATA 0101 0202 0303 0404 0505 0606 0707 0808
0909 1010 1111 1212 1313 1414 1515 1616
1717 1818 1919 2020 2121 2222 2323 2424
2525 2626 2727 2828 2929 3030 3131 3232
STA1 1800
MSG #0004. TIME = 00043416us BUS B TYPE1: RT to BC
CMD1 1FC0 --> 03-T-30-00
STA1 1800
DATA 0101 0202 0303 0404 0505 0606 0707 0808
0909 1010 1111 1212 1313 1414 1515 1616
1717 1818 1919 2020 2121 2222 2323 2424
2525 2626 2727 2828 2929 3030 3131 3232
Etc up to MSG #0014 (15 messages in all).
2. BC Transmits Major frames and Minor frames
At this point, the demonstration has concluded the major minor demo using one RT: RT1.
Command ‘a’ can then be used to demonstrate the BC transmitting a continuous stream of messages in a
Major/Minor frame format. To stop transmissions press ‘x’ followed by return. Only the first seven messages are
shown here. Since the RT1 and RT2 and traffic commands were already enabled from the last demo, press ‘a’ to
execute this demo. Notice the RT to RT messages have a ‘no response’ error – this is because RT2 has not been
enabled.
HI-2130:0 (BCmajorminor RT+MTStk Poll:100us) -> a
Running BC Async test Bus A...
Halting BC Major Minor demonstration.
Starting BC Asynchronous Demo.
HI-2130:0 (BCasync RT+MTStk Poll:100us) ->
MSG #0015. TIME = 00000112us BUS A TYPE0: BC to RT
CMD1 1822 --> 03-R-01-02
DATA 0005 0002
STA1 1800

QSG-2130mPCIe Rev. A Holt Integrated Circuits
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MSG #0016. TIME = 00000160us BUS A TYPE2: RT to RT
CMD1 182A --> 03-R-01-10
CMD2 0C2A --> 01-T-01-10
ERROR: NORES
MSG #0017. TIME = 00000224us BUS A TYPE2: RT to RT
CMD1 182A --> 03-R-01-10
CMD2 0C2A --> 01-T-01-10
ERROR: NORES
MSG #0018. TIME = 00000288us BUS B TYPE2: RT to RT
CMD1 182A --> 03-R-01-10
CMD2 0C2A --> 01-T-01-10
ERROR: NORES
MSG #0019. TIME = 00000400us BUS A TYPE0: BC to RT
CMD1 1822 --> 03-R-01-02
DATA 0005 0002
STA1 1800
MSG #0020. TIME = 00000448us BUS A TYPE2: RT to RT
CMD1 182A --> 03-R-01-10
CMD2 0C2A --> 01-T-01-10
ERROR: NORES
MSG #0021. TIME = 00000512us BUS A TYPE2: RT to RT
CMD1 182A --> 03-R-01-10
CMD2 0C2A --> 01-T-01-10
ERROR: NORES
3. Enable RT2.
If the previous BC messages are still transmitting, press the ‘x’ key followed by return to stop the BC. Press the
‘B’ command to enable RT2 which is set to RT address 1. By enabling RT2, the demonstration is set up to
illustrate RT-to-RT message transfers. Command ‘B’ enables the second RT: RT2.
HI-2130:0 ( RT Poll:100us) -> B
Using RT2 address 1
Started RT2 Demo
HI-2130:0 ( RT RT2 Poll:100us) ->
4. Press ‘a’ again and this time the RT to RT messages will both respond properly without any ‘no response’ errors.
Press ‘x’ and return to stop the BC to view messages. Only some messages are shown below.
HI-2130:0 ( RT Poll:100us) -> a
MSG #0039. TIME = 00000112us BUS A TYPE0: BC to RT
CMD1 1822 --> 03-R-01-02
DATA 0005 0002
STA1 1800
MSG #0040. TIME = 00000416us BUS A TYPE2: RT to RT
CMD1 182A --> 03-R-01-10
CMD2 0C2A --> 01-T-01-10
STA1 0800

QSG-2130mPCIe Rev. A Holt Integrated Circuits
17
DATA BBBB 0202 1414 0404 0505 0606 0707 0808
0909 1010
STA2 1800
MSG #0041. TIME = 00000512us BUS A TYPE0: BC to RT
CMD1 1822 --> 03-R-01-02
DATA 0005 0002
STA1 1800
MSG #0042. TIME = 00000816us BUS A TYPE2: RT to RT
CMD1 182A --> 03-R-01-10
CMD2 0C2A --> 01-T-01-10
STA1 0800
DATA BBBB 0202 1414 0404 0505 0606 0707 0808
0909 1010
STA2 1800
MSG #0043. TIME = 00000912us BUS A TYPE0: BC to RT
CMD1 1822 --> 03-R-01-02
DATA 0005 0002
STA1 1800
Demo exercises using Device 1: ADK-2130mPCIe-2F
To demonstrate the second HI-2130 (Dev1), a Holt IC card with two HI-2130’s is required, PN ADK-2130mPCIe-2F.
Execute the same commands but use the HI-2130 on the second channel.
Press ‘U’ then ‘1’ to use the second device ID: 1. (Note that the first ID is device ID 0.)
Press ‘b’, ‘B’ and ‘n’ all in upper case to exercise the second HI-2130 (Dev1) BC and RT1. Notice ‘HI-2130:1’ is shown
instead of ‘HI-2130:0’ as in the previous exercises. The n command transmits the same 15 messages, (3 are shown
below,) but this time the BC in the second HI-2130 (device 1) is used.
HI-2130:0 ( RT Poll:100us) -> U
Enter the new channel to use: (0..1): 1
HI-2130:1 Poll:100us->
HI-2130:1 Poll:100us-> z
Reset HI-2130 on channel 1... Setting nMR LOW... HIGH... (READY asserted) Success
Re-enabling all terminals to run: BCEna RT1Ena RT2Ena MTRUN Success.
HI-2130:1 Poll:100us->
HI-2130:1 Poll:100us-> B
Using RT2 address 1
Started RT2 Demo
HI-2130:1 ( RT2 Poll:100us) ->
HI-2130:1 ( RT2 Poll:100us) -> b
Using RT address 3
Started RT Demo
HI-2130:1 ( RT RT2 Poll:100us) ->
HI-2130:1 ( RT RT2 Poll:100us) -> t
Traffic disabled
HI-2130:1 ( RT RT2 Poll:100us) ->

QSG-2130mPCIe Rev. A Holt Integrated Circuits
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HI-2130:1 ( RT RT2 Poll:100us) -> t
Traffic enabled
HI-2130:1 ( RT RT2 Poll:100us) ->
HI-2130:1 ( RT RT2 Poll:100us) -> n
Starting BC Major-Minor Demo.
Executing major/minor frame test returned 0
MSG #0000. TIME = 00000048us BUS A TYPE0: BC to RT
CMD1 1BC0 --> 03-R-30-00
DATA 1111 1101 1202 1303 1404 1505 1606 1707
1808 1909 1A0A 1B0B 1C0C 1D0D 1E0E 1F0F
10F0 10E0 10D0 10C0 10B0 10A0 1090 1080
1070 1060 1050 1040 1030 1020 1010 1001
MSG #0001. TIME = 00001056us BUS A TYPE1: RT to BC
CMD1 1FC0 --> 03-T-30-00
DATA 1111 1101 1202 1303 1404 1505 1606 1707
1808 1909 1A0A 1B0B 1C0C 1D0D 1E0E 1F0F
10F0 10E0 10D0 10C0 10B0 10A0 1090 1080
1070 1060 1050 1040 1030 1020 1010 1001
MSG #0002. TIME = 00002048us BUS B TYPE1: RT to BC
CMD1 1FC0 --> 03-T-30-00
DATA 1111 1101 1202 1303 1404 1505 1606 1707
1808 1909 1A0A 1B0B 1C0C 1D0D 1E0E 1F0F
10F0 10E0 10D0 10C0 10B0 10A0 1090 1080
1070 1060 1050 1040 1030 1020 1010 1001
MSG #0003. TIME = 00010048us BUS A TYPE0: BC to RT
CMD1 1BC0 --> 03-R-30-00
DATA 1111 1101 1202 1303 1404 1505 1606 1707
1808 1909 1A0A 1B0B 1C0C 1D0D 1E0E 1F0F
10F0 10E0 10D0 10C0 10B0 10A0 1090 1080
1070 1060 1050 1040 1030 1020 1010 1001
MSG #0004. TIME = 00011056us BUS A TYPE1: RT to BC
CMD1 1FC0 --> 03-T-30-00
DATA 1111 1101 1202 1303 1404 1505 1606 1707
1808 1909 1A0A 1B0B 1C0C 1D0D 1E0E 1F0F
10F0 10E0 10D0 10C0 10B0 10A0 1090 1080
1070 1060 1050 1040 1030 1020 1010 1001
MSG #0005. TIME = 00012048us BUS B TYPE1: RT to BC
CMD1 1FC0 --> 03-T-30-00
DATA 1111 1101 1202 1303 1404 1505 1606 1707
1808 1909 1A0A 1B0B 1C0C 1D0D 1E0E 1F0F
10F0 10E0 10D0 10C0 10B0 10A0 1090 1080
1070 1060 1050 1040 1030 1020 1010 1001

QSG-2130mPCIe Rev. A Holt Integrated Circuits
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MSG #0006. TIME = 00020048us BUS A TYPE0: BC to RT
CMD1 1BC0 --> 03-R-30-00
DATA 1111 1101 1202 1303 1404 1505 1606 1707
1808 1909 1A0A 1B0B 1C0C 1D0D 1E0E 1F0F
10F0 10E0 10D0 10C0 10B0 10A0 1090 1080
1070 1060 1050 1040 1030 1020 1010 1001
MSG #0007. TIME = 00021056us BUS A TYPE1: RT to BC
CMD1 1FC0 --> 03-T-30-00
DATA 1111 1101 1202 1303 1404 1505 1606 1707
1808 1909 1A0A 1B0B 1C0C 1D0D 1E0E 1F0F
10F0 10E0 10D0 10C0 10B0 10A0 1090 1080
1070 1060 1050 1040 1030 1020 1010 1001
MSG #0008. TIME = 00022048us BUS B TYPE1: RT to BC
CMD1 1FC0 --> 03-T-30-00
DATA 1111 1101 1202 1303 1404 1505 1606 1707
1808 1909 1A0A 1B0B 1C0C 1D0D 1E0E 1F0F
10F0 10E0 10D0 10C0 10B0 10A0 1090 1080
1070 1060 1050 1040 1030 1020 1010 1001
MSG #0009. TIME = 00030048us BUS A TYPE0: BC to RT
CMD1 1BC0 --> 03-R-30-00
DATA 1111 1101 1202 1303 1404 1505 1606 1707
1808 1909 1A0A 1B0B 1C0C 1D0D 1E0E 1F0F
10F0 10E0 10D0 10C0 10B0 10A0 1090 1080
1070 1060 1050 1040 1030 1020 1010 1001
MSG #0010. TIME = 00031056us BUS A TYPE1: RT to BC
CMD1 1FC0 --> 03-T-30-00
DATA 1111 1101 1202 1303 1404 1505 1606 1707
1808 1909 1A0A 1B0B 1C0C 1D0D 1E0E 1F0F
10F0 10E0 10D0 10C0 10B0 10A0 1090 1080
1070 1060 1050 1040 1030 1020 1010 1001
MSG #0011. TIME = 00032048us BUS B TYPE1: RT to BC
CMD1 1FC0 --> 03-T-30-00
DATA 1111 1101 1202 1303 1404 1505 1606 1707
1808 1909 1A0A 1B0B 1C0C 1D0D 1E0E 1F0F
10F0 10E0 10D0 10C0 10B0 10A0 1090 1080
1070 1060 1050 1040 1030 1020 1010 1001
MSG #0012. TIME = 00040048us BUS A TYPE0: BC to RT
CMD1 1BC0 --> 03-R-30-00
DATA 1111 1101 1202 1303 1404 1505 1606 1707
1808 1909 1A0A 1B0B 1C0C 1D0D 1E0E 1F0F
10F0 10E0 10D0 10C0 10B0 10A0 1090 1080
1070 1060 1050 1040 1030 1020 1010 1001

QSG-2130mPCIe Rev. A Holt Integrated Circuits
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MSG #0013. TIME = 00042048us BUS B TYPE1: RT to BC
CMD1 1FC0 --> 03-T-30-00
DATA 1111 1101 1202 1303 1404 1505 1606 1707
1808 1909 1A0A 1B0B 1C0C 1D0D 1E0E 1F0F
10F0 10E0 10D0 10C0 10B0 10A0 1090 1080
1070 1060 1050 1040 1030 1020 1010 1001
MSG #0014. TIME = 00042048us BUS B TYPE1: RT to BC
CMD1 1FC0 --> 03-T-30-00
DATA 1111 1101 1202 1303 1404 1505 1606 1707
1808 1909 1A0A 1B0B 1C0C 1D0D 1E0E 1F0F
10F0 10E0 10D0 10C0 10B0 10A0 1090 1080
1070 1060 1050 1040 1030 1020 1010 1001
HI-2130:1 (BCmajorminor RT RT2 Poll:100us) ->
Demonstrating the Holt Mini PCIe RT with an external BC.
Any one of the four RT’s can be used with an external BC tester. Choose the desired channel and set the RT address to
match the BC message using command ‘1’ or ‘2’ on the proper channel. Connect the external BC to a bus coupler and
connect a stub from the bus coupler to the BNC connector on the optional Holt breakout board. See AN-551 for proper
bus connections.
To change the RT terminal address, press ‘1’ BEFORE enabling the RT. If a RT was enabled by a ‘b’, ‘B’, ‘c’ or ’k’ command
use command ‘z’ to reset the channel first. You must first select the proper channel number to use (0-3) and then select
‘1’ or ‘2’ to set the address for the RT1 or RT2, followed by the RT address value.
Table 3 – Device RT Addresses and Channels
DEVICE/IC
RT
DEFAULT RT
ADDRESSES
Command 9 channel
Dev 0 / U7
RT (RT1)
3
0
Dev 0 / U7
RT2
1
1
Dev 1 / U8
RT (RT1)
3
2
Dev 1 / U8
RT2
1
3
Enable the RT with a corresponding ‘c’, ‘k’, ‘b’ or ‘B’ command depending on which RT and channel is used.
Note that RT mode and RTMT mode cannot be used simultaneously. The RT is ready for BC command reception. Make
sure the external BC message tester is set for the corresponding RT address or the message will be ignored. Traffic data