HOLT ADK-2130mPCIe User manual

QSG-2130mPCIe Rev. A Holt Integrated Circuits
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ADK-2130mPCIe
Quick Start Guide
June 26, 2023

QSG-2130mPCIe Rev. A Holt Integrated Circuits
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REVISION HISTORY
Revision Date Description of Change
QSG-2130mPCIe Rev. New 01/20/2019 Initial Release
Rev. A 06/26/2023 Updated for HPL 4.2 release

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Introduction
The Holt Mini PCIe Mini card reference design features one or two Holt HI-2130 MIL-STD 1553 multi-channel dual
redundant terminals with integrated transformers on a single size F2 Mini PCIe card. The card is designed to operate on a
PC with a Linux OS. The Demo software uses the Holt API Library functions, providing an abstraction layer that greatly
simplifies host programming. A console menu is presented in a terminal window where commands are executed. This
Quick Start Guide provides instructions on how to boot from the Holt Flash Drive and run the demonstration software.
Figure 1 – Mini PCIe card EV-2130mPCIe-2F
Figure 2 – Mini PCIe breakout board mPCIe_breakout-2F

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Kit Contents
Quick Start Guide (QSG-2130mPCIe).
Mini PCIe card, Single HI-2130: EV-2130mPCIe-1F or Dual HI-2130: EV-2130mPCIe-2F.
USB 3.0 128G flash drive with Bootable Ubuntu 18.04.3 LTS.
Holt Eclipse (2019-09 compatible) and Vivado projects.
Mini PCIe Technical Manual (AN-2130mPCIe).
Optional Break Out board:
omPCIe_Breakout-1F (single channel) or mMPCIe_Breakout-2F (dual channel).
Quick Start Demo Requirements
PC requirements:
oMini PCIe Slot.
oUSB 3.0 port. USB 2.0 may not be bootable or will operate very slow - not recommended.
o4G RAM minimum. 8-16G is recommended for Eclipse and Vivado use –not required for the QSG
demos presented here.
Demo configurations
The cables on the Breakout board should be connected to a MIL-STD 1553 bus coupler. See AN-551 for recommended bus
connections.
The Holt Break Out board is connected to the Mini PCIe card using a small ribbon cable. The cable connector strain reliefs
are delicate so care must be exercised to avoid damage. Since the HI-2130 shares the same 1553 bus pins (BUSA, nBUSA)
with all four internal terminals (BC, RT, RT2 and SMT) in each device, the RT responds to commands transmitted by the BC
in the same device.

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Tripple BUCK
Power supply
LTC3545 (1 spare)
3.3VMOSFET
switch
100MHz
MEMS
OSC
Quad SPI
FLASH
JTAG
8 pin
to
FPGA
3.3aux
VCCINT 1V
MGTAVCC1V
VCC1.8V
(JTAG)
VCCO
3V3
52 pin
PCIe
conn.
Xilinx ARTIX-7
XC7A127-2CPG238I
10 x 10
HI-2130
(36) 16 bit address/data EBI
(6) Int,int,RTxMC8
nCS, nWE, nRD, TEST,MCLK, nMR,
TXINHA/B
PCIe
x1 lane
2x1.6
4x4
14.99 sq.
14.99 sq.
3.3aux
Optional
TBD 6x LED’s:
done, init_b,
rst, urst,
pcie_link,
heartbeat.
Bank 34
HI-2130-1
HI-2130-2
PCIe TX,RX, REFCLK
Bank 14
Bank 14Bank 16
JTAG,Misc Bank 0
ACTIVE TP
14.99mm sq.
TXHIBx,BCENA,BCTRIG AND 1553 BUS
1V
reg
MGTAVTT1V2
1V
reg
1V5
GOOD
1V5
J4
Figure 3 – Mini PCIe board block diagram
Table 1 – LEDs
PWR D1, Green
VCCO3V3 switched power.
Done D2, Green
FPGA initialized from SPI Flash
Complete D3, Green
FPGA initializes complete.
LED D6, Green
FPGA rst signal
LED D7, Green
FPGA urst signal
LED D8, Green
FPGA PCIe Link Up – must be on for
the card to work.
LED D9, Green
FPGA Heartbeat

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The following Figure 4 depicts the placement of the LEDs on the 2130 Mini PCIe Reference Board:
Figure 4 – Mini PCIe board block diagram with LEDs

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Getting Started
The Holt USB 3.0 flash drive (FD) contains a bootable version of Ubuntu Linux. The Home folder contains the project
folders and script files to run the Demos. Booting from the Holt FD allows running the Demo in the fewest steps possible
since the Demo and kernel module were prebuilt for the Ubuntu and kernel version installed on the FD. The user cannot
just copy the files from the FD to the user’s PC and run the demo program following these instructions unless the OS and
kernel versions are the same as those that are on the demo.
This Quick Start Guide assumes the user boots from the Holt FD. If the user’s PC does not have a bootable USB 3.0 port
the following instructions cannot be used. Refer to the Holt Technical Manual for instructions on how to transfer the
projects to a new computer and install Eclipse and rebuild the kernel module and Demo program.
Quick Start Demo Instructions – using the Holt USB 3.0 Flash Drive booted on a PC
These instructions assume the user has Linux experience using BASH terminal commands.
1. Turn off the PC and install the Holt Mini PCIe card (or cards).
2. Carefully insert the small ribbon cable to the Mini Card J4 connector and the other end to the Breakout board.
The cable is fine pitched and the connector plastic fasteners are delicate so care must be exercised to avoid
damaging the connector.
3. Insert the Holt USB Flash drive into a USB 3.0 port.
4. For customers with a Source License Agreement, the full Software Development Kit (SDK) is on the flash drive.
Customers without an SLA have a pre-compiled Holt Portable Library, Demo source code, and Linux kernel module
(in source code form).
5. Before turning on the PC the user should be familiar with how to boot from the external USB FD. Typically, the
F11 or F12 key is quickly pressed after a BIOS screen is briefly displayed showing some boot options. The computer
shows a boot up menu showing possible drives that are bootable.
6. Use the up or down arrow keys to select the Holt USB FD to boot from. Identify the Holt USB FD by the
manufacturer name on the FD such as “SanDisk or Memorex.” Select the Holt USB FD and press enter. The
computer should begin the boot sequence from the Holt USB FD. An Ubuntu screen is displayed with an Ubuntu
selection at the top, the user can wait for it to boot or press the enter key to start the boot-up immediately.
7. When the desktop appears enter “holtpcie” for the password. The same password is used for some terminal
commands requiring sudo privileges.
8. Use the Ubuntu “Files” application shown on the launch menu on the left side of the desktop screen that looks
like a file cabinet to navigate to folders and view files in the Holt folder. The top-level directories are:
eclipse-workspace
HI-2130_Linux_API_Demo-sdk or HI-2130_Linux_API_Demo
PcieDual2130Vivado

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The file explorer shows the following for ADK distributions:
The program initializes the four RTs with the following RT addresses (these can be changed later using command
‘9’). In some demos and in the software RT1 may also be referred to as RT. RT2 will always be referred to RT2.
Table 2 – Device RT Addresses
DEVICE/IC
RT
RT ADDRESS
ADK Board
Dev 0 / U7
RT (RT1)
3
ADK-2130mPCIe-1F
Dev 0 / U7
RT2
1
ADK-2130mPCIe-1F
Dev 1 / U8
RT (RT1)
3
ADK-2130mPCIe-1F
ADK-2130mPCIe-2F
Dev 1 / U8
RT2
1
ADK-2130mPCIe-1F
ADK-2130mPCIe-2F

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9. Open a bash terminal window, change the working directory to ~/holt and execute the run script using the sh
cmd:
10. Linux will ask for the password since a bash sudo operation is required to load the module. Enter “holtpcie” and
press return. The ‘run’ script checks the OS to see if the Xilinx Device 7011 PCIe device is found then executes two
bash scripts: first to unload and then to (re)load the kernel module and lastly runs the Demo executable.
LED8 ‘LINK’ is an indicator that the PCIe OS link was successful. If this LED is not “on”, the board will not work. See
trouble shooting section at the end of this document. If the console shows the message below “…Xilinx
Corporation Device 7011” then it was OK.
holt@holt-desktop:~/holt$ sh run
[sudo] password for holt:
Holt Linux driver (HI2130_pcie) unloaded
dev='/dev/HI2130_pcie0' major='238' minor='0'
dev='/dev/HI2130_pcie1' major='238' minor='1'
dev='/dev/HI2130_pcie2' major='238' minor='2'
dev='/dev/HI2130_pcie3' major='238' minor='3'
crw-rw-rw- 1 root root 238, 0 May 16 11:25 /dev/HI2130_pcie0
crw-rw-rw- 1 root root 238, 1 May 16 11:25 /dev/HI2130_pcie1
crw-rw-rw- 1 root root 238, 2 May 16 11:25 /dev/HI2130_pcie2
crw-rw-rw- 1 root root 238, 3 May 16 11:25 /dev/HI2130_pcie3
Holt Linux driver (HI2130_pcie) loaded
bsp Demo makefile objects.mk sources.mk
Initializing all active HI-2130 for modes: BC RT RT2 MT RTMT
Device memory word size: 32768 words
The Holt PCIe driver indicates there are 2 device(s) found as follows:
Chan ___PCIe____ HI-2130
Id Bus BAR Irq Present Device File Note
==== === === === ======= ================= ========================================
0 8 0 42 Yes /dev/HI2130_pcie0 current channel being used by demo
1 8 1 43 Yes /dev/HI2130_pcie1
Initializing HPL for channel: 0... success.
Initializing HPL for channel: 1... success.
Reset HI-2130 on channel 0... Setting nMR LOW... HIGH...
(READY asserted) Success
Re-enabling all terminals to run: BCEna RT1Ena RT2Ena MTRUN Success.
All channels commencing polling operation.
********************************************************************************
Holt Integrated Circuits HI-2130 API Demo Project
Demonstration Rev 4.2 Compiled: May 11 2023 14:29:43
Holt Portable Library version: 4.2.0
Device-core version: 0.11.6
Configured demonstrations: BC RT RT2 MT RTMT Supplemental Comp-mode
********************************************************************************

QSG-2130mPCIe Rev. A Holt Integrated Circuits
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General Main menu commands
M: Display the PCIe driver device file to channel ID mapping
U: Use a specific HI-2130 device/channel
i: Use interrupt mode (disables polling mode; installs Host Buffers)
p: Use polling mode (disables interrupt mode; uninstalls Host Buffers)
(applies to all HI-2130 devices; use +- to incr/decr poll usecs)
+: Increase time betw poll intervals by 100us)
-: Decrease time betw poll intervals by 100us)
t: Toggle traffic display (on or off)
Terminal demonstration commands which apply to the currently used HI-2130
a: Run the BC asynchronous demonstration
h: Send a high priority BC asynch message
l: Send all low priority BC asynch messages
n: Run the BC Major-Minor-Frame demonstration
x: Stop BC transmissions
y: Reset the BC asynch pointer (needed to resend BC asynch low-prio msgs)
s: Run the SMT demonstration
b: Run the RT1 demonstration (uses 1K circular-buffer mode)
o: Run the RT using MT-stack-assist demonstration
B: Run the RT2 demonstration (uses 1K circular-buffer mode)
1: Set the RT1 address
2: Set the RT2 address
k: Run the RTMT demonstration (cannot be run concurrently with s, b, o, or B)
Note: this performs a HoltInitialize()
z: Reset the HI-2130 on the current channel; reinitialize all terminals
Supplemental Demonstrations (also applies to the currently used HI-2130)
c: Run the Comprehensive (COMP) Mode demonstration
d: Dump memory
m: Memory write
r: Register write
R: Display all of the HI-2130 registers (on all devices)
F: Display all of the FPGA Endpoint Control-Signal Registers
3: Toggle BCEna selector between connector (FPGA) and software (Demo) control
4: Toggle FPGA control of BCEna on/off
5: Read RT1 Mode Code data words
6: Read RT2 Mode Code data words
?: Show this menu
q: Quit (freeing and closing all devices)
Currently using device on channel 0
HI-2130:0 Poll:100us->
The demonstration is capable of running with up to four HI-2130 -1F cards, two -2F cards or a mix of both.
Currently the demonstration can support up to four HI-2130 devices but this is configurable and can be