HP Vectra VL5 4 Product manual

Technical Reference
Manual
Hardware and BIOS
HP Vectra VL 5/xx series 4 PC
and
HP Vectra VL 5/xx MT series 4 PC
December 1995

NOTICE
Information contained in this document is subject to change without notice.
Hewlett-Packard makes no warranty of any kind with regard to this material, including,
but not limited to, the implied warranties of merchantability and fitness for a particular
purpose. Hewlett-Packard shall not be liable for errors contained herein or for incidental
or consequential damages in connection with the furnishing, performance, or use of
this material.
Hewlett-Packard shall not be liable for errors contained herein or for incidental or consequential
damages in connection with the furnishing, performance, or use of this material.
Hewlett-Packard assumes no responsibility for the use or reliability of its software on equipment
that is not furnished by Hewlett-Packard.
This document contains proprietary information which is protected by copyright. All rights are
reserved. No part of this document may be photocopied, reproduced, or translated into another
language without the prior written consent of Hewlett-Packard Company.
Centronics® is a U.S. registered trademark of Centronics Data Computer Corporation.
LANManager, Microsoft Windows, Windows 95 and OS/2 are products of Microsoft
Corporation.
Microsoft® and MS-DOS® are registered trademarks of Microsoft Corporation.
Novell® and Netware® are registered trademarks of Novell Inc.
Pentium™ is a trademark of Intel Corporation.
©1995 Hewlett-Packard Company

Table of Contents
NOTICE 2
PREFACE 5
ORDERING INFORMATION FOR THE PHOENIX BIOS MANUAL 5
CONVENTIONS 5
BIBLIOGRAPHY 6
1 SYSTEM OVERVIEW 7
SYSTEM OVERVIEW 7
HP VECTRA VL 5/XX SERIES 3 – VL 5/XX SERIES 4 COMPARISON 7
HP VECTRA VL 5/XX SERIES 4 DESKTOP – MINI-TOWER
COMPARISON 8
VL 5/XX SERIES 4 PC BLOCK DIAGRAM 9
PRINCIPAL COMPONENTS AND FEATURES 9
VL 5/XX SERIES 4 SYSTEM BOARD 10
VL 5/XX MT SERIES 4 DESKTOP BACKPLANE 11
VL 5/XX MT SERIES 4 MINI-TOWER BACKPLANE 11
PROCESSOR 11
SUPERSCALAR ARCHITECTURE 12
FLOATING POINT UNIT (FPU) 12
DYNAMIC BRANCH PREDICTION 12
INSTRUCTION AND DATA CACHE 12
DATA INTEGRITY 13
PCI CHIP SET 13
PCI, CACHE AND MEMORY CONTROLLER (82437FX) 14
DATA PATH UNIT (82438FX) 15
THE PCI/ISA BRIDGE AND IDE CONTROLLER (82371FB) 15
THE 82438FX AND 82371FB FEATURE SUMMARY 16
SUPER I/O CHIP 17
NS PC87332VF FEATURE SUMMARY 17
FLEXIBLE DRIVE CONTROLLER (FDC) 17
SERIAL/PARALLEL PORTS 18
GRAPHICS/INTEGRATED VIDEO 18
IDE TO PCI CONTROLLER 19
FLASH ROM 19
SECURITY FEATURES 19
PHYSICAL CHARACTERISTICS 19
ELECTRICAL SPECIFICATIONS 20
POWER AVAILABILITY (CONTINUOUS OPERATION): 20
ENVIRONMENTAL SPECIFICATIONS 21
2 SUMMARY OF THE HP/PHOENIX BIOS 22
HP/PHOENIX BIOS DESCRIPTION 22
OVERVIEW OF ADDRESS SPACE 22
I/O ADDRESSES USED BY THE SYSTEM* 22
BIOS I/O PORT MAP 23

ADDRESSING SYSTEM BOARD COMPONENTS 24
3 DESKTOP MANAGEMENT INTERFACE 26
DMI INFORMATION STRUCTURE 26
ACCESSING BIOS DMI INFORMATION 27
THE DMI HEADER 28
VERIFYING THE DMI INFORMATION STRUCTURE 28
DMI SUB-STRUCTURE TABLES 29
4 POWER-ON SELF-TESTS AND ERROR MESSAGES 32
POWER-ON SELF TEST (POST) 32
SHADOW RAM 32
ERROR MESSAGES 34
BEEP CODES 36
5 THE ULTRA VGA VIDEO CONTROLLERS 37
THE MATROX MGA MILLENNIUM VIDEO ADAPTER BOARD 37
VIDEO MEMORY 37
AVAILABLE VIDEO RESOLUTIONS 37
VESA CONNECTOR 38
FURTHER INFORMATION 38
THE INTEGRATED ULTRA VGA VIDEO CONTROLLER 38
VIDEO MEMORY 39
VIDEO MODES 39
AVAILABLE BIOS VIDEO RESOLUTIONS 42
VESA CONNECTOR 43
DB15 CONNECTOR PINOUT 43
VIDEO CONTROLLER SUMMARY 43

PREFACE
This manual is a technical reference and BIOS document for engineers and technicians
providing system level support. It is assumed that the reader possesses a detailed
understanding of AT-compatible microprocessor functions and digital addressing techniques.
Technical information that is readily available from other sources, such as manufacturer’s
proprietary publications, has not been reproduced.
This manual contains summary information only. For additional reference material, refer to the
bibliography.
ORDERING INFORMATION FOR THE PHOENIX BIOS MANUAL
System BIOS for IBM PCs, Compatibles, and EISA Computers (ISBN 0-201-57760-7) by
Phoenix Technologies is available in many bookstores. It can also be ordered directly from the
publisher as follows:
In the U.S.A.
Call Addison-Wesley in Massachusetts at [phone], and be prepared to give a credit
card number and expiry date.
In Europe
Send your request to Addison-Wesley at the address given below, and be prepared to give a
credit card number and expiry date.
Addison-Wesley
Concertgebouwplein 25
1071 LM Amsterdam, The Netherlands
Tel: [phone]
Fax: [phone]
CONVENTIONS
The following conventions are used throughout this manual to identify specific elements:
• Hexadecimal numbers are identified by a lower case h.
For example, 0FFFFFFFh or 32F5h
• Binary numbers and bit patterns are identified by a lower case b.
For example, 1101b or 10011011b

BIBLIOGRAPHY
• System BIOS for IBM PCs, Compatibles, and EISA Computers (ISBN 0-201-57760-7) by
Phoenix Technologies. Addison-Wesley (publisher).
The following Hewlett-Packard publications may also assist the reader of this manual.
• HP Vectra VL 5/xx series 4 PC
User’s Guide (supplied with PC).
• HP Vectra VL 5/xx MT series 4 PC
User’s Guide (supplied with PC).
• HP Vectra VL 5/xx series 4 PC and HP Vectra VL 5/xx MT series 4 PC
Familiarization
Guide
(D3645-90901)
•
HP Vectra PC Service Handbook - 9th edition (Available January 1996)
The following Intel® publication provides more detailed information:
•
Pentium Processor (241595-1)

1 SYSTEM OVERVIEW
This chapter provides a description of the HP Vectra VL 5/xx series 4 desktop and HP Vectra
VL 5/xx MT series 4 mini-tower PC with detailed system specifications.
SYSTEM OVERVIEW
The HP Vectra VL 5/xx series 4 PC is a Pentium processor, ISA/PCI-based PC and features
the Intel Triton chip set.
HP VECTRA VL 5/XX SERIES 3 – VL 5/XX SERIES 4 COMPARISON
Vectra VL 5/xx series 3 Vectra VL 5/xx series 4
Processor Pentium 75 (VL 5/75)
Pentium 90 (VL 5/90)
Pentium 100 (VL 5/100)
Pentium 120 (VL 5/120)
Pentium 90
Pentium 100
Pentium 120
Pentium 133
Pentium 150
Pentium 166
Level-two cache memory 256 KB asynchronous cache 256 KB synchronous cache
Main memory 8 MB or 16 MB standard
192 MB maximum 8 MB or 16 MB standard
128 MB maximum
Video controller Cirrus Logic GD 5434
integrated on PCI bus Trio 765 64V+ or 764 integrated on
PCI bus or
Matrox MGA Millennium video card
Video memory 1 MB standard
upgradable to 2 MB 1 MB standard
upgradable to 2 MB
Matrox Models
2 MB standard
upgradable to 4 MB or 8 MB*
Enhanced IDE hard disk controller CMD PCI0640B
Integrated on PCI bus
dedicated for hard disk drives
Integrated in chip set (part of
82371FB multipurpose chip)
Integrated on PCI bus
Primary channel dedicated for hard
disk drives
Secondary channel recommended for
CD-ROM drives
Secondary IDE controller Integrated in NS 87332 Super I/O
chip on ISA bus
dedicated for CD-ROM drives
No secondary IDE controller
(Two channels on enhanced IDE
controller - see above)
Flexible disk controller Integrated in NS 87332 Super I/O
chip on ISA bus Integrated in SMC 932 Super I/O chip
on ISA bus
Serial / parallel port controller Integrated in NS 87332 Super I/O
chip on ISA bus Integrated in SMC 932 Super I/O chip
on ISA bus
*The 6 MB video upgrade module is available only from Matrox Electronic Systems Limited.

HP VECTRA VL 5/XX SERIES 4 DESKTOP – MINI-TOWER COMPARISON
Desktop Mini-Tower
IDE Controller
Primary channel connectors Two connectors for hard disk drives Two connectors for hard disk drives
IDE Controller
Secondary channel connectors One red connector recommended for CD-ROM Two red connectors recommended for
CD-ROM and supplementary hard
disk drive
Flexible disk controller connectors Two connectors for 3.5-inch
flexible disk drive or tape drive Two connectors for 3.5-inch flexible
disk drive or tape drive
One connector for 5.25-inch flexible
disk drive
Maximum two devices connected
simultaneously
Accessory board slots (on
backplane) One 16-bit ISA (short 16cm/ 6.3-inch)
One 16-bit ISA (full-length)
One 32-bit PCI/16-bit ISA
Combination (full-length)
One 32-bit PCI (full-length)
Three 16-bit ISA (full-length)
One 32-bit PCI/16-bit ISA
Combination (short 16cm/ 6.3-inch)
Two 32-bit PCI (full-length)
Internal device shelves One for hard disk drive Two for hard disk drives
Front-access device shelves One 3.5-inch
One 5.25-inch
One 5.25-inch, 1-inch high
One 3.5-inch
Three 5.25-inch

VL 5/XX SERIES 4 PC BLOCK DIAGRAM
Pentium
Processor 256 KB
Level-Two
Cache
Intel Triton
82437/8FX
Chipset
Memory
(8 MB -
128 MB)
PCI
Accessory
Board Slots
PCI Bus
Intel
82371FB
PCI/ISA
Bridge
IDE Controller Channel 1
IDE Controller Channel 2
S3 Trio
Video
Controller
ISA Bus
SMC932
Super I/O
Controller
I/O
Decode
Logic
BIOS
Flash
ROM
ISA
Accessory
Board Slots
Keyboard
Mouse
Serial 2 Serial 1
Parallel
FDD
Flash
Support
Host Bus
PRINCIPAL COMPONENTS AND FEATURES
The main features of the system board are:
• supports Pentium processors of several different clock speeds (90, 100, 120 or 133 MHz,
and 150 and 166 MHz when available) with accompanying voltage regulator module
(VRM)
• a PCI bus video controller: most models of the Vectra VL 5/xx series 4 have an integrated
64-bit Ultra VGA controller on the PCI bus (S3 Trio 765 64V+ on D3xxxA models and S3
Trio 764 on D3xxxB models)
• an Enhanced IDE controller with two channels on the PCI bus
• a primary IDE channel for two IDE hard disk drives
• a secondary IDE channel for an IDE CD-ROM drive and, in the mini-tower models, a
fourth IDE device (such as a third IDE hard disk drive)

• a combined controller on the ISA bus for
• 2 flexible disk drives and/or tape drives
• 2 serial ports
• 1 parallel port
• sockets for DRAM main memory: the Vectra VL 5/xx series 4 PCs provide six sockets for
main memory, allowing installation of up to 128 MB
• a system ROM (using flash ROM technology) that can be easily updated with the latest
firmware, using the
Phlash.exe program supplied with the firmware upgrade. The system
ROM contains:
• the BIOS (system BIOS, video BIOS and low option ROM)
• a power-on hardware test that allows you to view the results of the diagnostics as well
as a corrective action message (error message utility)
• menu-driven SETUP with context-sensitive help (in US English only)
• a keyboard/mouse controller and interface.
VL 5/XX SERIES 4 SYSTEM BOARD
*This video upgrade applieso nly to themodels with integrated video controller.

VL 5/XX MT SERIES 4 DESKTOP BACKPLANE
VL 5/XX MT SERIES 4 MINI-TOWER BACKPLANE
PROCESSOR
The Pentium processor uses 64-bit architecture and is 100% compatible with Intel’s family of
x86 processors. All application software written for Intel386 and Intel486 processors can run on
the Pentium without modification. The Pentium processor contains all the features of the Intel
486 processor, with the following added features which enhance performance:
• Superscalar Architecture
• Floating Point Unit
• Dynamic Branch Prediction
• Instruction and Data cache
• Data Integrity
• Supports MultiProcessor Specification (MPS) 1.1
• PCI bus architecture
• Advanced Power Management capability for reducing power consumption
The processor is seated in a Zero Insertion Force (ZIF) socket.

SUPERSCALAR ARCHITECTURE
The Pentium processor’s superscalar architecture has two instructions pipelines and a floating-
point unit, each capable of independent operation. The two pipelines allow the Pentium to
execute two integer instructions in parallel, in a single clock cycle. Using the pipelines halves
the instruction execution time and almost doubles the performance of the processor, compared
with an Intel486 microprocessor of the same frequency.
Frequently, the microprocessor can issue two instructions at once (one instruction to each
pipeline). This is called instruction pairing. Each instruction must be simple. One pipeline will
always receive the next sequential instruction of the one issued to the other pipeline.
FLOATING POINT UNIT (FPU)
The Floating Point Unit incorporates optimized algorithms and dedicated hardware for multiply,
divide, and add functions. This increases the processing speed of common operations by a
factor of three.
DYNAMIC BRANCH PREDICTION
The Pentium processor uses dynamic branch prediction. To dynamically predict instruction
branches, the processor uses two prefetch buffers. One buffer is used to prefetch code in a
linear way, and one to prefetch code depending on the contents of the Branch Target Buffer
(BTB). The BTB is a small cache which keeps a record of the last instruction and address used.
It uses this information to predict the way that the instruction will branch the next time it is used.
When it has made a correct prediction, the branch is executed without delay, thereby
enhancing performance.
INSTRUCTION AND DATA CACHE
The Pentium processor has separate code and data caches on-chip. Each cache is 8 KB in size
with a 32-bit line. The cache acts as temporary storage for data and instructions from the main
memory. As the system is likely to use the same data several times, it is faster to get it from
the on-chip cache than from the main memory.
Each cache has a dedicated Translation Lookaside Buffer (TLB). The TLB is a cache of the
most recently accessed memory pages. The data cache is configured to be Write-Back on a
line-by-line basis (a line is an area of memory of a fixed size).
The data cache tags (directory entries used to reference cached memory pages) are triple
ported to support two data transfers and an inquire cycle in the same clock cycle. The code
cache tags are also triple ported to support snooping (a way of tracking accesses to main
memory by other devices) and split line accesses.
Individual pages of memory can be configured as cacheable or non-cacheable by software or
hardware. They can also be enabled and disabled by hardware or software.

DATA INTEGRITY
The processor uses a number of techniques to maintain data integrity. It employs two methods
of error detection:
• Data Parity Checking
This is supported on a byte-by-byte basis, generating parity bits for data addresses sent
out of the microprocessor. These parity bits are not used by the external subsystems.
• Internally
The processor uses functional redundancy checking to provide maximum error detection
of the processor and its interface.
PCI CHIP SET
The chip set consists of three devices:
• The PCI, Cache, and Memory Controller (82437FX)
• Two Data Path Units (82438FX)
• The PCI/ISA bridge and IDE controller (82371FB)
The 82437FX and 82438FX2 devices provide the core cache and memory system architecture,
and the PCI interface.
Pentium
Processor
Host Bus
82438FX
Data Path Unit
82438FX
Data Path Unit
Main
Memory
Level-Two
Cache
PCI Bus ISA Bus
82371Fb
PCI/ISA Bridge
PCI
Master
PCI
Slave
APIC
ISA Bus
Controller
IDE
Controller
BIOS
82437FX PCI, Cache and
Memory Controller
Cache
Controller
Write
Buffer
PCI
Master
Main
Memory
Controller
PCI
Slave

PCI, CACHE AND MEMORY CONTROLLER (82437FX)
The 82437FX device integrates cache and memory control functions and provides bus control
functions for the transfer of information between the microprocessor, cache, main memory and
the PCI bus. The cache controller supports the Pentium Cache Write-Back mode and 256 KB
of direct mapped, write-back level-two cache, using synchronous pipeline burst SRAMs.
82437FX Feature Summary
Function Features
Cache controller • Direct mapped organization
• Buffered write-back
• External cache tags
• 32-byte line size
• Uses synchronous pipeline burst SRAM
• Supports 3-1-1-1* burst reads
Write buffer • Buffers all processor writes to main memory
• Buffers memory writes to PCI for selected memory regions
• Supports 3-1-1-1* write access timing
*The Pentium's internal cache has a 32-byte line size, which is four times the width of the Pentium's
host data bus. Burst reads and writes by the Pentium involve a full cache line, and so require four
back-to-back cycles to complete. The first cycle in each burst of four always requires more time to
complete than the three subsequent cycles. This is because the first cycle includes the addressing
phase and precharge timing (for memory).

Function Features
DRAM controller • Uses dedicated DRAM memory address and data buses
• Page mode - one or two pages open simultaneously
• Supports pipelined accesses
• Full RAS/CAS programmability
• Flexible bank configurations (each bank programmable for DRAM
size, bank width and single or double-sided modules)
• Self configuring bank start addresses
• Shadow RAM support for the memory region 640 KB -
1 MB (in 16 KB segments)
• System management memory support
• RAS only refresh
• Fast memory access 7-2-2-2* with Extended Data Out (EDO) memory
PCI slave interface • Becomes processor (local) bus master to generate DRAM
requests on behalf of other PCI bus masters
• Supports PCI bus burst cycles
• Supports posted writes to DRAM for PCI burst writes
• Supports read-ahead from DRAM for PCI burst reads
PCI master interface • Provides for programmable PCI bus memory regions in
memory address map
• Supports PCI bus burst cycles for 64-bit and 32-bit misaligned Pentium
reads and writes
• Optional posting of PCI memory and I/O writes
• Optional buffering of PCI memory writes
• Optional read-ahead for processor to PCI accesses
PCI bus arbiter • Supports PCI bus arbitration for up to four masters
• Supports rotating priority scheme
*The Pentium's internal cache has a 32-byte line size, which is four times the width of the Pentium's
host data bus. Burst reads and writes by the Pentium involve a full cache line, and so require four
back-to-back cycles to complete. The first cycle in each burst of four always requires more time to
complete than the three subsequent cycles. This is because the first cycle includes the addressing
phase and precharge timing (for memory).
DATA PATH UNIT (82438FX)
The 82438FX component contains a 64-bit data path between the host bus and main memory.
A 4×64-bit deep buffer provides 3-1-1-1 writes to main memory.
This buffer is used for:
• writes from processor to main memory
• level-two cache write back cycles
• transfers from PCI to main memory.
THE PCI/ISA BRIDGE AND IDE CONTROLLER (82371FB)
The 82371FB device serves as a bridge between the PCI bus and the ISA expansion bus, and
incorporates a two-channel PCI IDE controller. It incorporates the logic for a PCI interface, a
DMA interface, a DMA controller that supports fast DMA transfers, data buffers to isolate the
PCI and ISA buses, Timer/Counter logic, and NMI control logic.

The 82371FB PCI/ISA bridge also provides decode for the following peripheral devices:
• Flash BIOS
• Real Time Clock/CMOS Memory
• Keyboard/Mouse Controller
• Flexible Disk Controller
• Two Serial Ports
• One Parallel Port
• PCI Accessory Board Slots.
THE 82438FX AND 82371FB FEATURE SUMMARY
Function Features
Data buffer
(for 82438FX and 82371FB
together)
• Provides a high performance 64-bit data path between
the processor (local) bus and main memory
• Provides a 32-bit data path to the PCI bus
• Provides a 8-deep x 64-bits wide write buffer for all
processor writes to main memory
• Provides a one-level posted write buffer for all processor writes
to PCI bus memory
PCI master / slave interface
(for 82371FB only) • Fully compatible with PCI specification • Supports PCI-to-ISA / ISA-to-PCI bus master cycle translations
• Supports programmable memory regions to provide fast positive
decode for PCI master accesses
• Implements subtractive decoding for unclaimed PCI cycles
• Supports PCI-to-ISA posted memory writes
• Translates DMA transfers for PCI slaves
• Supports PCI address/data parity generation and checking
ISA bus controller
(for 82371FB only) • Fully compatible with ISA bus standard • Supports asynchronous ISA bus operation up to 16 MHz
• Integrates:
• two 82C37A DMA controllers
• two 82C59A interrupt controllers
• 82C54 timer
• hidden ISA refresh controller
• support for BIOS
• port A, B and NMI logic
Fast IDE controller
(for 82371FB only) • Supports PIO and Bus Master IDE • Supports up to Mode 4 timings
• Up to 22 MB/s transfer rate
• 8×32-bit buffer for Bus Master IDE PCI burst transfers

SUPER I/O CHIP
The basic input/output control functions are provided by the Super I/O chip, the SMC 932. This
chip is 100% compatible with ISA architecture and provides:
• an integrated flexible drive controller that supports 3.5-inch and 5.25-inch flexible disk
drives, and tape drives
• a multi-mode parallel port
• two serial ports
• keyboard controller
• RTC
• 256 bytes of CMOS memory.
NS PC87332VF FEATURE SUMMARY
Function Features
Flexible disk controller • Software compatible with the DP8473, the 765A, and the N82077
• 16-byte FIFO (default disabled)
• Burst and non-burst modes
• Perpendicular recording drive support
• New high-performance internal digital data separator (no external filter
components required)
• Low-power CMOS with enhanced power-down mode
• Automatic media-sense support
UARTs • Software compatible with the PC16550A and PC16450
• MIDI compatible
Bidirectional parallel port • Enhanced Parallel Port (EPP) compatible
• Extended Capabilities Port (ECP) compatible
• Bidirectional under either software or hardware control
• Ability to multiplex FDC signals on parallel port pins for external FDD
• Includes protection circuit against damage caused when printer is
switched on, or operated at higher voltages
Address decoder Provides selection of all primary and secondary ISA addresses including
COM 1 - 4 and LPT 1 - 3
Enhanced power
management • Special configuration registers for power down
• Enhanced programmable power down FDC command
• Auto power down and wake up modes
• 3 special pins for power management
• Typical current consumption during power down is less than 10µA
• Reduced pin leakage current
FLEXIBLE DRIVE CONTROLLER (FDC)
The FDC is software and register compatible with the 82077AA, and 100% IBM compatible. It
has an A and B drive-swapping capability and a non-burst DMA option.

SERIAL/PARALLEL PORTS
The Super I/O chip supports two serial ports and one bidirectional parallel port. The serial ports
are high speed UARTs with 16 Byte FIFOs, and can be programmed as COM1, COM2, COM3,
COM4, or disabled.
The parallel port can operate in four modes:
• Standard mode (PC/XT, PC/AT, and PS/2 compatible)
• Bidirectional mode (PC/XT, PC/AT, and PS/2 compatible)
• Enhanced mode (Enhanced Parallel Port or EPP compatible)
• High speed mode (MS/HP Extended Capabilities Port or ECP compatible).
It can be programmed as LPT1 (378h, IRQ7), LPT2 (278h, IRQ5), or disabled.
GRAPHICS/INTEGRATED VIDEO
The integrated video subsystem is composed of a PCI bus video controller and a DRAM array.
The Vectra VL 5/xx series 4 PC uses the S3 Trio 765 64V+ or S3 Trio 764 video controller.
These video controller embed a RAMDAC, and supports video resolutions of up to
1280 x 1024.
Video Controller
The S3 Trio 765 64V+ and S3 Trio 764 video controllers offer full compatibility with VGA. In
addition, the features are enhanced beyond Super VGA by hardware which accelerates
graphical user interface operation in environments such as Microsoft Windows or OS/2.
NOTE The S3 Trio 765 64V+ and S3 Trio 764 video drivers
are not compatible.
D3xxxA models use the S3 Trio 765 64V+.
D3xxxB models use the S3 Trio 764.
The enhanced features include:
• direct connectivity to PCI bus
• true acceleration for 8, 16 and 32-bit pixel depths
• 60 MHz clock for video memory
• fully programmable Pixel Clock Generator up to 135 MHz
• supports 2 MB DRAM
• fast linear addressing with full software relocation.
Video DRAM
The Vectra VL 5/xx series 4 PC is supplied with 1 MB of video DRAM as standard. An
additional 1 MB video DRAM accessory can be installed, to give a total of 2 MB video DRAM.
The upgrade consists of two 512 KB video memory chips.
Video Resolutions Supported
A table detailing all the video resolutions supported can be found in chapter 5 of this manual.

IDE TO PCI CONTROLLER
This IDE to PCI controller implementation supports the full Enhanced IDE feature set. The
BIOS uses the auto-detected drive geometry information to select the fastest configuration
supported by each installed IDE drive.
• Supports data transfer rate of up to 12 MB/s.
• 32-bit Windows and DOS I/O transfers (many IDE controllers use Windows integral IDE
driver which only supports 16-bit I/O transfers).
FLASH ROM
The PC uses 128 KB of 200ns, Flash ROM. The HP BIOS boot code contains SETUP, video
BIOS, error messages, and ISA and PCI initialization. During programming of the Flash ROM,
the power supply switch and the reset button are disabled to prevent accidental interruption.
SECURITY FEATURES
The PC has many security features to protect stored data, to protect the SETUP configuration,
and to prevent unauthorized operation of software applications:
• user password
• administrator password (system configuration protection)
• power-on prompt, with user of administrator password
• power-on keyboard and mouse lock, with user password
• space bar power-on protection (feature can be disabled in SETUP)
• communications port protection (ports can be disabled in SETUP)
• flexible disk drive protection (disks can be read and/or write protected in SETUP)
• boot protection (boot on flexible disk, CD-ROM, and hard disk can be enabled or disabled
in SETUP)
• cover lock and, in the desktop, security bracket.
PHYSICAL CHARACTERISTICS
Desktop Unit
Weight: 0 lbs (9 kg)
Dimensions: 15.3 inches (D) by 16.5 inches (W) by 4.9 inches (H)
(39 cm by 42 cm by 12.5 cm)
Footprint: 1.8 sq ft (0.17 m2)
Mini-Tower Unit
Weight: 28.7 lbs (13 kg)
Dimensions: 17.3 inches (D) by 7.6 inches (W) by 17.2 inches (H)
(44 cm by 19.2 cm by 43.8 cm)
Footprint: 0.9 sq ft (0.084 m2)
Keyboard
Flat: 18 inches (W) by 7 inches (D) by 1.3 inches (H)
(464mm by 178mm by 33mm)
Standing: 18 inches (W) by 7 inches (D) by 2 inches (H)
(464mm by 178mm by 51mm)

ELECTRICAL SPECIFICATIONS
Desktop Models
Input voltage:
The Desktop VL 5/xx series 4 PCs are equipped with a 100 W (rated) power supply.
This power supply requires an input voltage in the following range:
• 100-127 Vac and 200-240 Vac auto-ranging at a frequency of 50 and 60 Hz.
POWER AVAILABILITY (CONTINUOUS OPERATION):
• 100 W continuous.
• For each ISA accessory board:
4.5 A at 5 V
1.5 A at 12 V
0.3 A at -12 V
0.1 A at -5 V.
• For PCI accessory boards:
4.5 A at 5 V
0.5 A at 12 V
0.1 A at -12 V
Mini-Tower Models
Input voltage:
The Mini-Tower VL 5/xx series 4 PCs are equipped with a 160 W continuous (rated) power
supply.
This power supply requires an input voltage in the following range:
• 100-127 Vac and 176-264 Vac at a frequency of 47 Hz to 63 Hz, with manual switching
between 115 and 230 V.
Heat Dissipation:
• Maximum thermal dissipation: 91 kcal per hour (360 BTUs per hour).
Power Availability (Continuous Operation):
• 160 W continuous, 200 W peak.
• For each ISA accessory board:
1.4 A at 5 V
0.13 A at 12 V
0.1 A at -12 V
0.03 A at -5 V.
• For PCI accessory boards:
3 x 5V PCI slots.